BF1109; BF1109R; BF1109WR N-channel dual-gate MOS-FETs Product sp
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BF1109; BF1109R; BF1109WR N-channel dual-gate MOS-FETs
Product specification Supersedes data 1997 File under Discrete Semiconductors, SC07 1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
FEATURES Short channel transistor with high forward transfer admittance input capacitance ratio noise gain controlled amplifier Internal self-biasing circuit ensure good cross-modulation performance during good stabilization. APPLICATIONS applications with supply voltage, such television tuners professional communications equipment.
BF1109; BF1109R; BF1109WR
PINNING DESCRIPTION source drain gate gate
view
MSB035
handbook, columns
BF1109R marking code: NBp.
Fig.2
Simplified outline (SOT143R).
fpage
DESCRIPTION Enhancement type N-channel field-effect transistor with source substrate interconnected. Integrated diodes between gates source protect against excessive input voltage surges. BF1109, BF1109R BF1109WR encapsulated SOT143B, SOT143R SOT343R plastic packages respectively. QUICK REFERENCE DATA SYMBOL Ptot Cig1-ss Crss Xmod PARAMETER drain-source voltage drain current (DC) total power dissipation forward transfer admittance input capacitance gate reverse transfer capacitance noise figure cross-modulation operating junction temperature CAUTION This product supplied anti-static packing prevent damage caused electrostatic discharge during transport handling. further information, refer Philips specs.: SNW-EQ-608, SNW-FQ-302A SNW-FQ-302B. Tamb CONDITIONS MIN. TYP. MAX. UNIT dBµV
view
MSB014
view
MSB842
BF1109 marking code: NFp.
BF1109WR marking code:
Fig.1
Simplified outline (SOT143B).
Fig.3
Simplified outline (SOT343R).
input level
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
LIMITING VALUES accordance with Absolute Maximum Rating System (IEC 134). SYMBOL Ptot Tstg Note Device mounted printed-circuit board. PARAMETER drain-source voltage drain current (DC) gate current gate current total power dissipation storage temperature operating junction temperature Tamb note
BF1109; BF1109R; BF1109WR
CONDITIONS
MIN.
MAX. +150 +150
UNIT
MGM243
handbook, halfpage
Ptot (mW)
Tamb (°C)
Fig.4 Power derating curve.
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
THERMAL CHARACTERISTICS SYMBOL Note Device mounted printed-circuit board. STATIC CHARACTERISTICS unless otherwise specified. SYMBOL V(BR)DSS PARAMETER drain-source breakdown voltage PARAMETER thermal resistance from junction ambient free thermal resistance from junction soldering point
BF1109; BF1109R; BF1109WR
CONDITIONS note
VALUE
UNIT
CONDITIONS VG1-S VG2-S VG2-S IG1-S VG1-S IG2-S VG1-S VG2-S VG1-S VG2-S VG1-S VG2-S
MIN.
MAX.
UNIT
V(BR)G1-SS gate 1-source breakdown voltage V(BR)G2-SS gate 2-source breakdown voltage VG2-S (th) IDSX IG1-SS IG2-SS gate 2-source threshold voltage self-biasing drain current gate cut-off current gate cut-off current
DYNAMIC CHARACTERISTICS Common source; Tamb VG2-S self-biasing current; unless otherwise specified. SYMBOL Cig1-ss Cig2-ss Coss Crss PARAMETER forward transfer admittance input capacitance gate input capacitance gate output capacitance noise figure power gain MHz; opt; opt; MHz; Fig.16 opt; opt; MHz; Fig.17 Xmod cross-modulation input level AGC; MHz; funw MHz; Fig.18 input level AGC; MHz; funw MHz; Fig.18 CONDITIONS pulsed; MIN. TYP. MAX. UNIT dBµV dBµV
reverse transfer capacitance
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
handbook, halfpage
MDA613
handbook, halfpage
MDA614
(mA)
(mA) VG2-S
VG2-S
Fig.5 Output characteristics; typical values.
Fig.6 Transfer characteristics; typical values.
MDA615
handbook, halfpage
handbook, halfpage
MDA616
(mS)
VG2-S
(mA)
(mA) VG2-S
Fig.7
Forward transfer admittance function drain current; typical values.
Fig.8
Drain current function gate voltage; typical values.
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
handbook, halfpage
MDA617
MDA618
handbook, halfpage
(mA)
(mA)
(µA)
VG2-S
VG2-S
Fig.9
Drain current function drain-source voltage; typical values.
Fig.10 Drain current function gate current; typical values.
handbook, halfpage
MDA619
Vunw (dBµV)
gain reduction (dB)
VG2nom IDnom MHz; funw MHz; Tamb
Fig.11 Unwanted voltage cross-modulation function gain reduction; typical values (see Fig.18).
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
handbook, halfpage (mS)
MDA620
handbook, halfpage |yrs| (mS) |yrs|
MDA621
-103 (deg) -102
10-1
10-2
(MHz)
(MHz)
VG2-S Tamb
VG2-S Tamb
Fig.12 Input admittance function frequency; typical values.
Fig.13 Reverse transfer admittance phase function frequency; typical values.
handbook, halfpage |yfs| (mS)
MDA622
-102 (deg)
MDA623
handbook, halfpage
|yfs|
(mS)
10-1
(MHz)
10-2
(MHz)
VG2-S Tamb
VG2-S Tamb
Fig.14 Forward transfer admittance phase function frequency; typical values.
Fig.15 Output admittance function frequency; typical values.
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
handbook, full pagewidth
VAGC
BF1109 BF1109R BF1109WR output
input
BB405 Vtun input
BB405
Vtun output
MDA624
MHz. turns, internal diameter copper wire. turns, internal diameter copper wire; tapped approximately half turn from cold side, adjusted
Fig.16 Gain test circuit.
handbook, full pagewidth
VAGC
input
BF1109 BF1109R BF1109WR
,,,, ,,,,
output
MDA625
MHz. silvered copper wire above ground plane. silvered copper wire above ground plane. turns copper wire without spacing, internal diameter approx.
Fig.17 Gain test circuit.
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
handbook, full pagewidth
Rgen
BF1109 BF1109R BF1109WR
MDA626
Fig.18 Cross-modulation test set-up.
Table (MHz) 1000 Table
Scattering parameters: VG2-S MAGNITUDE (ratio) 0.995 0.992 0.984 0.973 0.961 0.944 0.926 0.906 0.887 0.868 0.852 ANGLE (deg) -3.71 -7.29 -14.3 -21.2 -27.9 -34.4 -40.8 -46.9 -52.9 -58.8 -64.3 MAGNITUDE (ratio) 3.013 3.002 2.967 2.922 2.869 2.793 2.730 2.660 2.605 2.527 2.457 ANGLE (deg) 175.0 170.2 160.7 151.3 142.0 132.9 124.1 1115.3 106.5 97.8 89.6 MAGNITUDE (ratio) 0.000 0.001 0.002 0.002 0.003 0.003 0.003 0.003 0.004 0.004 0.004 ANGLE (deg) 88.2 83.7 86.2 83.2 84.1 85.7 88.4 94.6 107.2 114.9 129.7 MAGNITUDE (ratio) 0.998 0.997 0.995 0.992 0.990 0.987 0.985 0.983 0.981 0.977 0.9377 ANGLE (deg) -1.8 -3.5 -7.0 -10.5 -13.9 -17.2 -20.5 -23.7 -26.8 -30.0 -33.1
Noise data: VG2-S (MHz) Fmin (dB) (ratio) 0.684 (deg) 40.94 40.4
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
PACKAGE OUTLINES Plastic surface mounted package; leads
BF1109; BF1109R; BF1109WR
SOT143B
detail
scale
DIMENSIONS original dimensions) UNIT 0.48 0.38 0.88 0.78 0.15 0.09 0.45 0.15 0.55 0.45
OUTLINE VERSION SOT143B
REFERENCES JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
Plastic surface mounted package; reverse pinning; leads
SOT143R
detail
scale
DIMENSIONS original dimensions) UNIT 0.48 0.38 0.88 0.78 0.15 0.09 0.55 0.25 0.45 0.25
OUTLINE VERSION SOT143R
REFERENCES JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 97-03-10
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1109; BF1109R; BF1109WR
Plastic surface mounted package; reverse pinning; leads
SOT343R
detail
scale
DIMENSIONS original dimensions) UNIT 0.25 0.10 1.35 1.15 1.15 0.45 0.15 0.23 0.13
OUTLINE VERSION SOT343R
REFERENCES JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 97-05-21
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
BF1109; BF1109R; BF1109WR
This data sheet contains target goal specifications product development. This data sheet contains preliminary data; supplementary data published later. This data sheet contains final product specifications.
Limiting values given accordance with Absolute Maximum Rating System (IEC 134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Where application information given, advisory does form part specification. LIFE SUPPORT APPLICATIONS These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips customers using selling these products such applications their risk agree fully indemnify Philips damages resulting from such improper sale.
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
NOTES
BF1109; BF1109R; BF1109WR
1997
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
NOTES
BF1109; BF1109R; BF1109WR
1997
Philips Semiconductors worldwide company
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other countries apply Philips Semiconductors, Marketing Sales Communications, Building BE-p, P.O. 218, 5600 EINDHOVEN, Netherlands, Fax. 24825 Philips Electronics N.V. 1997
Internet:
SCA55
rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent- other industrial intellectual property rights.
Printed Netherlands
117067/00/02/pp16
Date release: 1997
Document order number:
9397 02954
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