Manuals that this addendum applicable are: MPC885RM, MPC866UM, MP

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Manuals that this addendum applicable are: MPC885RM, MPC866UM, MP

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MPC8xxRMAD Rev. 0.1, 10/2003 MPC8xx Digital Signal Processing
Manuals that this addendum applicable are:
MPC885RM, MPC866UM, MPC862UM, MPC860UM, MPC855TUM, MPC850UM, MPC823UM,
members MPC8xx PowerQUICC family (which includes MPC850, MPC823, MPC855T, MPC860, MPC857DSL, MPC857T, MPC862, MPC852T, MPC859DSL, MPC859, MPC866, MPC885, MPC880, MPC875, MPC870) provides specialized hardware library functions support applications. communication processor's multiply-and-accumulate (MAC) handles real complex numbers, address generator calculates modulo addressing circular buffer structures. Library functions include finite impulse response (FIR) filtering done with without adaptive equalization, data compression, scrambling. following topics addressed this addendum: Topic Page Section "Features" Section "DSP Functionality" Section "DSP Function Descriptors (FDs)" Section "Data Representation" Section "Input Output Buffers" Section "Buffer Coefficient Base Pointers (CBASE, XPTR, XYPTR)" Section "DSP Parameter RAM" Section "DSP Commands" Section "DSP Function Priority within CPM" Section "DSP Event/Mask Registers (SDSR/SDMR)" Section "FIR Library Functions" Section "IIR-Real Real Real Section "Modulation (MOD)-Real Sin, Real Cos, Complex Real/Complex Section "DEMOD-Real Sin; Real Cos, Real Complex Section "LMS1-Complex Coefficients, Complex Samples, Real/Complex Scalar" Section "LMS2-Complex Coefficients, Complex Samples, Real/Complex Scalar" Section "Weighted Vector Addition (WADD)-Real Real Section "DSP Performance Using Core Alone Versus Using CPM" Section "DSP Function Execution Times Performance Calculation" Section "Document Revision History"
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Features
Features
microcode library provides basic routines such applications V.32bis V.34 Data function parameters formatted core using function descriptors (FDs) routines core-initiated using commands (INIT START DSP) Maskable interrupts issued core upon completion routines 16-bit 16-bit multiply-and-accumulate (MAC) engine 40-bit accumulators with overflow saturation logic 32-bit input registers operation clock (2-clock latency, 1-clock blockage) single instruction triggers sequence one, four MACs Concurrent operation with other instructions Complex (16-bit real, 16-bit imaginary) loop: clocks multiplies Load/store instructions with automatic post increment/decrement Post increment/decrement Modulo addressing modifier circular buffer support
following outlines user interface functionality:
following summarizes features CPM:
Functionality
functionality divided into three layers-hardware, firmware, software. Figure shows functionality implementation.
Function descriptor chain external memory defines sequence data flow functions. Generic microcode routine library stored internal ROM. address generator modules architecture.
Core Software
Firmware
Hardware
Figure Functionality Implementation
user defines software layer build application. software interface defined that enables parameters (pointer filter coefficients, pointers input output buffers) passed between core CPM. Several functions chained together reduce core intervention interrupt rates, assuming that data structures dual-port RAM. special host commands signal initialize execute function descriptor (FD) chain. maskable interrupt signals core resume control once executes chain.
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Function Descriptors (FDs)
Table lists available functions with opcodes.
Table Library Functions
Function FIR1 FIR2 FIR3 FIR5 FIR6 Opcode 00001 00010 00011 00101 00110 00111 01000 01001 01010 01011 01100 Input Real Complex Complex Complex Real Real Complex Real Real Coefficient Real Real Complex Complex Complex Real Complex Complex Output Real Complex Application Decimation, interpolation filter, filter
Real/Complex computation, equalizer Real/Complex Fractionally spaced equalizer Complex Real Biquad filter
Real/Complex modulation Complex Real demodulation update, equalizer update (T/2, T/3) Equalizer update (2T/3) Interpolation
DEMOD LMS1 LMS2 WADD
Function Descriptors (FDs)
Similar structure buffer descriptors, function descriptor (FD) specifies function contains function-specific parameters. Prepared external memory, group chained together form circular queue programmable length. There such chains-one transmitter receiver. chains logically equivalent tables SCCs.) Figure shows chain structure.
Dual-Port System Memory RxFD Chain Base Chain) Base Chain)
TxFD Chain
Input, Output, Coefficient Buffers
Figure Function Descriptor (FD) Chain Structure
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Function Descriptors (FDs)
consists eight 16-bit entries. first entry contains status control bits including function opcode. remaining seven entries contain function's parameter packet. Figure shows general structure
Offset Offset Offset
IALL
INDEX
OPCODE
Parameter Parameter
Figure Function Descriptor (FD) Structure
Table describes status control bits. library functions stop, wrap, interrupt bits. remaining control bits, apart from opcode, depends particular function. parameter packets described with individual functions.
Table Status Control Bits
Bits Name Stop processing. stop after processing this Stop after processing this Reserved Wrap beginning chain. Determines length chain. last chain. last chain. After this been processed, returns chain pointed FDBASE. Interrupt core. interrupt generated after this function processed. maskable interrupt generated after this function processed. Complex number option. Used specify real/complex output, real/complex scalar LMS. only real component. both real imaginary components. Auto-increment iterations. (input) data pointer incremented (Modulo M+1) number samples specified FD[INDEX] after last iteration. (input) data pointer incremented (Modulo M+1) number samples specified FD[INDEX] after each iteration. Auto-increment index. (input) pointer incremented. (input) pointer incremented sample. (input) pointer incremented samples. (input) pointer incremented three samples. Description
IALL
INDEX
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Data Representation Table Status Control Bits (continued)
Bits Name Description Preset coefficients pointer. Coefficients pointer preset after each iteration. Coefficients pointer preset CBASE after each iteration.
11-15
OPCODE Function operation code. Specifies function executed. Table above.
Data Representation
inputs, coefficients, outputs represented 16-bit, fixed-point, two's-complement numbers. Figure shows real number representation.
Field
Real
Figure Real Number Representation
complex number represented pair 16-bit components-16 bits imaginary component bits real component. Figure shows complex number representation.
Field Field
Imaginary
Real
Figure Complex Number Representation
Input Output Buffers
input output buffers circular implementation, with their sizes programmed parameter packets. input output buffer lengths bytes, respectively, where both multiples four. input output buffers must each aligned natural boundaries dual-port RAM. natural boundary address evenly divisible where greater than size buffer. example, input buffer with size bytes must reside dual-port address evenly divisible (25). Figure illustrates circular buffer.
BUFFER BASE ADDRESS (NATURALLY ALIGNED) DATA POINTER CIRCULAR BUFFER SIZE
Figure Circular Buffer
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Buffer Coefficient Base Pointers (CBASE, XPTR, XYPTR)
Buffer Coefficient Base Pointers (CBASE, XPTR, XYPTR)
input buffer, output buffer, coefficient buffer pointers 16-bit offsets from base dual-port RAM. These include CBASE buffer pointers structures pointed XPTR XYPTR. structures pointed XPTR XYPTR consist halfword-aligned array 16-bit pointers defined specific library function.
Parameter
areas dual-port hold parameters scratchpad. chain (DSP1) parameter area begins dual-port offset 0x1EC0, chain (DSP2) parameter area begins 0x1FC0.
FDBASE parameter defines starting address chain system memory. FDBASE should 16-byte aligned initialized before issuing INIT_DSP. Table shows DSPx parameter memory map.
Table DSPx Parameter Memory
Offset 0x00 0x04 0x08 0x0C 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x28 0x2A
Name FDBASE FD_PTR DSTATE
Width Word Word Word Word
Description Function descriptor chain base address. Current pointer state Reserved Current status Current number_of_iterations Current number_of_taps Current coefficient buffer base Current sample buffer_size Current pointer input buffer Current output buffer_size Current pointer output buffer Current input buffer_size Current input buffer data pointer Current output buffer_size Current output buffer data pointer Current coefficient buffer_size Current coefficient buffer data pointer
DSTATUS Hword CBASE XPTR YPTR Hword Hword Hword Hword Hword Hword Hword Hword Hword Hword Hword Hword Hword
Offset from base. DSP1 base 0x1EC0; DSP2 base 0x1FC0.
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Commands
Commands
Table Opcodes
OPCODE Command
INIT
Once parameters place, INIT START begin processing chain. Table provides descriptions these commands.
Description Initializes chain. Deactivates current chain initializes current pointer (FD_PTR) chain base address (FDBASE). Starts chain. Activates current chain.
1100 1101
START
Function Priority within
execution functions priority level within that tracks priority level programmed IDMA; chapter, "Communications Processor," specific microprocessor user's manual details. IDMA priority (and thus priority) programmed RCCR. IDMA effectively share same priority slot; however, within that slot, priority. section, "RISC Controller Configuration Register (RCCR)" details.
Event/Mask Registers (SDSR/SDMR)
Since there dedicated event register, uses SDMA status register (SDSR) report maskable interrupts core. Figure shows register format. Note that writing corresponding bits clears events. SDSR cleared reset read time.
Field Reset Addr
SBER
0x908 (SDSR); 0x90C (SDMR)
DSP2
DSP1
Figure Event/Mask Registers (SDSR/SDMR)
Table describes SDSR/SDMR fields.
Table SDSR/SDMR Field Descriptions
Bits Name SBER Description SDMA channel error. Indicates that error caused SDMA channel terminated during read write cycle. SDMA error address retrieved from SDMA address register (SDAR) internal address (IMMR offset) 0x904. Reserved. Must cleared. chain2 (Tx) interrupt. when current transmitter chain been completed. However, DSP2 only reports descriptor's set. chain1 (Rx) interrupt. when current receiver chain been completed. However, DSP1 only reports descriptor's set.
DSP2 DSP1
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Library Functions
SDMA mask register (SDMR) used mask interrupts. SDMR mirrors format SDSR. Setting SDMR enables corresponding interrupt SDSR; clearing masks interrupt. Reset clears SDMR, disabling interrupts.
Library Functions
library provides five basic finite-impulse response filters, each specializing different combination real complex coefficients, input samples, output. following sections describe each variety filter. Table shows parameter packet common filters.
Table Parameter Packet
Offset CBASE XYPTR Name Number iterations Number_of_taps number taps should multiple four. Filter coefficient vector base address Input buffer_size minimum input buffer size real complex samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size When FD[X]=1, minimum output buffer size complex outputs); when FD[X]=0, real outputs). Reserved Description
Offset from base
11.1 FIR1-Real Real Real
Using values provided parameter packet, FIR1 implements basic finite-impulse filter, shown Figure with real coefficients, real input samples, real output. input data circular buffer with size (M+1), output data circular buffer with size (N+1).
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Library Functions
C(0) {Real} X(n) {Real} Y(n) {Real}
C(1)
Y(n)
C(2)
C(k-1)
Figure FIR1 Function
11.1.1 FIR1 Coefficient, Input, Output Buffers
coefficient vector occupies 16-bit entries memory, with C(0) stored first location. 16-bit input samples stored order circular buffer containing (M+1) bytes. 16-bit outputs stored consecutively circular buffer containing (N+1) bytes. Table displays FIR1 coefficient, input, output buffers.
Table FIR1 Coefficient, Input, Output Buffers
Coefficients C(0) C(1) C(2) C(k-1) Input Samples x(n-k+1) x(n-2) x(n-1) x(n) Output Y(n-k+1) Y(n-2) Y(n-1) Y(n)
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Library Functions
11.1.2 FIR1 Function Descriptor
FIR1 function descriptor shown Figure
Offset Offset Offset Offset Offset Offset Offset
IALL
INDEX
00001
CBASE XYPTR
Offset
Figure FIR1 Function Descriptor
status control bits offset 0x00) described Table FIR1 parameter packet consists seven 16-bit entries described Table
Table FIR1 Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword CBASE XYPTR Name Number iterations Number_of_taps number taps should multiple four. Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size minimum output buffer size outputs). Reserved Description
11.1.3 FIR1 Applications
FIR1 used decimation interpolation. example, partial Figure used implement decimation.
Offset Offset IALL INDEX OPCODE 00001
(Three iterations)
Figure FIR1 Decimation Example
11.2 FIR2-Real Complex Complex
Using values provided parameter packet, FIR2 implements basic filter, shown Figure with real coefficients, complex input samples, complex output. input data circular buffer with size (M+1), output data circular buffer with size (N+1).
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Library Functions
C(0) {Real} X(n) {Complex} Y(n) {Complex}
C(1)
Y(n)
C(2)
C(k-1)
Figure FIR2 Function
11.2.1 FIR2 Coefficient, Input, Output Buffers
coefficient vector occupies 16-bit entries memory, with C(0) stored first location. input sample buffer circular buffer that contains (M+1) bytes; each input sample 16-bit entries (real imaginary components). next sample stored address that follows previous sample. output buffer circular buffer containing (N+1) bytes; each output 16-bit entries (real imaginary components). next output stored address that follows previous output. Table displays FIR2 coefficient, input, output buffers.
Table FIR2 Coefficient, Input, Output Buffers
Coefficients C(0) C(1) C(2) C(k-1) Input Samples imaginary {x(n-k+1)} real {x(n-k+1)} imaginary {x(n-2)} real{x(n-2)} imaginary{x(n-1)} real{x(n-1)} imaginary{x(n)} real{x(n)} Output imaginary{Y(n-k+1)} real{Y(n-k+1)} imaginary{Y(n-2)} real{Y(n-2)} imaginary{Y(n-1)} real{Y(n-1)} imaginary{Y(n)} real{Y(n)}
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Library Functions
11.2.2 FIR2 Function Descriptor
FIR2 function descriptor shown Figure
Offset Offset Offset Offset Offset Offset Offset
IALL
INDEX
00010
CBASE XYPTR
Offset
Figure FIR2 Function Descriptor
status control bits offset 0x00) described Table FIR2 parameter packet consists seven 16-bit entries described Table
Table FIR2 Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword CBASE XYPTR Name Number iterations Number_of_taps Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size minimum output buffer size outputs). Reserved Description
11.2.3 FIR2 Applications
FIR2 used filters. example, partial shown Figure used implement filter.
Offset Offset IALL INDEX OPCODE 00010
(Three iterations)
Figure FIR2 Filter Example
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Library Functions
11.3 FIR3-Complex Complex Real/Complex
Using values provided parameter packet, FIR3 implements basic filter, shown Figure with complex coefficients, complex input samples, real complex output. input data circular buffer with size (M+1), output data circular buffer with size (N+1).
C(0) {Complex} X(n) {Complex} Y(n) {Real Complex}
C(1)
Y(n)
Real
C(2)
Y(n)
C(k-1)
Figure FIR3 Function
11.3.1 FIR3 Coefficient, Input, Output Buffers
coefficient vector occupies pairs 16-bit entries (real imaginary components) memory, with C(0) stored first location. input sample buffer circular buffer containing (M+1) bytes; each input sample 16-bit entries (real imaginary components). next sample stored address that follows previous sample. output buffer circular buffer that contains (N+1) bytes; each output 16-bit entries (real imaginary components). next output stored address that follows previous output. Table displays FIR3 coefficient, input, output buffers.
Table FIR3 Coefficient, Input, Output Buffers
Coefficients imaginary{C(0)} real{C(0)} imaginary{C(1)} real{C(1)} imaginary{C(k-1)} real{C(k-1)} Input Samples imaginary {x(n-k+1)} real {x(n-k+1)} imaginary {x(n-2)} real{x(n-2)} imaginary{x(n-1)} Complex Output, FD[X]=1 imaginary{Y(n-k+1)} real{Y(n-k+1)} imaginary{Y(n-2)} real{Y(n-2)} imaginary{Y(n-1)} Real Output, FD[X]=0 Y(n-k+1) Y(n-2) Y(n-1) Y(n)
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Library Functions Table FIR3 Coefficient, Input, Output Buffers (continued)
real{x(n-1)} imaginary{x(n)} real{x(n)} real{Y(n-1)} imaginary{Y(n)} real{Y(n)}
11.3.2 FIR3 Function Descriptor
FIR3 function descriptor shown Figure
Offset Offset
IALL
INDEX
00011
Offset Offset Offset Offset Offset Offset
CBASE XYPTR
Figure FIR3 Function Descriptor
status control bits offset 0x00) described Table FIR3 parameter packet consists seven 16-bit entries described Table
Table FIR3 Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword CBASE XYPTR Name Number iterations Number_of_taps Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size minimum output buffer size FD[X] complex outputs). minimum output buffer size FD[X] real outputs). Reserved Description
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Library Functions
11.3.3 FIR3 Applications
FIR3 with real output used echo cancellation shown sample Figure equalizer implemented using complex output.
Offset Offset IALL INDEX OPCODE 00011
(Three iterations)
Figure FIR3 Echo Cancellation Example
11.4 FIR5-Complex Complex Complex
Using values provided parameter packet, FIR5 implements basic filter, shown Figure with complex coefficients, complex input samples, complex output. input data circular buffer with size (M+1), output data circular buffer with size (N+1).
C(0) {Complex} X(n) {Complex} Y(n) {Complex}
C(1)
Y(n)
C(2)
C(k-1)
Figure FIR5 Function
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Library Functions
11.4.1 FIR5 Coefficient, Input, Output Buffers
coefficient vector occupies pairs 16-bit entries (real imaginary components) memory, with C(0) stored first location. input sample buffer circular buffer containing (M+1) bytes; each input sample 16-bit entries (real imaginary components). next sample stored address that follows previous sample. output buffer circular buffer that contains (N+1) bytes, next output stored address that follows previous output. Table displays FIR5 coefficient, input, output buffers.
Table FIR5 Coefficient, Input, Output Buffers
Coefficients imaginary{C(0)} real{C(0)} Input Samples imaginary {x(n-k+1)} real {x(n-k+1)} imaginary {x(n-2)} real{x(n-2)} imaginary{x(n-1)} real{x(n-1)} imaginary{x(n)} real{x(n)} Complex Output, FD[X]=1 imaginary{Y(n-k+1)} real{Y(n-k+1)} imaginary{Y(n-2)} real{Y(n-2)} imaginary{Y(n-1)} real{Y(n-1)} imaginary{Y(n)} real{Y(n)} Real Output, FD[X]=0 Y(n-k+1) Y(n-2) Y(n-1) Y(n)
imaginary{C(1)} real{C(1)} imaginary{C(k-1)} real{C(k-1)}
11.4.2 FIR5 Function Descriptor
FIR5 function descriptor shown Figure
Offset Offset Offset Offset Offset Offset Offset Offset
IALL
INDEX
00101
CBASE XYPTR
Figure FIR5 Function Descriptor
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Library Functions
status control bits offset 0x00) described Table FIR5 parameter packet consists seven 16-bit entries described Table
Table FIR5 Parameter Packet
Address Hword Hword Hword Hword Hword Hword CBASE XYPTR Name Number iterations Number_of_taps Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer size minimum output buffer size FD[X] outputs). minimum output buffer size FD[X] outputs). Reserved Description
Hword
11.4.3 FIR5 Applications
FIR5 used fractionally spaced equalizers. partial shown Figure used implement fractionally spaced equalizer.
Offset Offset IALL INDEX OPCODE 00101
(One Iteration)
Figure FIR5 Fractionally Spaced Equalizer Example
11.5 FIR6-Complex Real Complex
Using values provided parameter packet, FIR6 implements basic filter, shown Figure with complex coefficients, real input samples, complex output. input data circular buffer with size (M+1), output data circular buffer with size (N+1).
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Library Functions
C(0) {Complex} X(n) {Real} Y(n) {Complex}
C(1)
Y(n)
C(2)
C(k-1)
Figure FIR6 Function
11.5.1 FIR6 Coefficient, Input, Output Buffers
coefficient vector occupies pairs 16-bit entries (real imaginary components) memory, C(0) stored first location. input sample buffer circular buffer containing (M+1) bytes, each sample 16-bit entry. next sample stored address that follows previous sample. output buffer circular buffer that contains (N+1) bytes, next output stored address that follows previous output. Table displays FIR6 coefficient, input, output buffers.
Table FIR6 Coefficient, Input, Output Buffers
Coefficients imaginary{C(0)} real{C(0)} imaginary{C(1)} real{C(1)} imaginary{C(k-1)} real{C(k-1)} Input Samples x(n-k+1) x(n-2) x(n-1) x(n) Output imaginary{Y(n-k+1)} real{Y(n-k+1)} imaginary{Y(n-2)} real{Y(n-2)} imaginary{Y(n-1)} real{Y(n-1)} imaginary{Y(n)} real{Y(n)}
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IIR-Real Real Real
11.5.2 FIR6 Function Descriptor
FIR6 function descriptor shown Figure
Offset Offset Offset Offset Offset Offset Offset
IALL
INDEX
00110
CBASE XYPTR
Offset
Figure FIR6 Function Descriptor
status control bits offset 0x00) described Table FIR6 parameter packet consists seven 16-bit entries described Table
Table FIR6 Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword CBASE XYPTR Name Number_of_iterations Number_of_taps number taps should multiple Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size minimum output buffer size outputs). Reserved Description
IIR-Real Real Real
Using values provided parameter packet, implements basic biquad filter, shown Figure with real coefficients, real input samples, real outputs. input data circular buffer with size (M+1), output data circular buffer with size (N+1). Several stages biquad filter cascaded specifying iteration count greater than concatenating filter coefficients into vector.
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IIR-Real Real Real
C(0) {Real} X(n) {Real}
C(1) Y(n) {Real}
C(3)
C(5)
C(2) C(4)
Figure Function
12.1 Coefficient, Input, Output Buffers
coefficient vector occupies 16-bit entries memory, C(0) stored first location. C(1) only used last stage cascaded filter. input sample buffer circular buffer that contains (M+1) bytes. next sample stored address that follows previous one. output buffer circular buffer that contains (N+1) bytes, next output stored address that follows previous one. Table displays coefficient, input, output buffers.
Table Coefficient, Input, Output Buffers
Coefficients C(0) C(1) C(2) C(3) C(4) C(5) Input Samples x(n-2) x(n-1) x(n) Output Y(n-2) Y(n-1) Y(n)
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Modulation (MOD)-Real Sin, Real Cos, Complex Real/Complex
12.2 Function Descriptor
function descriptor shown Figure
Offset Offset Offset Offset Offset Offset
INDEX TPTR CBASE XYPTR
00111
Offset Offset
Figure Function Descriptor
status control bits offset 0x00) described Table parameter packet consists seven 16-bit entries described Table
Table Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword TPTR CBASE XYPTR Name Description Number iterations cascaded stages) Pointer structure temporary variables used delay line blocks. structure consists real numbers left uninitialized. Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size minimum output buffer size outputs). Reserved
12.3 Applications
used timing recovery interpolating filter, among other things.
Modulation (MOD)-Real Sin, Real Cos, Complex Real/Complex
Using values provided parameter packet, implements basic modulator function, shown Figure with modulation table composed {cos pairs, complex input samples, real outputs. input data circular buffer with size (M+1), output data circular buffer with size (N+1).
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Modulation (MOD)-Real Sin, Real Cos, Complex Real/Complex
X(n) {Complex} {Real}
Y(n) {Real Complex}
Real Real Image Image Real Image Figure Function
13.1 Modulation Table, Input, Output Buffers
modulation table consists 16-bit cosine sine pairs that occupy (K+1) bytes memory. input sample buffer circular buffer containing (M+1) bytes. Each sample pair 16-bit entries (real imaginary components), next sample stored address that follows previous sample. output buffer circular buffer that contain (N+1) bytes, next output stored address that follows previous output. output buffer real complex, depending FD[X]. Table shows modulation table, input, output buffers.
Table Modulation Table, Input, Output Buffers
Modulation Table Input Samples imaginary{x(n-k+1)} real{x(n-k+1)} imaginary{x(n-2)} real{x(n-2)} imaginary{x(n-1)} real{x(n-1)} imaginary{x(n)} real{x(n)} Complex Output, FD[X]=1 imaginary{Y(n-k+1)} real{Y(n-k+1)} imaginary{Y(n-2)} real{Y(n-2)} imaginary{Y(n-1)} real{Y(n-1)} imaginary{Y(n)} real{Y(n)} Real Output, FD[X]=0 real{Y(n-k+1)} real{Y(n-2)} real{Y(n-1) real{Y(n)}
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Modulation (MOD)-Real Sin, Real Cos, Complex Real/Complex
13.2 Function Descriptor
function descriptor shown Figure
Offset Offset Offset Offset Offset Offset
MPTR XYPTR
01000
Offset Offset
Figure Function Descriptor
status control bits offset 0x00) described Table parameter packet consists seven 16-bit entries described Table
Table Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword MPTR XYPTR Name Number iterations Modulation table_size minimum modulation table size sin/cos pairs). Pointer modulation table Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size minimum output buffer size FD[X] outputs). minimum output buffer size FD[X] samples). Reserved Description
13.3 Applications
function used modulation. partial shown Figure used implement modulator.
Offset Offset OPCODE 01000
(Three iterations)
Figure Modulation Example
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DEMOD-Real Sin; Real Cos, Real Complex
DEMOD-Real Sin; Real Cos, Real Complex
Using values provided parameter packet, DEMOD implements basic demodulator function, shown Figure with modulation table composed (cos pairs, real input samples, complex outputs. input data circular buffer with size (M+1), output data circular buffer with size (N+1). parameter controls demodulator gain.
X(n) {Real} {Real} Real Y(n) {Complex}
Image Figure DEMOD Function
14.1 Modulation Table, Input Output Buffers, Constant
modulation table consists 16-bit cosine sine pairs that occupy (K+1) bytes memory. input sample buffer circular buffer containing (M+1) bytes. next 16-bit sample stored address that follows previous sample. output buffer circular buffer that contains (N+1) bytes, next output stored address that follows previous output. constant range AGC1. Table shows DEMOD modulation table, input, output buffers.
Table DEMOD Modulation Table, Input, Output Buffers
Modulation Table Input Samples x(n-k+1) x(n-2) x(n-1) x(n) Output (Complex) imaginary{Y(n-k+1)} real{Y(n-k+1)} imaginary{Y(n-2)} real{Y(n-2)} imaginary{Y(n-1)} real{Y(n-1)} imaginary{Y(n)} real{Y(n)}
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DEMOD-Real Sin; Real Cos, Real Complex
14.2 DEMOD Function Descriptor
DEMOD function descriptor shown Figure
Offset Offset Offset Offset Offset Offset
DPTR XYPTR
01001
Offset Offset
Figure DEMOD Function Descriptor
status control bits offset 0x00) described Table DEMOD parameter packet consists seven 16-bit entries described Table
Table DEMOD Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword DPTR XYPTR Name Number iterations Modulation table_size minimum modulation table size sin/cos pairs). Pointer structure consisting modulation table pointer constant (real) Input buffer_size minimum input buffer size samples). Pointer structure composed input buffer pointer output buffer pointer Output buffer_size minimum output buffer size outputs). Reserved Description
14.3 DEMOD Applications
DEMOD function used modulation. partial shown Figure used implementations.
Offset Offset (Three iterations) OPCODE 01001
Figure DEMOD Modulation Example
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LMS1-Complex Coefficients, Complex Samples, Real/Complex Scalar
LMS1-Complex Coefficients, Complex Samples, Real/Complex Scalar
LMS1 implements basic filter coefficients update. coefficients input samples complex numbers, scalar real complex number. Figure shows LMS1 function.
Figure LMS1 Function
15.1 Coefficients Input Buffers
coefficient vector occupies pairs 16-bit entries (real imaginary components) memory, with C(0) stored first location. input sample buffer circular buffer that contain (M+1) bytes. Each sample pair 16-bit entries (real imaginary components). next sample stored address that follows previous sample.
Table LMS1 Coefficients Input Buffers
Coefficients imaginary{C(0)} real{C(0)} imaginary{C(1)} real{C(1)} imaginary{C(k-1)} real{C(k-1)} Input Samples imaginary{X(n-k+1)} real{X(n-k+1)} imaginary{X(n-2)} real{X(n-2)} imaginary{X(n-1)} real{X(n-1)} imaginary{X(n)} real{X(n)}
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LMS2-Complex Coefficients, Complex Samples, Real/Complex Scalar
15.2 LMS1 Function Descriptor
LMS1 function descriptor shown Figure
Offset Offset Offset Offset Offset Offset
INDEX
01010
CBASE XPTR EPTR
Offset Offset
Figure LMS1 Function Descriptor
status control bits offset 0x00) described Table LMS1 parameter packet consists seven 16-bit entries described Table
Table DEMOD Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword CBASE XPTR EPTR Name Reserved Number_of_taps Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer input buffer pointer Pointer scalar Reserved Description
15.3 LMS1 Applications
LMS1 used updating coefficients echo cancellation.
LMS2-Complex Coefficients, Complex Samples, Real/Complex Scalar
LMS2 implements basic filter coefficients update. sample pointer incremented two, which required fractionally spaced equalizer updates. coefficients input samples complex numbers, scalar real complex number. Figure shows LMS2 function.
Figure LMS2 Function
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LMS2-Complex Coefficients, Complex Samples, Real/Complex Scalar
16.1 LMS2 Coefficients Input Buffers
coefficient vector occupies pairs 16-bit entries (real imaginary components) memory, with C(0) stored first location. sample input buffer circular buffer containing (M+1) bytes. Each sample pair 16-bit entries (real imaginary components). next sample stored address that follows previous sample.
Table LMS2 Coefficients Input Buffers
Coefficients imaginary{C(0)} real{C(0)} imaginary{C(1)} Input Samples imaginary{X(n-k+1)} real{X(n-k+1)} imaginary{X(n-2)} real{X(n-2)} imaginary{X(n-1)} real{X(n-1)} imaginary{X(n)} real{X(n)}
real{C(1)} imaginary{C(k-1)} real{C(k-1)}
16.2 LMS2 Function Descriptor
LMS2 function descriptor shown Figure
Offset Offset Offset Offset Offset Offset Offset Offset
INDEX
01011
CBASE XPTR EPTR
Figure LMS2 Function Descriptor
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Weighted Vector Addition (WADD)-Real Real
status control bits offset 0x00) described Table LMS2 parameter packet consists seven 16-bit entries described Table
Table LMS2 Parameter Packet
Address Hword Hword Hword Hword Hword Hword CBASE XPTR EPTR Name Reserved Number_of_taps Filter coefficient vector base address Input buffer_size minimum input buffer size samples). Pointer input buffer pointer Pointer scalar Reserved Description
Hword
16.3 LMS2 Applications
LMS2 used updating fractionally spaced equalizer coefficients.
Weighted Vector Addition (WADD)-Real Real
Using real, scalar coefficients WADD function generates linear combination real input vectors. Figure shows WADD output vector function input vectors
Figure WADD Function
17.1 WADD Coefficients Input Buffers
Each input vector stored circular buffer containing (M+1) bytes. Each sample 16-bit entry, next sample stored address that follows previous sample. output buffer circular buffer that contains (N+1) bytes. Each output bits, newest output stored address that follows previous one.
Table WADD Modulation Table Sample Data Buffers
Input Samples x1(n-k+1) x1(n-1) x1(n) Input Samples x2(n-k+1) x2(n-1) x2(n) Output Y(n-k+1) Y(n-1) Y(n)
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Weighted Vector Addition (WADD)-Real Real
17.2 WADD Function Descriptor
WADD function descriptor shown Figure
Offset Offset Offset Offset Offset Offset
01100
XYPTR
Offset Offset
Figure WADD Function Descriptor
status control bits offset 0x00) described Table WADD parameter packet consists seven 16-bit entries described Table
Table WADD Parameter Packet
Address Hword Hword Hword Hword Hword Hword Hword Name Number iterations weight coefficient weight coefficient Sample's buffer_size Pointer structure composed input buffer pointer, output buffer pointer, input buffer pointer. Output buffer_size Reserved Description
XYPTR
17.3 WADD Applications
Table shows linear functions available using different values.
Table WADD Applications
Linear interpolation y(n)=x(n) scalar multiply y(n)=x1(n)-x2(n) vector subtract Function
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Performance Using Core Alone Versus Using
Performance Using Core Alone Versus Using
task MPC885 done with core alone with help built-in capabilities CPM. V.32 modem's data pump flow compares performance using core alone versus using CPM. Figure shows filter example application, which consists three subfilters.
INPUT BAUD OUTPUTS BAUD Filter OUTPUTS BAUD
Figure Example Application-Tx Filter
18.1 Filter Example (Core Only)
Implementing filter using following code core takes instructions-371 filter modulation. transmission symbol rate requires running filter 2,400 times second. Thus, implementing filter software alone requires core execute 1.14 million instructions second.
void tx_filter *coefr *samplr, *sampli *coefend; filtoutr, filtouti; subcount, sampleindex; extern mult(S16 p2); in-line invocation
coefr=txfiltcoef_str; coefend=txfiltcoef_end; sampleindex=0; while (coefr<coefend) filtoutr=filtouti=0; subcount=0;
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Performance Using Core Alone Versus Using while (subcount<TXSUBFILTLEN) filtoutr+=mult(*coefr, *samplr-); filtouti+=mult(*coefr++, *sampli-); modbuff[REAL][sampleindex]= filtoutr; modbuff[IMAG][sampleindex++]= filtouti;
void modulator
termrnd; extern mult(S16 p2); in-line invocation
i=0; while (i<SAMPLE_PER_T) sigout[i]= mult(sn1800[REAL][cosindx], modbuf[REAL][i]) mult(sn1800[IMAG][cosindx], modbuf[IMAG][i]); cosindx++; i++;
void main tx_filter();
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Performance Using Core Alone Versus Using modulator();
18.2 Filter Example (Core CPM)
Implementing filter using functions, user software builds static chain functions-an MOD. core activates execute chain with single write command register-START DSP. then signals completion using interrupt.
performance load core from executing filter software negligible. performance load based functions called, number clocks required perform those functions, transmission symbol rate. Using CPM, this filter example consumes 0.55 million clocks second. filter executes three subfilters each time sample arrives, invoking FIR2 function with three-iteration count auto-increment input sample pointer after last iteration. FIR2 writes three subfilter results into output buffer, which then feeds into modulation. Modulation invokes function with three-iteration count. function automatically increments sample pointer each iteration. Figure shows conceptual view filter implementation followed example code.
Dual-Port Output Buffer System Memory Filter Coefficient Table Opcode FIR2 Iterations Taps Coefficient Base Buffer Size XYPTR Buffer Size
Input Buffer Input Pointer Output Pointer
Modulation Table Pointer Opcode Iterations Table Size MPTR Buffer Size XYPTR Buffer Size
Output Buffer
Table
Input Pointer Output Pointer
Figure Core Implementation Filter Example
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Performance Using Core Alone Versus Using Function Descriptors typedef struct dsp_fd unsigned short unsigned short DSP_FD; status; parameter[7];
#define WRAP #define INTR
0x2000 0x1000
wrap interrupt completion
define function opcodes #define FIR_2 #define 0x0102 0x0008 FIR2 filter
Modulation function opcode
Initialize static chain functions DSP_FD filters[2]= FIR_2,P11,P12, P17} ,{(WRAP INTR MOD),P21,P22, P27}
void main() issue command start processing chain issue_command( START_FD
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Function Execution Times Performance Calculation
Function Execution Times Performance Calculation
function's execution time directly related number taps iterations specified. Table lists execution times each function, including overhead context switching, handling initialization.
Table Function Execution Times
Function FIR1 FIR2 FIR3 (i-1) 1.25 (k+1) (i-1) (k+1) (i-1) (k+1) (i-1) (k+1) (i-1) (k+1) (k+1) (k+1) Execution Time
FIR5 FIR6 DEMOD LMS1 LMS2 WADD
Notes: clock wrap, clocks stop, clocks interrupt. number iterations. number taps.
seen Table loading from applications depends which functions called their parameters. frequency with which functions called also affects loading.
Document Revision History
Table provides revision history this addendum.
Table Document Revision History
Revision Number Initial release Significant Changes
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Manuals that this addendum applicable are: MPC885RM, MPC866UM, MP

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