Ngai-Man Cheung ABSTRACT This application report describes implem

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Ngai-Man Cheung ABSTRACT This application report describes implem

Datasheet Thumbnail

Top Searches for this datasheet

MPEG-2 Video Decoder: TMS320C62x Implementation
Ngai-Man Cheung
ABSTRACT This application report describes implementation MPEG-2 video decoder TMS320C62x DSP. MPEG-2 video standard specifies decompression coded representation entertainment-quality digital video, widely used different digital video systems including DVB, DTV, DVD, DSS, etc. decoder software implements MPEG-2 main-profile-at-main-level functionality, conforms eXpressDSPAlgorithm Standard (xDAIS) enhance reusability. This report describes different aspects decoder software, including algorithm overview, coding guidelines, decoder APIs, memory requirement, performance.
Texas Instruments Incorporated
Contents Introduction Algorithm Overview Algorithm Description Interframe Coding Using Motion Compensation Transform Coding Using Discrete Cosine Transform Variable-Length Coding Decoder Implementation Features Decoder Structure Coding Guidelines Interrupt Issues Multichannel Implementation
Interfacing With Decoder Decoder APIs 4.1.1 Input Data 4.1.2 Output Decoded Picture 4.1.3 Output Parameters Example Framework Code Running Program Build Procedure Program Test Validation
Memory Requirements Performance References
eXpressDSP trademark Texas Instruments.
SPRA649
List Figures Figure Figure Figure Figure MPEG-2 Video Decoding Algorithm MPEG-2 Video Decoder Structure Video Decoder Output Parameters Example Framework Interface Video Decoder List Tables Table Memory Requirements Decoder Table Performance Decoder
Introduction
This application report describes implementation MPEG-2 video decoder TMS320C62x DSP. decoder software implements MPEG-2 main-profile-at-main-level functionality, conforms eXpressDSP Algorithm Standard (xDAIS) enhance reusability. following sections will describe different aspects decoder software, including algorithm overview, coding guidelines, decoder APIs, memory requirement, performance.
Algorithm Overview
MPEG-2 video [1,2] standard specifies decompression coded representation entertainment-quality digital video. widely used different digital video systems, including (digital television), (Digital Video Broadcast), (direct satellite system), (digital versatile disc). MPEG-2 video decoder plays important role consumer electronics like players, set-top boxes, units. Compared with hardware implementation, software implementation decoder more flexible, easier customize different applications, easier upgrade with features. Also, programmability device offers advantage putting multiple functions (e.g., video decoding, modem function, speech control interface) same hardware platform. have implemented MPEG-2 main-profile-at-main-level video decoder, which maximum input rate Mbps (megabit second) chrominance format 4:2:0. This most common format being used many applications.
Algorithm Description
Figure shows MPEG-2 video-decoding algorithm. MPEG-2 standard employs number techniques achieve high compression ratio while preserving good video quality.
Interframe Coding Using Motion Compensation
Motion compensation (MC) achieves compression using fact that within short sequence pictures, scenes similar many objects move only short distance. using these temporal redundancies, many parts current picture could predicted previously decoded pictures. picture divided into blocks. Two-dimensional motion vectors computed tell where retrieve blocks pixel values from previously decoded pictures predict block pixels current picture. Compression achieved encoding motion vectors prediction error instead block pixels. prediction error less spatial redundancy compressed effectively transform coding.
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
MPEG-2 video stream
Decode headers Sequence, group pictures, slice, picture headers Decode macroblock mode Macroblock type, motion type, Decode motion vectors Look-up tables Calculate motion vectors Variable-length decoding/inverse quantization coefficients IDCT Motion prediction blocks Prediction errors Motion compensation
Decoded block
Figure MPEG-2 Video Decoding Algorithm
Transform Coding Using Discrete Cosine Transform
During encoding, discrete cosine transform (DCT) applied prediction error interframe coded macroblock pixel values intraframe coded macroblock. picture divided into blocks 8-by-8 pixels. transforms pixel values into another block same size, consisting horizontal vertical spatial frequency coefficients representing detail block. While energy image signal prediction error distributed randomly across block, energy block concentrated frequency. Compression achieved using quantizer with quantization steps varied frequency, according psycho-visual characteristics such that quantization noise unlikely perceived. Also, many high-frequency coefficients very small have value zero after quantization. Compression achieved using zig-zag order gather coefficients value zero, encoding block into series zero-run level pairs with run-length encoding.
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
Variable-Length Coding
variable-length coding (VLC) assigns each run-level pair code word based frequency occurrence pair. Pairs that occur more frequently assigned short code words while those that occur less frequently assigned long code words. Compression achieved fact that overall, more frequent shorter code words dominate.
Decoder Implementation
this section, describe different aspects implementation video decoder.
Features
These features video decoder software:
whole video decoding software-based working programmable DSP. There hardware assistance decoding. This ensures maximum flexibility. decoder completely MPEG-2 main-profile-at-main-level compliant. have tested decoder thoroughly with official MPEG-2 compliance test-streams have verified that decoder completely compliant with specification. This ensures both correctness algorithm implementation quality output picture. decoder could also handle MPEG-1 constrained parameters bit-streams (CPB). decoder xDAIS compliant. implemented xDAIS rules most guidelines. This ensures decoder algorithm easily integrated into different framework systems environments. Please note that xDAIS itself undergo some changes, software will updated reflect these changes. decoder multichannel enabled. decoder reentrant handle several different decoding channels simultaneously (this subject further testing). decoder interrupted place other than software pipeline code. interrupt latency shall less than MHz.
Decoder Structure
decoder divided into following modules (see Figure
VLD, which includes functions perform variable-length decoding, run-length expansion dequantization IDCT, which includes functions perform inverse discrete cosine transform Motion compensation address calculation, which includes functions calculate reference blocks location fetch blocks into internal memory Motion compensation kernel, which includes functions calculate prediction pixels Miscellaneous functions decode header information, motion vectors, etc. Implementation IALG IRTC interfaces required xDAIS
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
modules glued together with decoder control code. control code invokes functions different modules well passes receives data.
IALG
IRTC
Control code
Decode headers, motion vectors,
IDCT
Motion compensation address calculation
Motion compensation kernel
Figure MPEG-2 Video Decoder Structure
Coding Guidelines
decoder program mixed TMS320C62x assembly language implementation. coding follows xDAIS rules. Some them are:
decoder reentrant. data references fully relocatable. Also, decoder code fully relocatable. external definitions prefixed with MPEG2VDEC MPEG2VDEC_ti.
Please refer xDAIS document complete listing coding rules.
Interrupt Issues
decoder interrupted place other than software pipelined loops. maximum interrupt latency less than MHz, recommended xDAIS guideline.
Multichannel Implementation
decoder reentrant used multichannel environment. decoded information each channel retained algorithm instance object, MPEG2VDEC_Handle. Client framework uses decoder's (Application Programming Interfaces) MPEG2VDEC_create create algorithm instance object each decoding channel. After that, framework passes instance object MPEG2VDEC_apply decode picture.
Interfacing With Decoder
decoder configured link some framework systems. latter case, framework decoder's APIs interface with decoder. this section will describe decoder APIs. Also, will give example framework code illustrate interfacing.
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
Decoder APIs
decoder APIs include:
MPEG2VDEC_init
Void MPEG2VDEC_init(Void);
Parameters NULL. Return Value NULL. Description Decoder initialization. Should first call decoder.
MPEG2VDEC_create
MPEG2VDEC_Handle MPEG2VDEC_create( const IMPEG2VDEC_Fxns *fxns, const MPEG2VDEC_Params *prms);
Parameters
Parameter const IMPEG2VDEC_Fxns *fxns const MPEG2VDEC_Params *prms Meaning Functions table Creation parameter
Return Value MPEG2VDEC algorithm instance handle. Description Create algorithm instance object. Call this every decoding channel.
MPEG2VDEC_delete
Void handle);
Parameters
Parameter MPEG2VDEC_Handle handle Meaning MPEG2VDEC algorithm instance handle
Return Value NULL. Description Delete algorithm instance object. Call this after completion decoding channel.
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
MPEG2VDEC_exit
Void MPEG2VDEC_exit(Void);
Parameters NULL. Return Value NULL. Description Decoder finalization.
MPEG2VDEC_apply
Void handle, *input[],Int *output[]);
Parameters
Parameter MPEG2VDEC_Handle handle *input[1] *input[2] *input[3] *output[1] *output[2] Others Meaning MPEG2VDEC algorithm instance handle. Address function code, functionCode. functionCode could FUNC_DECODE_FRAME FUNC_START_PARA. Starting external input bit-stream buffer. Address size external input bit-stream buffer. Address output parameter buffer. Starting external output frame buffer. Reserve framework specific extension.
Return Value NULL. Description This applies decoder input stream outputs result output buffer. function code, input[1], should FUNC_START_PARA beginning video sequence FUNC_DECODE_FRAME afterward. pass-in algorithm instance object identifies decoding channel.
Framework should call MPEG2VDEC_init initialize decoder. After that, framework should call MPEG2VDEC_create create algorithm instance object each channel. algorithm instance object contains status information each decoding channel. Then, framework call MPEG2VDEC_apply apply decoder input stream.
4.1.1
Input Data
Framework passes MPEG-2 input data decoder through input buffer starting input[2] when calling MPEG2VDEC_apply. size input buffer pointed input[3]. input buffer organized circular fashion. Framework responsible filling buffer ensuring enough input data feed decoding picture. Framework learn much input data decoder consumed variable ((DECODE_OUT (output[1]) ->next_wptr which points head circular input buffer. input buffer must multiple bytes aligned 4-byte boundary. recommend input buffer size more. input buffer should reside external memory.
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
4.1.2
Output Decoded Picture
MPEG2VDEC algorithm returns decoded picture output frame buffer pointed output[2] return MPEG2VDEC_apply. algorithm requires keeping four output frames, output frame buffer should size Picture_Size minimum, where Picture_Size Picture_Height Picture_Width 1.5. Moreover output frame buffer aligned 4-byte boundary. recommend output buffer size 2440 which handle 720x576 4:2:0 video properly. output picture stored 4:2:0 YU12 format. When algorithm returns, client should check variable ((DECODE_OUT (output[1]) ->outputting) decoded picture ready, output picture could found memory location ((DECODE_OUT (output[1]) ->outframe). output picture always frame format. This avoid confusion decoding interlaced video when output picture frame field format within same sequence.
4.1.3
Output Parameters
decoder returns output parameter output[1] return MPEG2VDEC_apply. parameter either structure START_OUT beginning sequence DECODE_OUT afterward, shown Figure
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
Output parameter beginning sequence. typedef struct _START_OUT fault; ld_mpeg2; bit_rate; picture_rate; vertical_size; horizontal_size; coded_picture_width; coded_picture_height; chroma_format; chrom_width; prog_seq; START_OUT; Output parameter afterward. typedef struct _DECODE_OUT fault; pict_type; pict_struct; next_wptr; topfirst; end_of_seq; outputting; SmUns outframe; DECODE_OUT; sequence? Output frame? Head cir. input problem occur? B-pic. Progressive seq.? Coded pic. dimension problem occur? MPEG-2 stream? Input rate Output picture rate Ori. pic. dimension
Starting pic.
Figure Video Decoder Output Parameters
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
Example Framework Code
Figure shows example framework code illustrate usage decoder's APIs.
#define SHARE_MPEG2_RDBUF_SIZE (128 1024) unsigned 512KB input buffer. 4-bytes alignment. #define MAX_PICT_SIZE 0x098800 610KB. Enough 720x576 4:2:0. #define NO_OF_FRAME_BUF unsigned char MAX_PICT_SIZE]; Output buffer. 4-bytes alignment. #define MAXPARAM *in[MAXPARAM]; *out[MAXPARAM]; h_share_mpeg2_rdbuf_size SHARE_MPEG2_RDBUF_SIZE; functionCode; MPEG2VDEC_Handle mpeg2vdec; fill whole input buffer old_ptr head circular buffer MPEG2VDEC_init(); mpeg2vdec NULL); in[1] &functionCode; out[1] (int &out_para[0]; in[2] (int &share_bsbuf_storage[0]; out[2] (int &frame_all_storage[0]; in[3] &h_share_mpeg2_rdbuf_size; functionCode FUNC_START_PARA; MPEG2VDEC_apply(mpeg2vdec, out); decode sequence header while (decode_out-> end_of_seq) sequence functionCode FUNC_DECODE_FRAME; MPEG2VDEC_apply(mpeg2vdec, out); decode picture decode_out (DECODE_OUT *)(out[1]); (decode_out-> outputting) output frame starting location decode_out-> outframe fill input buffer between old_ptr decode_out->next_wptr from source old_ptr decode_out->next_wptr; while MPEG2VDEC_delete(mpeg2vdec); MPEG2VDEC_exit(); program
Figure Example Framework Interface Video Decoder
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
Running Program
This section describes procedure build video decoder.
Build Procedure
build code: Compile assemble individual files with cl6x -@cl.cmd Code Composer Studio(CCS) project file Mpg2vdec.mak. Create decoder library Mpeg2vdec_ti.lib with ar6x @ar.cmd Link decoder library with target system. code directories contain files compile, assemble, link decoder. project file Mpg2vdec.mak compiles assembles source files, links them with linker file Mpg2vdec.cmd produce example stand alone executable Mpg2vdec.out. executable Mpg2vdec.out loaded into tested with WindowsGUI interface program. object files also packaged into decoder library Mpeg2vdec_ti.lib using ar6x command linked target system following above steps.
Program
example executable: Load start executable Mpg2vdec.out using evm6xldr. Start Windows interface program Mplay.exe. Mplay.exe program, select File Open, choose MPEG-2 video file. Mplay.exe program, select Control Play start decoding. have MicrosoftDirectDrawsoftware package your computer, then would able decoded video.
Test Validation
have tested decoder thoroughly with official MPEG-2 compliance test streams have verified that decoder completely compliant with requirements. This ensures both correctness algorithm implementation quality output picture.
Code Composer Studio trademark Texas Instruments. Windows, Microsoft, DirectDraw registered trademarks Microsoft Corporation.
MPEG-2 Video Decoder: TMS320C62x Implementation
SPRA649
Memory Requirements Performance
section reports memory requirements performance decoder. Table lists data program memory requirements. Table Memory Requirements Decoder
Internal Memory External Memory 3022848 (2952
Data Memory Heap data memory Stack space data memory Static data memory Total Program Memory Total
7552 (7.4 16384 10616 (10.4 34552 (33.8 65504
3022848 (2952 26432
external memory includes input bit-stream buffer output frame buffers. They allocated framework passed decoder arguments MPEG2VDEC_apply. have benchmarked video decoder with several MPEG-2 video streams. results shown Table decoder software benchmarked C6201 with internal memory configured mapped mode (cache disabled). performance interpreted cycle count measured CCS. Please contact Texas Instruments latest performance information. Table Performance Decoder
Test Stream Public domain MPEG-2 stream test stream test stream MPEG-2 compliance test stream Information Mobl_080.m2v. Available from http://www.mpeg.org. Vts_05_1.vob Panasonic Demonstration Disc. Vts_40_1.vob Philips Demonstration Disc. Bitstream gi_9.m2v MPEG-2 test suite. Format 704x576 x25fps 720x480 x30fps 720x576 x25fps 720x480 x30fps Bit-rate (Mbps) 7.629 9.346 9.346 14.305 Numbers picture 10000 1000 Performance (MHz) Max. Max. Max. Max.
References
ISO/IEC 11172-2, Coding moving pictures associated audio digital storage media about 1.5Mbits/s, Part Video (MPEG-1 video standard). ISO/IEC 13818-2, Generic coding moving pictures associated audio information, Part Video (MPEG-2 video standard). Texas Instruments, eXpressDSP Algorithm Standard (xDAIS): Rules Guidelines, September 1999 (SPRU352).
MPEG-2 Video Decoder: TMS320C62x Implementation
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgement, including those pertaining warranty, patent infringement, limitation liability. warrants performance semiconductor products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS INVOLVE POTENTIAL RISKS DEATH, PERSONAL INJURY, SEVERE PROPERTY ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). SEMICONDUCTOR PRODUCTS DESIGNED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION PRODUCTS SUCH APPLICATIONS UNDERSTOOD FULLY CUSTOMER'S RISK. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. TI's publication information regarding third party's products services does constitute TI's approval, warranty endorsement thereof.
Copyright 2000, Texas Instruments Incorporated

Ngai-Man Cheung ABSTRACT This application report describes implem

Top Searches for this datasheet

Other recent searches