MC92603 Quad Design Verification Board User's Guide Device Suppor
|
|
|
Top Searches for this datasheet
MC92603DVBUG 3/2004 Rev.
MC92603 Quad Design Verification Board User's Guide
Device Supported: MC92603
More Information This Product, www.freescale.com
Contents
Paragraph Section Number Title Chapter General Information
Contents
Page Number
Introduction. Features Specifications. Block Diagram Board Components Abbreviation List Related Documentation. Contact Information Chapter Hardware Preparation Installation
2.3.1 2.3.2 2.4.1 2.4.2 2.4.3 2.4.4 2.4.5 2.5.1 2.5.1.1 2.5.1.2 2.5.2 2.5.3
Unpacking Instructions MC92603DVB Package Contents Hardware Preparation Setting Power Supply Voltage Regulators Setting Voltage Regulators. Reference Clock Source. Using Onboard Oscillators. External Reference Clock Source Supplying Clock MC92603 3.3V_CLK_OUTn Connectors Clock Frequency Selection Interface Components Parallel Inputs Outputs. Parallel Inputs Parallel Outputs +VDDQ Ground (GND) Access Connections. Serial Inputs Outputs. Special Application Connections. Special Test Connection. Test Traces
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Contents
Paragraph Number Title Chapter Laboratory Equipment Quick Setup Evaluation 3.2.1 3.2.1.1 3.2.1.2 3.2.1.3 3.2.2 3.2.2.1 3.2.2.2 3.2.2.3 Recommended Laboratory Equipment Quick Setup Data-Eye Diagram Quick Setup Data-Eye Generation Observation Equipment Setup. Parallel Input Connections. Basic Observation-Test Procedure. Quick Setup Error Rate Checking. Equipment Setup. Parallel Connections. Quick Setup BERC Test Procedure Chapter Test Setups 4.1.1 4.1.2 4.2.1 4.2.2 4.2.3 4.2.4 Serial Link Verification Using Serial Error Rate Tester (BERT) Test Setup Full-Speed Mode Test Setup Half-Speed Modes Jitter Testing. Jitter Test System Calibration Reference Clock Jitter Transfer Test. Reference Clock Jitter Tolerance Test Data Jitter Tolerance Test. Appendix Connector Signals A.1.1 A.1.2 Input: (0.100") Connectors. Control Signal Input Connectors Transmitter Parallel Data Input Connectors Output: (0.100") Connectors JTAG_0 Connector MDIO Connector SFP_CTRL Connectors Appendix Parts List Design Verification Board Parts List .B-1 Page Number
MOTOROLA
Contents
More Information This Product, www.freescale.com
Contents
Paragraph Number Title Appendix Prescaler Jitter Measurement Divide-by-xx Prescaler Description .C-1 Prescaler Components.C-2 Appendix Revision History Page Number
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Chapter General Information
Introduction
This user's guide describes MC92603DVB design verification board MC92603 integrated circuit. should read conjunction with MC92603 Quad Gigabit Ethernet Transceiver Reference Manual. design verification board (DVB) facilitates full evaluation MC92603 Quad Gigabit Ethernet transceiver (GEt). intended evaluation testing purposes only. Motorola does guarantee performance production environment. This board designed used with laboratory equipment (pattern generators, data analyzers, BERT, scopes, connected other evaluation boards. Access MC92603 device (verification chip) through connectors each pin, allow complete in-depth `design verification' testing chip design. This allows user check features/functions MC92603 device. parallel data input ports, configuration/control signal pins, accessed through common 0.100" male connectors (headers). parallel data output ports accessed through 0.100" connectors. Device JTAG MDIO port signals also accessed with separate connectors. MC92603 high-speed serial receivers transmitters accessed through coaxial connectors signal integrity measurements. Gigabit Ethernet fiber media evaluations made with provided small form-factor pluggable (SFP) socket DVB, (multi-source agreement) compliant transceiver. this socket, four short coax cables required connect socket device's transmitter receiver connectors. single 5.0-V power source required operation. necessary voltages generated regulators onboard. reference clock MC92603 chip provided using either external clock onboard crystal oscillator. Clock drivers provide additional clock signals triggering analyzer instrumentation scopes.
MOTOROLA
Chapter General Information
More Information This Product, www.freescale.com
Features
Features
single external 5.0-V onboard regulators supply power onboard circuitry. Reference clock source 250-MHz crystal oscillator external clock source IEEE 802.3-2002® compliant GMII interfaces accessible through standard 0.100", connectors data generators analyzers Full-duplex differential data links accessible through connectors pairs test traces with connections facilitate measurements characteristic impedance representative board traces. Connectors provided JTAG MDIO ports sockets provided MSA-compliant fiber modules IEEE 1394b (bilingual) sockets provided standard cable links
functional, physical, performance features MC92603DVB follows:
Specifications
Table 1-1. MC92603DVB Design Verification Board Specifications
Characteristics Specifications typical 0.15 MAPBGA 0°-30°C FR-4 Height Width Thickness 14.1", 10.0", 0.062", Four ground planes, split power plane, three signal routing layers, bottom component layers with some additional signal routing
MC92603DVB design verification board specifications provided Table 1-1.
Board revision External power supply Support circuit regulator MC92603 core link regulator Interface (VDDQ) regulator MC92603 package Operating temperature Material Dimensions
Conducting layers
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Block Diagram
Block Diagram
3.3V_CLK_OUT1 +VDDQ/GND PG14 0.100" Connector TST1 TST2 Vertical Test Traces DIFF_CLK_OUT_P DIFF_CLK_OUT_N TST5 TST6 RECV_A Status LEDs RECV_B Status LEDs +3.3 +VDDQ R22V1 +2.5- 3.5-V Regulator +3.3-V Regulator MC100 ES6222 MPC9456 R12V T3,4 CLK_IN X-TAL X-TAL 3.3V_CLK_OUT2 3.3V_CLK_OUT3 3.3V_CLK_OUT4
RECV_C Status LEDs
RECV_D Status LEDs
R22V +1.8 +1.8-V Regulator
0.100" Connectors
RECV_A RECV_B RECV_C RECV_D
REF_CLK
RLINK_A XLINK_A RLINK_B XLINK_B
PG10 0.100" Connectors PG11 PG15 CLK_A_PG CLK_B_PG CLK_C_PG CLK_D_PG TST3 TST4 Horizontal Test Traces TST7 TST8
XMIT_A A_XCLK XMIT_B B_XCLK XMIT_C C_XCLK XMIT_D D_XCLK
MC92603
RLINK_A XLINK_A RLINK_B XLINK_B
Control JTAG
MDIO 0.100" Connectors PG12 PG16
PG13
1394b 1394b
0.100" Connectors
Figure 1-1. MC92603DVB Design Verification Board Block Diagram
MOTOROLA
Chapter General Information
More Information This Product, www.freescale.com
Board Components
Board Components
Table list major components MC92603DVB design verification board. complete parts listing found Appendix "Parts List."
Table 1-2. Major Board Components
Component MC92603VF 0.100" connectors 0.100" connectors Description Motorola quad Gigabit Ethernet transceiver SerDes PG1-PG11, PG8-PG13, PG15 provide access parallel inputs control signals. LA1-LA4 provide access parallel outputs. PG12, PG16, PG14 provide access connector +VDD/ground planes, respectively. SMA1-SMA8: Serial transmit receive connections TST1-TST8: Impedance test trace connections CLK_OUT1-CLK_OUT4, DIFF_CLK_OUT_P Reference clock outputs CLK_IN: External reference clock input CLK_A_PG, CLK_B_PG, CLK_C_PG, CLK_D_PG: Input clock connectors Provide connections optical modules Provide serial interface `Firewire' type cable VR33, VR18, VR1: +3.3 +1.8 +VDD voltage regulators R12V, R22V, R22V1: Potentiometers setting +3.3 +1.8 +VDD voltage levels Onboard 250-MHz crystal oscillator Divide-by-1 divide-by-2 clock buffer +3.3-V LVCMOS clock buffer
0.100" connectors connectors
connector IEEE 1394b bilingual connector LT1587 voltage regulators Potentiometers XTAL oscillator MC100ES6222 clock buffer MPC9456 clock buffer
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Abbreviation List
Abbreviation List
Table 1-3. Acronyms Abbreviated Terms
Term BIST Meaning High logic level (nominally logic level (nominally Built-in self-test Design verification board Interface Management data input/output port Multi-source agreement connection Pseudo-noise Pseudo random sequence Small form-factor pluggable (fiber optics module) Test access port Time delay reflectometry Peak-to-peak unit interval
Table contains abbreviations used this document.
MDIO PRBS UIp-p
Related Documentation
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual (MC92603RM) MC92603DVB schematics MC100ES6222 data sheet MPC9456 data sheet IEEE 802.3-2002, Part Carrier sense multiple access with collision detection (CSMA/CD) access method physical layer specifications
Related documentation includes following:
Contact Information
questions concerning MC92603 design verification place order kit, contact local Motorola field applications engineer.
MOTOROLA
Chapter General Information
More Information This Product, www.freescale.com
Chapter Hardware Preparation Installation
This chapter provides instructions unpacking, hardware preparation, configuration installation, description interface components MC92603DVB.
Unpacking Instructions
Unpack board from shipping carton. Refer packing list verify that items present. Save packing material storing reshipping equipment.
MC92603DVB Package Contents
Table 2-1. MC92603DVB Contents
Qty. Item MC92603DVB design verification board MC92603DVBUG Quad Design Verification Board User's Guide MC92603 Quad Gigabit Ethernet Transceiver Reference Manual Complete MC92603DVB design verification board schematics 0.100" shunts Square receptacle patch cords
Table describes contents MC92603DVB kit.
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Hardware Preparation
Hardware Preparation
Operation MC92603DVB requires proper setup power supply voltage regulators well reference clock. Figure depicts location major components board. following sections describe proper setup MC92603DVB.
+3.3-V Power Connection Clock Buffers External Clock Inputs VDDQ Power Connection Switch Diff Clock Buffered Outputs Crystal Oscillator +5-V Power Connectors +1.8-V Power Connectors Voltage Regulators
Buffered Clock Outputs
Horizontal Test Traces Connectors
Vertical Test Traces
Connectors
MC92603
Receiver Status LEDs
Serial Differential Connectors
Connectors 1394 Socket
Connectors
Module Sockets 1394 Sockets
Connectors Connectors Modules Connectors 1394 Socket
Figure 2-1. Side Part Location Diagram
MOTOROLA
Chapter Hardware Preparation Installation
More Information This Product, www.freescale.com
Reference Clock Source
2.3.1
Setting Power Supply Voltage Regulators
MC92603DVB requires single +5.0-V supply. Fully operational, board will draw maximum current less than from +5.0-V supply. Actual current consumption depends user-set voltage levels, clock frequencies, module, MC92603 operating mode. board contains +5.0-V connection posts ground connection posts. These duplicate connections simplify using four-wire supply: supply ground, force sense.
2.3.2
Setting Voltage Regulators
+5.0-V supply powers three onboard voltage regulators, VR33, VR18, VR1. These regulators generate +3.3, +1.8, +2.5/3.3 (VDDQ), respectively. +3.3-V supply provides power oscillator, clock buffer chips, drivers, power source sockets. This supply varied over range +3.3 using R12V potentiometer. +1.8-V supply powers MC92603 core logic, transceivers, on-chip phase-locked loop (PLL). This regulator adjusted over range +1.8 0.15 using R22V. VDDQ supply powers MC92603 control signal, parallel input, output interface circuitry. This voltage level determined desired logic interface. supply adjusted using R22V1 potentiometer from nominal +2.5 +3.3 +3.3-V, +1.8-V, +VDDQ supplies accessible through connection posts. Note that these regulators should voltage limits within operating ranges described MC92603 Quad Gigabit Ethernet Transceiver Reference Manual. Failure operate within these ranges could cause damage MC92603. Motorola does guarantee MC92603 operation beyond ranges specified. R12V, R22V, R22V1 potentiometers will factory +3.3, +1.8, +3.3 respectively.
Reference Clock Source
Through combination clock buffers, reference clock supplied MC92603 several output connectors. input reference clock MC92603 supplied either using onboard crystal oscillator, directly driving external reference clock into board's clock buffer circuit through connector, CLK_IN. When selecting reference oscillators external reference frequencies, only those frequencies listed MC92603 Quad Gigabit Ethernet Transceiver Reference Manual considered valid. Motorola does guarantee operation MC92603 frequencies other than those listed reference manual. switch settings select either onboard oscillator external reference, well enable clock buffer chips.
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
clock circuitry MC92603DVB shown Figure 2-2.
250-MHz Oscillator CLK_IN CLK_0 CLK_1 CSEL MPC9456 MC100ES6222 REF_CLK_P REF_CLK_N
Reference Clock Source
DIFF_CLK_OUT_P DIFF_CLK_OUT_N
3.3V_CLK_OUT1 3.3V_CLK_OUT2 3.3V_CLK_OUT3 3.3V_CLK_OUT4 TTL_REF_CLK
Figure 2-2. Clock Circuitry
2.4.1
Using Onboard Oscillators
There available positions using onboard oscillators. standard 14-pin socket available board allow user easily change frequencies swapping crystal oscillators with other values. onboard oscillators must times desired MC92603 reference clock frequency. default reference clock frequency oscillator supplied with board MHz. Crystal oscillators used with this board should have +3.3-V complementary PECL outputs capable driving line terminated with Oscillators conforming these specifications available surface mount packages soldered onto underside MC92603DVB location This oscillator, then enabled placing switch `on' position. Both types crystal oscillators available from external vendors variety frequencies. shipped with either oscillator installed. When using oscillator, oscillator must removed from socket. Once either type oscillator installed, switch must placed `on' position select onboard oscillator.
MOTOROLA
Chapter Hardware Preparation Installation
More Information This Product, www.freescale.com
Reference Clock Source
2.4.2
External Reference Clock Source
input reference clock also supplied using external reference clock into clock buffer circuit board through CLK_IN connector. supply external reference clock, switch number must `off' position. user must then supply 1.0-Vp-p input clock through connector. CLK_IN input coupled board and, therefore, does require biasing input signal. This external clock input also terminated with impedance.
2.4.3
Supplying Clock MC92603
input reference clock, from either onboard oscillator external source, applied MC100ES6222 clock buffer. This buffer input clock select multiplexer programmable divide-by-one/divide-by-two function. buffer also contains master reset (Enable). recommended that this reset, found switch activated, then deactivated after changing divide-by-xx switch. This will ensure proper frequency generation. MC100ES6222 PECL outputs provide differential reference clock MC92603 (REF_CLK_P REF_CLK_N) also MC9456 fanout buffer. When using default 250-MHz clock, switch position must `off' divide-by-2 provide MC92603. differential output pair, DIFF_CLK_OUT_P/ DIFF_CLK_OUT_N, also provided with external equipment.
2.4.4
3.3V_CLK_OUTn Connectors
Four single-ended, 3.3-V level clock signals available connectors drive other instruments. Between MC100ES6222 output four SMAs MPC9456 that performs differential PECL single-ended +3.3-V LVTTL/CMOS level shift. These CMOS outputs series terminated board connected connectors labeled 3.3V_CLK_OUT1, 3.3V_CLK_OUT2, 3.3V_CLK_OUT3, 3.3V_CLK_OUT4. outputs MPC9456 disabled setting switch SW1, switch `off' position.
2.4.5
Clock Frequency Selection
accommodate fact that MC92603 receive data both edges reference clock (DDR) many pieces test equipment single-edge triggered (SDR), MC92603DVB clock outputs programmed either same supplied frequency half supplied frequency setting SW1, switches either `on' (divide-by-1) `off' (divide-by-2). This allows interface between board bench either single data rate (SDR) with double-speed clock, double data rate (DDR) with single-speed clock.
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Reference Clock Source
outputs 3.3V_CLK_OUT1 3.3V_CLK_OUT2 programmed setting SW1, switch 3.3V_CLK_OUT3 3.3V_CLK_OUT4 outputs programmed setting SW1, switch Table lists switch positions output frequencies. input frequency, CLK_IN refers either onboard oscillator frequency externally applied clock source frequency. NOTE Only those frequencies listed MC92603 Quad Gigabit Ethernet Transceiver Reference Manual considered valid. Motorola does guarantee operation MC92603 frequencies other than those listed reference manual.
Table 2-2. Settings Output Frequencies
Switch Switch Position MC92603 REF_CLK_P, REF_CLK_N, DIFF_CLK_OUT_P/N CLK_IN CLK_IN/2 3.3V_CLK_OUT1, 3.3V_CLK_OUT2 CLK_IN CLK_IN/2 3.3V_CLK_OUT3, 3.3V_CLK_OUT4 CLK_IN CLK_IN/2
Table depicts settings using onboard oscillator with divide-by-2 function MC92603 3.3V_CLK_OUTn outputs. 3.3V_CLK_OUT1 3.3V_CLK_OUT2 outputs enabled divide-by-1 function. 3.3V_CLK_OUT3 3.3V_CLK_OUT4 outputs also enabled divide-by-2 function.
Enabled Clk_In Clk_In Enabled Clk_In Onboard Reset Clk_In/2 Clk_In/2 Reset Clk_In/2 External MPC9456 Output ENABLE_B 3.3V_CLK_OUT3/ _OUT4, Frequency Select 3.3V_CLK_OUT1/_OUT2, Frequency Select MC100ES6222 Reset MC92603 REF_CLK, Frequency Select Onboard/External CLK_IN Select Alternate Oscillator ENABLE
Figure 2-3. Reference Clock Selection Example Switch Settings
MOTOROLA
Chapter Hardware Preparation Installation
More Information This Product, www.freescale.com
Interface Components
Interface Components
following sections list descriptions MC92603DVB interface connector components.
2.5.1
Parallel Inputs Outputs
MC92603 parallel supplied VDDQ voltage regulator (set rail-to-rail signal swing. MC92603DVB shipped with VDDQ
2.5.1.1
Parallel Inputs
parallel inputs, both data control, accessible through 0.100" connectors. Figure depicts 0.100" connector numbering scheme, with being labeled board. complete mapping MC92603 inputs 0.100" connectors listed Appendix "Connector Signals." Note that even number pins connected ground.
Figure 2-4. 0.100" Input Connector Numbering Scheme (Top View)
description input functionality MC92603, refer MC92603 Quad Gigabit Ethernet Transceiver Reference Manual.
2.5.1.2
Parallel Outputs
parallel outputs, both data status bits, present four 0.100" connectors. Figure depicts 0.100" output connector numbering scheme, with labeled board. parallel output signals MC92603 2.5- 3.3-V logic compatible depending setting VDDQ regulator. complete mapping MC92603 outputs 0.100" connectors listed Appendix "Connector Signals." Note that even number pins connected ground.
Figure 2-5. 0.100" Output Connector Number Scheme (Top View)
information regarding MC92603 outputs, refer MC92603 Quad Gigabit Ethernet Transceiver Reference Manual.
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Special Application Connections
2.5.2
+VDDQ Ground (GND) Access Connections
MC92603DVB also 0.100" connector, PG14, with dedicated connections +VDDQ ground planes. These useful biasing parallel input signals using jumper cables. number pins connected VDDQ plane. even number pins connected ground (0.0 plane.
2.5.3
Serial Inputs Outputs
MC92603 high-speed serial differential inputs outputs connected appropriately labeled pairs connectors through board traces with characteristic impedance (100- differential). output driver requires parallel termination mid-rail (+0.9 nominal +1.8-V supply). termination voltage +0.9 signal must coupled. There coupling blocking) serial outputs board. needed, coupling must done in-line before termination. During testing, serial transmitter outputs should terminated with This done connecting serial transmitter outputs serial receiver inputs, laboratory equipment with input impedance through in-line coupling terminating outputs with terminations.
Special Application Connections
There four sets special connectors provided application interface evaluation. pair Gigabit Ethernet sockets provided with connections connect MC92603DVB serial links then perform evaluation testing with fiber optic interface. user must supply module. provided with MC92603DVB. Each socket it's control interface connector, SFP0_CTRL SFP1_CTRL. mapping these 0.100" connectors listed Appendix "Connector Signals." Likewise, pair IEEE Std. 1394B sockets (bilingual version) provided with connections connect MC92603 serial links perform testing with standard patch cords. (Note that there slight impedance mismatch, 1394 cables 110- differential.)
MOTOROLA
Chapter Hardware Preparation Installation
More Information This Product, www.freescale.com
Special Test Connection
Special Test Connection
MC92603DVB also contains oscilloscope test socket, labeled TPA. When MC92603 configured factory test mode, this test socket enables special access PLL. NOTE This test mode factory testing purposes only. There system applications this mode, test socket should remain unconnected times.
Test Traces
MCS92610DVB design verification board both vertical horizontal test traces: Vertical: TST1-TST5 TST2-TST6 14.59 inches long. Horizontal: TST3-TST7 TST4-TST8 10.51 inches long.
These traces used determine impedance board using measurement techniques. NOTE vertical test traces should used differential pair. When doing measurements, observe difference propagation delays. This TST1-TST5 trace being bottom surface layer (10) TST2-TST6 being embedded signal layer (6). horizontal test traces used differential pair located same embedded signal layer (8).
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Chapter Laboratory Equipment Quick Setup Evaluation
This chapter begins with listing recommended test equipment needed perform complete evaluations MC92603. Chapter "Test Setups," covers specific setup configurations this equipment depending desired feature under test. Appendix "Parts List," offers various suggested data test patterns that used with these test setups. quick setup evaluation procedures outlined below describe MC92603DVB used evaluate data `eye diagram' simple error rate test using internal test features MC92603 with minimal amount test equipment. Only power supply sampling oscilloscope required. Details testing specific systems left user. more information regarding MC92603 feature set, refer MC92603 Quad Gigabit Ethernet Transceiver Reference Manual.
Recommended Laboratory Equipment
Evaluation MC92603 feature possible using MC92603DVB evaluation conjunction with several pieces test equipment. quick setup evaluations other tests listed this guide utilize basic test equipment listed Table 3-1. Equivalent instrumentation substituted. pieces test equipment necessary tests.
Table 3-1. Recommended Test Equipment
MC92603DVB evaluation Tektronix 8000 digital sampling oscilloscope Tektronix 80E04 TDR/sampling head GHz) Tektronix 80E03 sampling heads GHz) Hewlett-Packard HP16700 logic analysis system Hewlett-Packard HP16522A pattern generators Hewlett-Packard HP16557D logic analyzers Hewlett-Packard HP6624A system power supply Item
MOTOROLA
Chapter Laboratory Equipment Quick Setup Evaluation
More Information This Product, www.freescale.com
Recommended Laboratory Equipment
Table lists laboratory accessories.
Table 3-2. Accessories
male each coax patch cords, lengths: various 3-dB attenuators 6-db attenuators blockers couplers) terminations ground) feed through terminations 5/16" torque wrench (fits SMA, 2.9- 3.5-mm connectors) Bias-T networks
Power splitters adapters female female adapters male male adapters optical modules (Agilent: HFBR5710L)
In-depth testing MC92603 performed using error rate tester jitter analysis system. Table provides listing test equipment that used these types tests.
Table 3-3. Jitter Analysis Test Equipment
each Item Agilent 71500C jitter analysis system 70820A microwave transition analyzer 70004A display 3325B synthesizer/function generator 83752A synthesized sweeper 86130A BitAlyzer (serial error rate tester) 70874C jitter personality card Assorted bandpass filters Rohde Schwarz SMIQ-04B signal generator Agilent 6624A system power supply Agilent 11636B power splitter Divide-by-xx prescalers
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
Quick Setup Data-Eye Diagram
MC92603DVB design evaluation comes equipped immediately demonstrate MC92603 functions: Data-eye signal generation observation error rate checking using internal built-in self-test (BIST) features
3.2.1
Quick Setup Data-Eye Generation Observation
transmitted data-eye observed either serial outputs MC92603 using integrated, 23rd order, pseudo-noise (PN) pattern generator. implementation 23-bit generator uses following polynomial:
Stimulus from this generator also used further system testing. Refer MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, more information.
3.2.1.1
Equipment Setup
Generation observation data-eye produced on-chip generator requires only MC92603DVB, power supply, high-speed digital sampling scope, 0.100" shunts single-pin receptacle patch cords. MC92603DVB test equipment should connected shown Figure 3-1. Configure clock circuits with SW1, shown Figure 2-3. NOTE unconnected serial transmitter outputs should terminated This done connecting serial transmitter outputs serial receiver inputs terminations through in-line coupling blocking).
MOTOROLA
Chapter Laboratory Equipment Quick Setup Evaluation
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
+5-V Supply CLK_OUT1 XMIT_x_P XMIT_x_N
1357
MC92603DVB
TRIG Blocker
Blockers
Figure 3-1. Data-Eye Observation Setup
3.2.1.2
Parallel Input Connections
basic diagram will generated biasing parallel inputs according Table 3-4. Ground connections made using 0.100" shunts. Connections VDDQ made using square receptacle patch cords jumpering number pins header PG14. shunts patch cords provided with MC92603DVB kit. even number pins connector headers connected board's ground plane. unlisted pins connected. signal pins five connectors: CNTRL_SIG_0, CNTRL_SIG_1, CNTRL_SIG_2, JTAG, MDIO have pullup resistors VDDQ. making connection (N/C) these pins, they effectively biased high, logic `1.' Using shorting shunt will bias them low, logic `0.' signal pins channels x_XMIT x_XCLK connectors have pullup resistors and, therefore, need biased high with jumper connections VDDQ biased with shorting shunts. Using jumper wire RESET (connector CTRL_SIG_0, connecting access connector PG14 will allow MC92603 held reset mode (connected ground) released (connected VDDQ).
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
Table shows initial configuration input biasing MC92603DVB shipped from factory. Test configurations this document will necessitate insertion removal shorting shunts shown. tests performed with pattern generators data analyzers, shunts will need removed.
Table 3-4. Parallel Input Biasing Shipped
Signal CTRL_SIG_0 REPE RCCE RECV_CLK_CENT ADIE RESET STNDBY CTRL_SIG_1 LBOE USE_DIFF_CLK MEDIA TBIE COMPAT JPAK RECV_REF_A XMIT_REF_A CTRL_SIG_2 BSYNC DROP_SYNC TST_1 TST_0 WSYNC1 WSYNC0 ENABLE_AN Jumper Bias Level Signal A_XMIT XMIT_A_0 XMIT_A_1 XMIT_A_2 XMIT_A_3 XMIT_A_4 XMIT_A_5 XMIT_A_6 XMIT_A_7 B_XMIT XMIT_B_0 XMIT_B_1 XMIT_B_2 XMIT_B_3 XMIT_B_4 XMIT_B_5 XMIT_B_6 XMIT_B_7 C_XMIT XMIT_C_0 XMIT_C_1 XMIT_C_2 XMIT_C_3 XMIT_C_4 XMIT_C_5 XMIT_C_6 XMIT_C_7 Bias Level Signal A_XCLK GTX_CLK_0
XCVR_A_DISABLE
Bias Level
XMIT_A_CLK XMIT_A_K XCVR_A_LBE XMIT_A_ENABLE (bit XMIT_A_ERR (bit B_XCLK GTX_CLK_1
XCVR_B_DISABLE
XMIT_B_CLK XMIT_AB XCVR_B_LBE XMIT_B_ENABLE (bit XMIT_B_ERR (bit C_XCLK GTX_CLK_0
XCVR_C_DISABLE
XMIT_C_CLK XMIT_C_K XCVR_C_LBE XMIT_C_ENABLE (bit XMIT_C_ERR (bit
MOTOROLA
Chapter Laboratory Equipment Quick Setup Evaluation
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
Table 3-4. Parallel Input Biasing Shipped (continued)
Signal JTAG XCVR_A_RSEL XCVR_B_RSEL BROADCAST ENAB_RED TRST MDIO MD_CLK MD_ENABLE MD_DATA MD_ADR_2 MD_ADR_3 MD_ADR_4 Bias Level Signal D_XMIT XMIT_D_0 XMIT_D_1 XMIT_D_2 XMIT_D_3 XMIT_D_4 XMIT_D_5 XMIT_D_6 XMIT_D_7 SFP0_CTRL MOD_DEF_0 MOD_DEF_1 MOD_DEF_2 RATE_SELECT TX_DISABLE Bias Level Signal D_XCLK GTX_CLK_1 XCVR_D_DISABLE XMIT_D_CLK XMIT_D_K XCVR_D_LBE XMIT_D_ENABLE (bit XMIT_D_ERR (bit SFP1_CTRL MOD_DEF_0 MOD_DEF_1 MOD_DEF_2 RATE_SELECT TX_DISABLE Bias Level
3.2.1.3
Basic Observation-Test Procedure
Connect MC92603DVB test equipment described Figure Table 3-4. This will place MC92603 generation mode with MC92603 reset. Steps skipped they were previously performed when setting DVB. Apply +5.0 evaluation board. Verify voltage levels +3.3 +1.8 +VDDQ (3.3 regulators connectors respectively. necessary, adjust R12V, R22V, R22V1 obtain desired voltage levels. Verify that reference clock frequency CLK_OUT1 (period ns). Observe XMIT_x_P XMIT_x_N output. Since chip reset, transmitter should show constant output level ground. Connect RESET (connector CTRL_SIG_0, VDDQ access connection connector PG14. This releases RESET signal.
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
Observe XMIT_x_P XMIT_x_N. transmitter should outputting random data. Setting digital sampling oscilloscope infinite persistence mode will display data-eye. example data-eye shown Figure 3-2.
Figure 3-2. MC92603 Data-Eye Using Recommended Test Setup
3.2.2
Quick Setup Error Rate Checking
addition having integrated generator, MC92603 also error rate checker (BERC). integrated 23rd order signature analyzer that synchronized incoming stream used count code group mismatch errors relative internal reference pattern. following test procedure will describe this BIST feature. more information concerning MC92603 BIST, refer MC92603 Quad Gigabit Ethernet Transceiver Reference Manual.
3.2.2.1
Equipment Setup
Connect MC92603DVB shown Figure connecting transmitter outputs link under test (XLINK_x_P/N) receiver under test (RLINK_x_P/N).
MOTOROLA
Chapter Laboratory Equipment Quick Setup Evaluation
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
+5-V Supply
Logic Analyzer
CLK_OUT1 D_RECV
C_RECV
XLINK_D_N XLINK_D_P RLINK_D_N RLINK_D_P XLINK_C_P XLINK_C_N RLINK_C_P RLINK_C_N XLINK_B_N XLINK_B_P RLINK_B_N RLINK_B_P XLINK_A_P XLINK_A_N
B_RECV
A_RECV
LEDs COMMA
MC92603DVB
RLINK_A_P RLINK_A_N
Figure 3-3. Error Rate Check Test Setup
3.2.2.2
Parallel Connections
bias connections parallel inputs perform quick setup BERC test same those quick setup eye-diagram shown Table 3-4. parallel outputs connected data analysis system. simple quick test, logic analyzer required since errors reported observed channel status LEDs.
3.2.2.3
Quick Setup BERC Test Procedure
Connect MC92603DVB test equipment described Section 3.2.2.1, "Equipment Setup." This will place MC92603 generation mode with MC92603 held reset receivers BERC mode using recovered clock. Step skipped previously performed when setting DVB. Apply +5.0 evaluation board. Verify voltage levels +3.3 +1.8 +VDDQ (3.3 regulators connectors respectively. necessary, adjust R12V, R22V, R22V1 obtain desired voltage levels.
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
Verify that reference clock frequency CLK_OUT1 (period ns). Connect RESET (connector CTRL_SIG_0, VDDQ access connection connector PG14. This releases RESET signal. Observe parallel outputs data analyzer status LEDs. described MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, MC92603 will start lock PLL, initialize receivers, perform byte alignment, reset error counter. When receivers locked BIST running, recovered clock observable RECV_x_RCLK. Table errors codes Figure example receiver startup error detection sequence. Once receiver initially locked receiver data bits, RECV_x_[7:0], zero (logic low). Should error occur, RECV_x_[7:0] will increment RECV_x_ERR will flag error during that byte time. value RECV_x_[7:0] remains constant until another error detected system reset. receiver counter fills with errors, bits RECV_x_[7:0] stay logic high (11111111) until receiver reset. Refer MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, more detail.
Table 3-5. BIST Error Codes
RECV_x_DV High High High RECV_x_ERR RECV_x_COMMA High High care High care care Status Description byte/word sync: receiver startup lost byte alignment searching alignment. BIST running, mismatch this code group BIST running, this code group COMMA code group Receiver byte/word synchronized, analyzer locked BIST running, mismatch error this code group
error count status observed channel receiver status LEDs. Simple error rate calculated. example, error count LEDs test been running minutes, would errors divided minutes seconds minute 1.25 bits second), 2.515-13.
MOTOROLA
Chapter Laboratory Equipment Quick Setup Evaluation
More Information This Product, www.freescale.com
Quick Setup Data-Eye Diagram
RESET RECV_x_RCLK RECV_x_ERR RECV_x_DV RECV_x_COMMA RECV_x_7 Don't Care Don't Care Don't Care Valid Comma Detected
RECV_x_1 RECV_x_0 MC92603 Reset Byte Sync RCVR Startup RCVR Synced Analyzer Locked BIST Running Mismatch These Characters BIST Running Mismatches Counted
Figure 3-4. Receiver Startup Error Detection Sequence
3-10
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Chapter Test Setups
This chapter outlines laboratory test equipment setup procedure evaluate features MC92603 more depth than those outlined previous chapter. These setups meant guidelines only implied complete. Details testing specific system applications left user.
Serial Link Verification Using Serial Error Rate Tester (BERT)
This test setup used observe rate which MC92603 produces errors given either pseudo-random (PRBS) patterns user-defined pattern sets generated serial error rate tester (BERT). MC92603 placed repeater mode, REPE high, thereby disabling parallel receiver transmitter buses. Testing performed using ten-bit interface mode does require insertion idle characters word recognition byte alignment. verification using 8B/10B encoder other MC92603 features required, then appropriate idle insertion timing requirements outlined MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, must followed.
4.1.1
Test Setup Full-Speed Mode
Figure depicts test setup MC92603 full-speed mode (HSE control bits follows: REPE TBIE
other control bits except RESET, which initially then transitioned start MC92603.
MOTOROLA
Chapter Test Setups
More Information This Product, www.freescale.com
Serial Link Verification Using Serial Error Rate Tester (BERT)
Source
Power Splitter
Clean Clock 1.25
Error Rate Tester Pattern Generator CK_OUT Error Detector Serial Data Serial Data Prescaler Divide-by-10 Reference Clock 62.5 MC92603DVB (Repeater Mode)
Blocker
Prescaler Divide-by-10
Reference Clock
MC92603DVB (Repeater Mode)
Figure 4-1. Full-Speed Serial Link Test Setup
4.1.2
Test Setup Half-Speed Modes
Serial link testing also performed using half-speed mode (HSE This reduces frequencies setup factor two. Figure depicts serial link test setup using divide-by-10 prescaler. control bits follows: REPE= TBIE
other control bits except RESET, which initially then transitioned start MC92603.
Clean Clock Source Power Splitter Error Rate Tester Pattern Generator Error Detector
Blocker
Figure 4-2. Half-Speed Serial Link Test Setup
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Jitter Testing
Jitter Testing
following tests guidelines verifying performance MC92603 `noisy' conditions. Results will vary depending input reference frequencies, MC92603 mode operation, test setup equipment, test environment.
4.2.1
Jitter Test System Calibration
Before beginning type jitter measurement, system must first calibrated, shown Figure 4-3, produce desired frequency amplitude modulation jittered source. amplitude modulation then translated into jitter units peak-to-peak unit intervals (UIp-p). Different synthesized sweepers have different characteristics different frequencies. possible certain frequencies produce spurious side lobes that will affect jitter characterization. strongly advised that bandpass filter centered carrier frequency used input microwave transition analyzer. Refer synthesized sweeper reference manual more details.
Function Generator 10-MHz Reference Clock
Modulation Signal
HPIB
70000 Mainframe with Microwave Transition Analyzer
Filter
Synthesized Sweeper (Carrier Frequency)
Jittered Clock
Power Splitter
Figure 4-3. Jitter Measurement System Calibration
MOTOROLA
Chapter Test Setups
More Information This Product, www.freescale.com
Jitter Testing
4.2.2
Reference Clock Jitter Transfer Test
This test setup, shown Figure 4-4, used observe amount jitter placed reference clock that transferred data outputs. Example frequencies were chosen match narrow bandpass filters available with Agilent 71500C jitter analysis system. control bits except RESET, which initially then transitioned start MC92603. XMIT data bits follows: XMIT_x_ENABLE XMIT_x_[7:0] 0xB5 XMIT_x_CLK jumpered GTX_CLK
This data pattern appears 625-MHz clock signal serial outputs.
Function Generator 10-MHz Reference Clock
Modulation Signal
Blocker 70000 Mainframe with Microwave Transition Analyzer Filter Filter Blocker Prescaler Divide-by-2 Synthesized Sweeper (Carrier Frequency) 1.25 Jittered Clock
Serial Data
HPIB
Power Splitter
Jittered Reference Prescaler Clock MC92603DVB Divide-by-10 XMIT Data D21.5
Figure 4-4. Reference Clock Jitter Transfer Test Setup
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Jitter Testing
4.2.3
Reference Clock Jitter Tolerance Test
test setup Figure used observe amount jitter placed reference clock that does produce errors serial data outputs compared input serial data stream. MC92603 placed ten-bit interface mode (TBIE) repeater mode (REPE). serial data stream either PRBS user-defined data. control bits follows: REPE TBIE
other control inputs
Error Rate Data over HPIB
Function Generator 10-MHz Reference Clock
Source
Clean Clock 1.25
Error Rate Tester Pattern Generator Error Detector
Modulation Signal
HPIB
Synthesized Sweeper (Carrier Frequency)
Jittered Clock 1.25
Power Splitter
Prescaler Divide-by-10
Jittered Reference Clock
MC92603DVB
Figure 4-5. Reference Clock Jitter Tolerance Test Setup
MOTOROLA
Chapter Test Setups
Serial Data
70000 Mainframe with Microwave Transition Analyzer
Blocker
More Information This Product, www.freescale.com
Jitter Testing
4.2.4
Data Jitter Tolerance Test
test setup shown Figure used observe amount jitter placed serial data inputs that does produce errors serial data outputs. MC92603 placed ten-bit interface mode (TBIE) repeater mode (REPE). serial data stream either PRBS user-defined data. control bits follows: REPE TBIE
other control inputs
Error Rate Data Over HPIB
Function Generator 10-MHz Reference Clock
Clean Clock Source 1.25
Error Rate Tester Pattern Generator Power Splitter Error Detector
Modulation Signal
Blocker Serial Data Prescaler Divide-by-10 Reference Clock MC92603DVB (Repeater Mode)
HPIB
70000 Mainframe with Microwave Transition Analyzer
Synthesized Sweeper (Carrier Frequency)
Jittered Clock 1.25
Figure 4-6. Data Jitter Tolerance Test Setup
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Appendix Connector Signals
parallel data input output signals MC92603DVB design verification board listed following tables. connection test points common 0.100" spaced type connectors.
Input: (0.100") Connectors
configuration/control, data test inputs MC92603 connectors. There total thirteen input connectors DVB. each connector, even numbers connected ground plane. config/control signal inputs numbers) have pullup resistors board. Therefore, configuration requires `high' logic left open. data inputs, however have pullups will need jumpered VDDQ logic signal input required `low,' shorting jumper installed. signal name, description, MC92603 device `ball' (pin) number listed following tables each input connectors.
A.1.1
Control Signal Input Connectors
signals connectors CTRL_SIG_0, CTRL_SIG_1, CTRL-SIG_2 (PG1-PG3 respectively) control input signals that basic configuration MC92603. These signals corresponding connector pins listed Table A-1, Table A-2, Table A-3, respectively.
MOTOROLA
Appendix Connector Signals
More Information This Product, www.freescale.com
Input: (0.100") Connectors
Table A-1. CTRL_SIG_0 Connector
Connector
MC92603
Input Signal Name REPE RCCE RECV_CLK_CENT ADIE RESET STNDBY Repeater mode enable Recovered clock enable
Description
Center recovered clock relative data Half-speed mode enable Add/drop idle enable System reset Enable double data rate Standby mode enable Ground connection
Table A-2. CTRL_SIG_1 Connector
Connector MC92603 Input Signal Name LBOE USE_DIF_CLK MEDIA TBIE COMPAT JPACK RECV_REF_A XMIT_REF_A Loopback output enable differential reference clock inputs Media impedance select Ten-bit interface enable IEEE Std. 802.3 compatibility mode enable Enable FIFO jumbo packets receiver primary clock output transmit primary clock input Ground connection Description
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Table A-3. CTRL_SIG_2 Connector
Connector MC92603 Input Signal Name BSYNC DROP_SYNC TST_1 TST_0 WSYNC1 WSYNC0 ENAB_AN
Input: (0.100") Connectors
Description Byte synchronization mode Drop synchronization Test mode-select Test mode-select Word sync. mode definer Word sync. mode definer Enable auto-negotiate Ground connection
A.1.2
Transmitter Parallel Data Input Connectors
MC92603 transmitter parallel data input signals channels through mapped connectors listed tables below. Table shows 8-bit data byte input transmitter channels through respectively, A_XMIT D_XMIT (PG8, PG10, PG5, PG7) connectors
Table A-4. A_XMIT, B_XMIT, C_XMIT, D_XMIT Connectors
MC92603 Ball Connector A_XMIT, B_XMIT, C_XMIT, D_XMIT, (Channel (Channel (Channel (Channel Input Signal Name XMIT_x_0 XMIT_x_1 XMIT_x_2 XMIT_x_3 XMIT_x_4 XMIT_x_5 XMIT_x_6 XMIT_x_7
Description
Transmitter data input Transmitter data input Transmitter data input Transmitter data input Transmitter data input Transmitter data input Transmitter data input Transmitter data input Ground Connection
MOTOROLA
Appendix Connector Signals
More Information This Product, www.freescale.com
Input: (0.100") Connectors
Table lists remaining transmitter input signals four channels A_XCLK through D_XCLK (PG9, PG11, PG6, PG15) connectors, respectively. x_XCLK connector buffered reference clock output from MC92603 that used input clock pattern generator. These signals supply GTX_CLK reference when interfacing Ethernet MACs. Alternatively, external pattern generator clock reference supplied CLK_x_PG, connectors. these external sources used, resistors R37, R39, R149, R151 must installed resistors R36, R38, R148, R150 removed, respectively. NOTE external clock source used must same frequency that REF_ MC92603 chip. user 3.3_CLK_OUTn clocks provided source clock pattern generator.
Table A-5. A_XCLK, B_XCLK, C_XCLK D_XCLK Connectors
MC92603 Ball Connector Input A_XCLK, B_XCLK, C_XCLK, D_XCLK, Signal Name (Channel (Channel (Channel (Channel Description
Buffered reference clock GTX_CLK0 channels GTX_CLK1 channels XCVR_x_ DISABLE Transceiver disable
XMIT_x_CLK Transmitter interface clock XMIT_x_K Transmitter special character
XMIT_x_LBE Transmitter loopback enable XMIT_x_ ENABLE (XMIT_x_8) Transmitter enable data (data ten-bit mode)
XMIT_x_ERR Transmitter force code error (XMIT_x_9) (data ten-bit mode) Ground connection
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Output: (0.100") Connectors
Output: (0.100") Connectors
MC92603 receiver parallel data outputs connected 0.100" connectors. mapping these signals contained Table A-6. Table lists signals A_RECV, B_RECV, C_RECV, D_RECV (LA1 LA4) connectors. Note that receive data clock, RECV_x_RCLK, brought connector pins. Care should exercised when connecting both these pins exceed drive capacity chip output. Refer MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, more details.
Table A-6. A_RECV B_RECV Connectors
MC92610 Ball Connector A_RECV, B_RECV, C_RECV, D_RECV, (Channel (Channel (Channel (Channel Output Signal Name Description
RECV_x_RCLK XCVR_ receive data clock
RECV_x_RCLK XCVR_ receive data clock RECV_x_RCLK XCVR_ receive data clock_complement Ground connection
channels channel this (JTAG, test data out) RECV_x_K RECV_x_ COMMA RECV_x_ERR (bit RECV_x_DV (bit RECV_x_7 RECV_x_6 RECV_x_5 RECV_x_4 RECV_x_3 RECV_x_2 RECV_x_1 RECV_x_0 Receiver detect status Receiver COMMA detect status Receiver error detect (bit 10-bit mode) Receiver data valid status (bit 10-bit mode) Receiver data Receiver data Receiver data Receiver data Receiver data Receiver data Receiver data Receiver data
MOTOROLA
Appendix Connector Signals
More Information This Product, www.freescale.com
JTAG_0 Connector
JTAG_0 Connector
Table lists signals JTAG (PG13) connector. This MC92603 test access port, TAP, interface IEEE Std. 1149 JTAG testing. NOTE There 100-K internal pullups TMS, TDI, TRST. TRST held during power does receive active preset after power test logic assume indeterminate state disabling some normal transceiver functions. recommended that TRST terminated following ways:
TRST driven controller that provides reset after power Connect TRST RESET. Terminate TRST with resistor hardwire) ground.
10K-pullup TCLK provide input termination clock input used. important shorting jumper TRST input comply with above note. more information test access port, Section MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, more details. JTAG connector also four configuration pins associated with redundant link operation. There 10K-pullups these configuration pins.
Table A-7. JTAG Connector
Connector MC92603 Input Signal Name XCVR_A_RSEL XCVR_B_RSEL BROADCAST ENAB_RED TRST Description redundant XLINK_C RLINK_C redundant XLINK_D RLINK_D Transmit over links Enable redundant links JTAG test data JTAG test clock JTAG test mode select JTAG test reset Ground connection
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
MDIO Connector
MDIO Connector
Table lists signals MDIO (PG4) connector. These connections MDIO device address configuration interface MC92603. MDIO being used, MD_ENABLE must terminated low. Chapter MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, details. There other connection requirements MDIO connector.
Table A-8. MDIO Connector
Connector MC92603 Input Signal Name MD_CLK MD_ENABLE MD_DATA MD_ADR_2 MD_ADR_3 MD_ADR_4 MDIO clock MDIO enable MDIO data (bidirectional data) MDIO address MDIO address MDIO address Ground connection Description
SFP_CTRL Connectors
control signals small form-factor pluggable (SFP) sockets available SFP_CTRL0 (PG12) SFP_CTRL1 (PG14) connectors listed Table A-9. These standard signals multiple source agreement (MSA) fiber optic modules. TX_DISABLE must module operate.
Table A-9. SFP_CTRL0 SFP_CNTRL1 Connectors
Connector SFP0 Module SFP1 Module Input Signal Name MOD_DEF_0 MOD_DEF_1 MOD_DEF_2 Module definition Module definition Module definition Description
RATE_SELECT Rate select. connected most SFPs. TX_DISABLE Transmitter disable
MOTOROLA
Appendix Connector Signals
More Information This Product, www.freescale.com
Appendix Parts List
Design Verification Board Parts List
Table shows parts used constructing MC92603DVB design verification board.
Table B-1. MC92603DVB Design Verification Board Parts List
Item Qty. U4-7 Reference Value Manufacturer Molex Inc. Fairchild Part 45241-0001 74VCX16244 CAP0603, Description IEEE 1394B bilingual socket Buffer 1.2-3.6 0603 ceramic chip capacitor
C11-12 C2-6 C25-26 C28-29 C36-40 C42-43 C45-47 C49-53 C58-63 C301-302 C73-79 C85-91 C9-10 C71-72 C83-84 C92-93 C18-19 C30-33 C54-57 C303-304 0.01
CAP0805, 0.01 0805 chip capacitor
0.05
CAP0805, 0.05 0805 chip capacitor CAP0805, 0805 chip capacitor
CAP1812,
1812 chip capacitor
CAP7343, 7343 solid tantalum chip capacitor, ESR, CAP7343, M2988-250M CE8950A-LZ250.000 504-AG11D A6S-7104 2516-6002UB 7343H solid tantalum chip capacitor, ESR, 250-MHz PECL oscillator 250-MHz surface mount PECL oscillator Socket oscillators; DIP4(14) 7-pole slide switches, positions (open/closed) keyed header with shroud, 0.1" spacing
C22-23 C67-68 Y1socket PG12 PG14 PG16 Electronics Raltron Omron
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Design Verification Board Parts List
Table B-1. MC92603DVB Design Verification Board Parts List (continued)
Item Qty. Reference PG1-11 PG13 PG15 LA1-4 L1-4 VR18 VR33 T1-9 Value Technology 2303/2304/9648/ 9649/9650 RES0603, RES0805, RES0805, RES0805, Linear Technology Motorola Motorola Molex Inc. Motorola Manufacturer Part 3428-6002UB 2540-6002UB IND-MOLDED, LT1587 MC92603VF MC100ES6222 74441-0010 MPC9456 Description keyed header with shroud, 0.1" spacing keyed header with shroud, 0.1" spacing Inductor-molded, Linear voltage regulator, amps, 3-lead Quad SerDes Gigabit Ethernet transceiver 1:15 differential ECL/PECL clock divider fanout buffer 20-pin connector 2.5-3.3 LVCMOS clock fanout buffer Socket oscillators; DIP4(14) 4-mm screw terminal binding post, 2-red, 4-black, 1-yellow, 1-blue, 1-green 0603 chip resistor 0805 chip resistor 0805 chip resistor 0805 chip resistor
R5-6 R62-63 R70-71 R74-75 R25-26 R36-39 R148-151 R176-179 R7-9 R14-18 R28-32 R34-35 R48-49 R52-59 R64-67 R78-84 R88-91 R96-104 R117-129 R142-147 R180-181 R190-195 R200-201 R203-204 R209-210 R3-4 R50-51 R60-61 R68-69 R72-73 R92-95 R105-112 R130-141 R152-175 R196-197 R45-47 R85-87 R186-188 R202 R205-207 R211-213 1650
RES0805,
0805 chip resistor
RES0805, 1650 0805 chip resistor RES0805, RES0805, RES0805, RES0805, 0805 chip resistor 0805 chip resistor 0805 chip resistor 0805 chip resistor
MOTOROLA
Appendix Parts List
More Information This Product, www.freescale.com
Design Verification Board Parts List
Table B-1. MC92603DVB Design Verification Board Parts List (continued)
Item Qty. Reference Value Manufacturer Part RES1206, Description 1206 chip resistor R43-44 R76-77 R184-185 R198-199 R208 RR40-41 R113 R182-183 R189 1394B1_A_N 1394B1_A_P 1394B1_B_N 1394B1_B_P 1394B_A_N 1394B_A_P 1394B_B_N 1394B_B_P CLK_A_PG CLK_B_PG CLK_C_PG CLK_D_PG CLK_IN CLK_OUT1-4 DIFF_CLK_OUT_N DIFF_CLK_OUT_P RX_A_N RX_A_P RX_B_N RX_B_P RX_C_N RX_C_P RX_D_N RX_D_P SFP1_RX_N SFP1_RX_P SFP1_TD_N SFP1_TD_P SFP_RX_N SFP_RX_P SFP_TD_N SFP_TD_P SMA1-9 TST1-8 TX_A_N TX_A_P TX_B_N TX_B_P TX_C_N TX_C_P TX_D_N TX_D_P D1-14 D18-30 D34-36 D40-48 D52-53 R12V R22V R22V1 Johnson Johnson
RES1206, 129-0701-202
1206 chip resistor Scope test socket jack socket
Dialight
597-5311-402
Green
Dialight Dialight Bourns Bourns Molex Inc. Pomona
597-5111-402 597-5411-402 3214W-1-502E 3214W-1-502E 73927-0009 929950-00 4741-12-0/ 4741-12-2
Yellow Surface mount trim resistor Surface mount trim resistor cage assembly press-fit legs clips 0.100" shunts Square receptacle patch cord
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Appendix Prescaler Jitter Measurement
Divide-by-xx Prescaler Description
Evaluating jitter system requires that clocks within system based common source. this reason, often necessary prescalers derive needed reference clock. Motorola developed small programmable prescaler with maximum input frequency which assembled using commercially available parts. Figure depicts block diagram this prescaler.
Clock Clock In_alt 5-Bit Programmable Counter Divide Prescaler
Divide
Level Shift
Clock
Bank Switch
Bank Switch
Figure C-1. Divide-by-xx Prescaler Block Diagram
input prescaler either through divide-by-2 directly into 5-bit programmable counter. bank bank switches used select variety prescaler values based following formula:
Modulus
where
MOTOROLA
Appendix Prescaler Jitter Measurement
More Information This Product, www.freescale.com
Prescaler Components
values commonly used 1.0-Gbit systems refer Table C-1.
Table C-1. Switch Settings 1.0-Gbit SerDes Prescalers
Bank Input Clock In_alt Clock Clock Clock Bank Modulus
Schematics this prescaler available from your Motorola field applications engineer.
Prescaler Components
Table C-2. Major Components Divide-by-xx Prescaler
Table lists major integrated circuit components needed prescaler.
Part MC12093 MC100ELT23 MC100ELT21 MC100ELT26 HMMC-3122 HMC364S8G HMC394LP4
Manufacturer Motorola Semiconductor Semiconductor Semiconductor Agilent Hittite Microwave Hittite Microwave
Supplier Newark Newark Newark Newark Arrow Hittite Hittite
Comments 1.1-GHz prescaler (divide Dual differential PECL translator, with separate inputs. Single differential PECL translator. Alternative above part. Dual differential PECL translator, with common inputs. Alternative above part. 12-GHz divide-by-2 prescaler, GaAs MMIC. 12-GHz divide-by-2 prescaler, GaAs MMIC. Pin-for-pin alternative above part. 2.2-GHz programmable 5-bit counter, GaAs MMIC.
MC92603 Design Verification Board User's Guide
MOTOROLA
More Information This Product, www.freescale.com
Appendix Revision History
This appendix provides list major differences between revisions MC92603 Quad Design Verification Board User's Guide (MC92603DVBUG). This initial version user's guide, there currently changes document.
MOTOROLA
Appendix Revision History
More Information This Product, www.freescale.com
REACH USA/EUROPE/LOCATIONS LISTED: Motorola Literature Distribution P.O. 5405, Denver, Colorado 80217 1-480-768-2130 (800) 521-6274 JAPAN: Motorola Japan Ltd. SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku Tokyo 106-8573 Japan 81-3-3440-3569
Information this document provided solely enable system software implementers Motorola products. There express implied copyright licenses granted hereunder design fabricate integrated circuits integrated circuits based information this document. Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre, King Street Industrial Estate, N.T., Hong Kong 852-26668334 TECHNICAL INFORMATION CENTER: (800) 521-6274 HOME PAGE: www.motorola.com/semiconductors
limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part.
Motorola Stylized Logo registered U.S. Patent Trademark Office. digital trademark Motorola, Inc. other product service names property their respective owners. Motorola, Inc. Equal Opportunity/Affirmative Action Employer. Motorola, Inc. 2004 MC92604DVBUG
More Information This Product, www.freescale.com
Other recent searches
ZX95-2952A+ - ZX95-2952A+ ZX95-2952A+ Datasheet
SY100E310L - SY100E310L SY100E310L Datasheet
NJU2612x - NJU2612x NJU2612x Datasheet
NJM2753 - NJM2753 NJM2753 Datasheet
FQP6N90C - FQP6N90C FQP6N90C Datasheet
FQPF6N90C - FQPF6N90C FQPF6N90C Datasheet
B76002V227 - B76002V227 B76002V227 Datasheet
B45294R9227M41 - B45294R9227M41 B45294R9227M41 Datasheet
AO4462 - AO4462 AO4462 Datasheet
AO4462L - AO4462L AO4462L Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
