DSP56852 Evaluation Module User's Manual Motorola, Inc., 2002. ri
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DSP56852 Evaluation Module User's Manual
Motorola, Inc., 2002. rights reserved.
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Table Contents
Preface Chapter Introduction DSP56852EVM Architecture DSP56852EVM Configuration Jumpers DSP56852EVM Connections Chapter Technical Summary DSP56852 Program Data Memory 2.2.1 SRAM Bank 2.2.2 SRAM Bank Serial EEPROM/Data FLASH Memory RS-232 Serial Communications. Clock Source Operating Mode Debug LEDs. Debug Support 2.8.1 JTAG Connector. 2-10 2.8.2 Parallel JTAG Interface Connector 2-11 External Interrupts 2-12 2.10 Reset. 2-13 2.11 Power Supply 2-14 2.12 Stereo Codec 2-15 2.12.1 Analog Input/Output. 2-15 2.12.2 Digital Interface 2-16 2.13 Daughter Card Connectors. 2-18 2.13.1 Memory Daughter Card Expansion Connector 2-18 2.13.2 Peripheral Daughter Card Expansion Connector 2-19 2.14 Test Points 2-20
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Appendix DSP56852EVM Schematics Appendix DSP56852EVM Bill Material
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List Figures
Block Diagram DSP56852EVM. DSP56852EVM Jumper Reference Connecting DSP56852EVM Cables Schematic Diagram External Memory Interface Schematic Diagram External CS1/CS2 Memory Interface EEPROM Memory Block Diagram Schematic Diagram RS-232 Interface Schematic Diagram Clock Interface Schematic Diagram Debug Interface Block Diagram Parallel JTAG Interface. 2-11 Schematic Diagram User Interrupt Interface 2-12 Schematic Diagram RESET Interface 2-13 Schematic Diagram Power Supply 2-14 Codec Analog Connections. 2-16 CS4218 Stereo Audio Codec 2-17
2-10 2-11 2-12
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List Tables
DSP56852EVM Default Jumper Options Port Connector Description RS-232 Serial Connector Description. Operating Mode Selection Control JTAG Connector Description 2-10 Parallel JTAG Interface Disable Jumper Selection. 2-10 Parallel JTAG Interface Connector Description 2-11 Codec Sample Rate Selector 2-15 Port Connector Description 2-17 GPIO Port Connector Description 2-17 Memory Daughter Card Connector Description. 2-18 Peripheral Daughter Card Connector Description 2-19
2-10 2-11 2-12
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Preface
This reference manual describes detail hardware DSP56852 Evaluation Module.
Audience
This document intended application developers creating software devices using Motorola DSP56852 part.
Organization
This manual organized into chapters appendixes. Chapter Introduction provides overview features. Chapter Technical Summary describes detail DSP56852 hardware. Appendix DSP56852EVM Schematics contains schematics DSP56852EVM.
Appendix DSP56852EVM Bill Material provides list materials used DSP56852EVM board.
Suggested Reading
More documentation DSP56852 DSP56852EVM found URL:
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Conventions
This manual uses following notational conventions:
Term Value Active High Signals (Logic One) Active Signals (Logic Zero) Hexadecimal Values Decimal Values Symbol special symbol attached signal name Noted with overbar text most figures Begin with symbol special symbol attached number Begin with letter attached number Considered positive unless specifically noted negative value Linkable on-line Reference sources, paths, emphasis Examples CLKO $0FF0 b1010 b0011 Voltage often shown positive: +3.3V schematic drawings, Active Signals noted backslash: Exceptions
Binary Values
Numbers
Blue Text Bold
.refer Chapter License .see:
http://www.mot.com/ SPS/DSP.
Definitions, Acronyms, Abbreviations
Definitions, acronyms abbreviations terms used this document defined below reference. Codec EEPROM EOnCE COder/DECoder; part used convert analog signals digital (coder) digital signals analog (decoder) Digital Signal Processor Digital Signal Processing Electrically Erasable Programmable Read-Only Memory Enhanced On-Chip Emulation; debug port created Motorola enable designer create low-cost hardware interface professional-quality debug environment
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viii
GPIO
Evaluation Module; hardware platform which allows customer evaluate silicon develop application General Purpose Input Output port Motorola's family DSPs; does share functionality with other peripheral chip only input, output level-sensitive interrupt input Integrated Circuit Improved Synchronous Serial Interface port Motorola's family DSPs Joint Test Action Group; protocol/interface used test debug Light Emitting Diode Ball Grid Array package Multi Purpose Input Output port Motorola's family DSPs; shares package pins with other peripherals chip function GPIO Printed Circuit Board Phase Locked Loop Random Access Memory Read Only Memory Serial Communications Interface port Motorola's family DSPs Serial Peripheral Interface port Motorola's family DSPs Static Random Access Memory Synchronous Serial Interface port Motorola's family DSPs Wait State
ISSI
JTAG MBGA MPIO
SRAM
References
following sources were referenced produce this manual:
DSP56800E Reference Manual, Motorola DSP56852 Digital Signal Processor User's Manual, Motorola DSP56852 Digital Signal Processor Technical Data, Motorola
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Chapter Introduction
DSP56852EVM used demonstrate abilities DSP56852 provide hardware tool allowing development applications that DSP56852.
DSP56852EVM evaluation module board that includes DSP56852 part, 16-bit stereo codec, external memory daughter card expansion interface. daughter card expansion connectors signal monitoring user feature expandability. DSP56852EVM designed following purposes: Allowing users become familiar with features 56800E architecture. tools examples provided with DSP56852EVM facilitate evaluation feature benefits family. Serving platform real-time software development. tool suite enables user develop simulate routines, download software on-chip on-board RAM, debug using debugger JTAG/Enhanced OnCE (EOnCE) port. breakpoint features EOnCE port enable user easily specify complex break conditions execute user-developed software full speed until break conditions satisfied. ability examine modify user-accessible registers, memory peripherals through EOnCE port greatly facilitates task developer. Serving platform hardware development. hardware platform enables user connect external hardware peripherals. on-board peripherals disabled, providing user with ability reassign DSP's peripherals. EOnCE port's unobtrusive design means that memory board chip available user.
DSP56852EVM Architecture
DSP56852EVM facilitates evaluation various features present DSP56852 part. DSP56852EVM used develop real-time software hardware products based DSP56852. DSP56852EVM provides features necessary user write debug software, demonstrate functionality that software
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interface with customer's application-specific device(s). DSP56852EVM flexible enough allow user fully exploit DSP56852's features optimize performance their product, shown Figure 1-1.
DSP56852
RESET LOGIC RESET MODE LOGIC MODE Data FLASH 1M-bit Interface RS-232 Interface DSub 9-Pin
(Program Memory) 128Kx16-bit SRAM CS1/CS2 (Data Memory) 128Kx16-bit SRAM Memory Daughter Card Connector JTAG Connector
Address, Data Control Peripheral Daughter Card Connector
JTAG/EOnCE
ISSI
Stereo 16-bit Codec
Stereo Line Stereo Line Headphone Jack
DSub 25-Pin
Parallel JTAG Interface
GPIO
Debug LEDs
4.00MHz Crystal
XTAL/EXTAL
+1.8V, +3.3V
Power Supply +1.8V, +3.3V +5.0V
Figure 1-1. Block Diagram DSP56852EVM
DSP56852EVM Configuration Jumpers
jumper groups, (JG1-JG10), shown Figure 1-2, used configure various features DSP56852EVM board. Table describes default jumper group settings.
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DSP56852EVM Configuration Jumpers
JG10
RESET
JTAG
IRQA
JG10
HEADPHONE
DSP56852EVM RE10520B
IRQB
LEDS LINE
LINE
Figure 1-2. DSP56852EVM Jumper Reference Table 1-1. DSP56852EVM Default Jumper Options
Jumper Group JG10 Comment Enable on-board Byte selectable SRAM CS1/CS2 (U3) Enable on-board Word selectable SRAM (U2) on-board XTAL crystal input oscillator on-board EXTAL crystal input oscillator Enable Port RS-232 transceiver Enable Port Serial EEPROM/Data FLASH Enable on-board Parallel JTAG Host/Target Interface Enable RS-232 output Enable Port CODEC data. Enable GPIO CODEC control. Jumpers Connections 1-2, 1-2, 1-2, 3-4, 1-2, 3-4, 5-6, 7-8, 9-10 1-2, 3-4,
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DSP56852EVM Connections
interconnection diagram shown Figure connecting external +12.0V DC/AC power supply external +5.0V power supply DSP56852EVM board.
Parallel Extension Cable DSP56852EVM PC-compatible Computer Connect cable Parallel/Printer port External with 2.1mm, +12.0V receptacle Power connector +5.0V Supply
Figure 1-3. Connecting DSP56852EVM Cables
Perform following steps connect DSP56852EVM cables: Connect parallel extension cable Parallel port host computer. Connect other parallel extension cable shown Figure 1-3, DSP56852EVM board. This provides connection which allows host computer control board. Make sure that external +12.0V 1.2A switching power supply external +5.0V power supply plugged into +120V power source. Connect 2.1mm output power plug from external switching power supply into shown Figure 1-3, DSP56852EVM board. Optionally, attach external +5.0V power supply 2-pin terminal block, TB1. Apply power external power supply. green Power-On LED, LED7, will illuminate when power correctly applied.
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Chapter Technical Summary
DSP56852EVM designed versatile Digital Signal Processor, (DSP), development card developing real-time software hardware products support generation applications digital wireless messaging, digital answering machines, feature phones, modems, digital cameras. power 16-bit DSP56852 DSP, combined with on-board 128K 16-bit external program/data static (SRAM), 128K 16-bit external data/program SRAM, RS-232 interface, stereo 16-bit codec interface, Daughter Card Expansion interface parallel JTAG interface, makes DSP56852EVM ideal developing implementing many audio voice algorithms, well learning architecture instruction DSP56852 processor. main features DSP56852EVM, with board schematic reference designators include: DSP56852 16-bit +1.8V/+3.3V Digital Signal Processor operating 120MHz [U1] External fast static (FSRAM) memory, configured memory [U2] with wait state 120MHz memory [U3] with wait state 120MHz CS1/CS2 1M-bit Serial EEPROM/Data FLASH [U4] 4.00MHz crystal oscillator frequency generation [Y1] Optional external oscillator frequency input connectors [JG3 JG4] Joint Test Action Group (JTAG) port interface connector external debug Host Target Interface [J3] On-board Parallel JTAG Host Target Interface, with connector printer port cable [P1] RS-232 interface easy connection host processor 16-bit stereo codec interface [U5, JG9, JG10, Stereo headphone interface [U12 Codec sample rate selector [S4]
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Peripheral Daughter Card Expansion Connector, allow user connect SCI, ISSI, GPIO-compatible peripheral [J2] Memory Daughter Card Expansion Connector, allow user connect memory memory device [J1] On-board power regulation from external +12V DC-supplied power input [P2] On-board power regulation from optional DC-supplied power input [TB1] Light Emitting Diode (LED) power indicator [LED7] on-board real-time user debugging LEDs [LED1-6] Boot MODE selector [S5] Manual RESET push-button [S3] Manual interrupt push-button IRQA [S1] Manual interrupt push-button IRQB [S2]
DSP56852
DSP56852EVM uses Motorola DSP56852VF120 part, designated board schematics. This part will operate maximum speed 120MHz. full description DSP56852, including functionality user information, provided these documents: DSP56852 Technical Data, (DSP56852/D): Provides features list specifications, including signal descriptions, power requirements, timing requirements available packaging DSP56852 User's Manual, (DSP56852UM/AD): Provides overview description detailed information about on-chip components, including memory maps, peripheral functionality, control/status register descriptions each subsystem DSP56800E Reference Manual, (DSP56800ERM/D): Provides detailed description core processor, including internal status control registers detailed description family instruction
Refer these documents detailed information about chip functionality operation. They found this URL:
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Program Data Memory
Program Data Memory
DSP56852EVM contains 128Kx16-bit Fast Static banks. SRAM bank controlled SRAM bank controlled CS2.
2.2.1 SRAM Bank
SRAM bank which controlled CS0, uses Fast Static (GSI GS72116, labelled external memory expansion; FSRAM schematic diagram Figure 2-1. configured this memory bank 16-bit program memory, data memory, both. Additionally, configured assign this memory's size starting address modulo address space.
This memory bank will operate with wait state access while DSP56852 running 120MHz disabled removing jumper JG2.
DSP56852 A0-A16 D0-D15
+3.3V
GS72116 A0-A16 DQ0-DQ15
Jumper 1-2: Enable SRAM Jumper Removed: Disable SRAM
Figure 2-1. Schematic Diagram External Memory Interface
2.2.2 SRAM Bank
SRAM bank which controlled CS2, uses Fast Static (GSI GS72116, labelled external memory expansion; FSRAM schematic diagram Figure 2-2. Using CS2, this memory bank configured byte (8-bit) word (16-bit) accessable program memory, data memory, both. Additionally, configured assign this memory's size starting address modulo address space.
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This memory bank will operate with wait state access while DSP56852 running 120MHz disabled removing jumpers JG1.
DSP56852 A0-A16 D0-D15
GS72116 A0-A16 DQ0-DQ15
Jumper 1-2: Enable SRAM Byte Jumper 3-4: Enable SRAM High Byte
Figure 2-2. Schematic Diagram External CS1/CS2 Memory Interface
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Serial EEPROM/Data FLASH Memory
Serial EEPROM/Data FLASH Memory
1M-bit +3.3V serial EEPROM/Data FLASH Memory, Atmel AT45DB011B-SC, provided DSP56852EVM, reference Figure 2-3. This memory connects directly Port through header DSP56852. used load program code data into DSP56852's internal external memory spaces. Jumper block provided allow user disconnect on-board EEPROM/Data FLASH from port allow connect port peripheral. Since port ISSI port multiplexed DSP56852, port jumpers need removed ISSI port. header details shown Table 2-1.
Data FLASH Enable DSP56852 MOSI/SRFS MISO/SRCK
(SPI Port Connector)
Serial EEPROM Data FLASH
SCLK/STCK SS/STFS/PC3
Figure 2-3. EEPROM Memory Block Diagram
Table 2-1. Port Connector Description
Signal SS/STFS/PC3 MISO/SRCK MOSI/SRFS SCLK/STCK Signal
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RS-232 Serial Communications
DSP56852EVM provides RS-232 interface RS-232 level converter, (Maxim MAX3245EEAI, designated U6). Refer RS-232 schematic diagram Figure 2-4. RS-232 level converter transitions UART's +3.3V signal levels RS-232-compatible signal levels connects host's serial port connector Flow control provided, could implemented using uncommitted GPIO signals. pinout connector listed Table 2-2. RS-232 level converter/transceiver disabled placing jumper JG8.
DSP56852
RS-232 Level Converter Interface
+3.3V
T1in R1out
T1out R1in
FORCEOFF
Jumper Removed: Enable RS-232 Jumper 1-2: Disable RS-232
Figure 2-4. Schematic Diagram RS-232 Interface
Table 2-2. RS-232 Serial Connector Description
Signal Jumper Jumper Signal Jumper Jumper Jumper
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Operating Mode
Clock Source
DSP56852EVM uses 4.00MHz crystal, connected External Crystal Inputs, EXTAL XTAL. achieve 120MHz maximum operating frequency, DSP56852 uses internal multiply input frequency external oscillator source connected using oscillator bypass connectors, JG4; Figure 2-5. input frequency above 4MHz, then EXTAL input should jumpered ground adding jumper between pins input frequency would then injected JG3's needs synchronized codec's sample frequency, then DSP's input frequency should jumpered using 12.2280MHz codec frequency. input frequency below 4MHz, then input frequency injected JG4's
EXTERNAL OSCILLATOR HEADERS
4.00MHz
DSP56852
EXTAL
12.2880MHz
XTAL
Figure 2-5. Schematic Diagram Clock Interface
Operating Mode
DSP56852EVM provides boot-up MODE selection switch, This switch used select operating mode exits RESET. Refer DSP56852 User's Manual complete description chip's operating modes. Table shows operation modes available DSP56852.
Table 2-3. Operating Mode Selection
Operating Mode (ON) 1-2, Comment Bootstrap from External byte-wide memory Bootstrap from Normal Expanded mode Development Expanded mode
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Debug LEDs
on-board Light-Emitting Diodes, (LEDs), provided allow real-time debugging user programs. These LEDs will allow programmer monitor program execution without having stop program during debugging; refer Figure 2-6. Table describes control each LED.
Table 2-4. Control
Controlled User Port Port Port Port Port Port Port Signal
LED1 LED2 LED3 LED4 LED5 LED6
Setting PA2, PC4, PC5, PC3, Logic value will turn associated LED.
DSP56852
YELLOW
INVERTING BUFFER
+3.3V
GREEN
YELLOW
GREEN
Figure 2-6. Schematic Diagram Debug Interface
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Debug Support
Debug Support
DSP56852EVM provides on-board Parallel JTAG Host Target Interface JTAG interface connector external Target Interface support. interface connectors provided support each these debugging approaches. These connectors designated JTAG connector Host Parallel Interface Connector.
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2.8.1 JTAG Connector
JTAG connector DSP56852EVM allows connection external Host Target Interface downloading programs working with DSP56852's registers. This connector used communicate with external Host Target Interface which passes information data back forth with host processor running debugger program. Table shows pin-out this connector.
Table 2-5. JTAG Connector Description
Signal RESET +3.3V Signal TRST
When this connector used with external Host Target Interface, parallel JTAG interface should disabled placing jumper jumper block JG7. Reference Table this jumper's selection options.
Table 2-6. Parallel JTAG Interface Disable Jumper Selection
jumpers Comment On-board Parallel JTAG Interface Enabled Disable on-board Parallel JTAG Interface
2-10
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Debug Support
2.8.2 Parallel JTAG Interface Connector
Parallel JTAG Interface Connector, allows DSP56852 communicate with Parallel Printer Port Windows reference Figure 2-7. Using this connector, user download programs work with DSP56852's registers. Table shows pin-out this connector. When using parallel JTAG interface, jumper should removed, shown Table 2-6.
DB-25 Connector
Parallel JTAG Interface
+3.3V
DSP56852 TRST RESET
P_TRST P_RESET P_DE
Jumper Removed: Enable JTAG Jumper 1-2: Disable JTAG
Figure 2-7. Block Diagram Parallel JTAG Interface
Table 2-7. Parallel JTAG Interface Connector Description
Signal PORT_RESET PORT_TMS PORT_TCK PORT_TDI PORT_TRST PORT_DE Signal PORT_IDENT
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2-11
Table 2-7. Parallel JTAG Interface Connector Description
Signal PORT_IDENT PORT_VCC PORT_TDO PORT_CONNECT Signal
External Interrupts
on-board push-button switches provided external interrupt generation, shown Figure 2-8. allows user generate hardware interrupt signal line IRQA. allows user generate hardware interrupt signal line IRQB. These switches allow user generate interrupts user-specific programs.
+3.3V
DSP56852
0.1µF +3.3V
IRQA
0.1µF
IRQB
Figure 2-8. Schematic Diagram User Interrupt Interface
2-12
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Reset
2.10 Reset
Logic provided DSP56852 generate internal Power-On RESET. Additional, reset logic provided support RESET signals from JTAG connector, Parallel JTAG Interface user RESET push-button; refer Figure 2-9.
JTAG_RESET RESET
RESET PUSHBUTTON MANUAL RESET
TRST JTAG_TAP_RESET
Figure 2-9. Schematic Diagram RESET Interface
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2-13
2.11 Power Supply
main power input, +12.0V DC/AC, DSP56852EVM through 2.1mm coax power jack. optional +5.0V power supply input available through 2-pin terminal block, TB1. +12.0V 1.2A power supply provided with DSP56852EVM; however, less than 500mA required EVM. remaining current available user daughter card applications when connected daughter card interface. power regulation DSP56852EVM provides +5.0V voltage regulation codec's analog circuits additonal voltage regulation logic EVM. additonal voltage regulation logic provides +1.8V voltage regulation DSP's core +3.3V voltage regulation DSP's I/O, memory, parallel JTAG interface supporting logic; refer Figure 2-10. Power applied DSP56852EVM indicated with Power-On LED, referenced LED7.
+12.0V
+5.0V Regulator
Power Condition
+5.0V Analog
CODEC
+5.0V
+3.3V Regulator
+3.3V
DSP56852
DSP56852EVM PARTS
+1.8V Regulator
+1.8V
DSP56852 CORE
Figure 2-10. Schematic Diagram Power Supply
2-14
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Stereo Codec
2.12 Stereo Codec
16-bit audio quality stereo codec, Crystal Semiconductor CS4218, connected DSP56852's ISSI port support audio, voice signal analysis applications. codec clocked with 12.288MHz oscillator. This allows codec operate between sample frequency 8KHz 48KHz. sample rate manually setting appropriate switch positions switch sample rate selections possible using this three-position switch detailed Table 2-8. codec supports +3.3V digital levels, eliminating need voltage level translation circuitry. Additionally, zero resistors provided allow user disconnect on-board codec from ISSI port allow connect codec ISSI port; Figure 2-12. on-board codec analog signal conditioning logic, allowing direct connection line level input line level output signals through 1/8" stereo jacks; reference Figure 2-11.
Table 2-8. Codec Sample Rate Selector
Position (MF6) Position (MF7) Position (MF8) Sample Rate
48.00KHz 32.00KHz 24.00KHz 19.20KHz 16.00KHz 12.00KHz 9.60KHz 8.00KHz
2.12.1 Analog Input/Output
DSP56852EVM uses jacks line-level stereo input, line-level stereo output stereo headphone output. National Semiconductor LM4880 provides drive required headphones. This device offers THD, which superior factor CS4218's on-chip headphone drive circuitry. basic Analog codec connections shown Figure 2-11.
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2-15
CS4218 Line-Level Input
RIN1 LIN1 LOUTL LOUTR
Line-Level Output
LM4880
Headphone Output
Figure 2-11. Codec Analog Connections
2.12.2 Digital Interface
serial interface codec transfers digital audio data control data into device. ISSI port, which multiplexed with port, consists independent transmitter receiver sections used serial communication with codec. side, Serial Transmit Data pin, STXD, output when data being transmitted codec. Serial Receive Data pin, SRXD, input when data being received from codec. These pins connected codec's Serial Data Input, SDIN, Serial Data Output, SDOUT, pins. DSP's Transmit Serial Clock pin, STCK, provides serial rate clock ISSI interface. connected CODEC's Serial Port Clock pin, SCLK. Data transmitted rising edge SCLK received falling edge SCLK. DSP's GPIO PORT pin, PC4, programmed control codec's Active Reset signal, RESET. Serial Transmit Frame Sync pin, STFS, programmed control codec's Frame Sync signal, FSYNC. This signal sampled SCLK, with rising edge indicating frame about start. FSYNC frequency always system's sample rate. input codec, output from codec data mode. basic codec digital connections shown Figure 2-12, Table Table 2-10. codec's MODE three MODE selection resistors, R66-R68. factory default setting MODE codec Master ISSI with data word bits frame; i.e., bits Left channel bits Right channel. sample rate selected Sample Rate Selector switch Table selection options. Codec control information sent over separate serial port using: Control Chip Select signal, CCS; Control Data Input signal, CDIN; Control Clock signal, CCLK.
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Stereo Codec
DSP56852 STXD SRXD STCK STFS
CODEC Enable Logic
CS4218 SDIN SDOUT SCLK FSYNC RESET
JG10 CDIN CCLK
Figure 2-12. CS4218 Stereo Audio Codec
Table 2-9. Port Connector Description
Signal STXD SRXD STCK STFS Codec Signal SDIN SDOUT SCLK FSYNC RESET
Table 2-10. GPIO Port Connector Description
JG10 Signal Codec Signal CDIN CCLK
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2-17
2.13 Daughter Card Connectors
board contains daughter card expansion connectors. connector, contains DSP's external memory signals. other connector, contains DSP's peripheral port signals.
2.13.1 Memory Daughter Card Expansion Connector
DSP's external memory signals connected Memory Daughter Card Expansion connector, Table 2-11 shows port signal-to-pin assignments.
Table 2-11. Memory Daughter Card Connector Description
Signal Signal
2-18
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Daughter Card Connectors
Signal A19/CS3 +3.3V +5.0V Signal +3.3V
2.13.2 Peripheral Daughter Card Expansion Connector
DSP's peripheral port signals connected Peripheral Daughter Card Expansion connector, Table 2-12 shows port signal-to-pin assignments.
Table 2-12. Peripheral Daughter Card Connector Description
Signal CS0/PA0 A20/CLKO A17/TIO0 SRXD MOSI/SRFS SCK/SCLK MOSI MISO Signal CS1/PA1 CS2/PA2 A18/TIO1 CS0/PA0 CS1/PA1 CS2/PA2
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2-19
Table 2-12. Peripheral Daughter Card Connector Description (Continued)
Signal MISO/SRCK SS/STFS RESET STXD SCK/STCK IRQB IRQA +3.3V +5.0V Signal +3.3V
2.14 Test Points
DSP56852EVM board total seven test points. Three digital test points located corners board. +5.0VA AGND test points located analog corner board. +1.8V +3.3V test points located power supply section board.
2-20
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Appendix DSP56852EVM Schematics
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DSP56852EVM Schematics More Information This Product, www.freescale.com
/CS0 /CS1 /CS2 /TRST XTAL EXTAL IRQA IRQB STXD/PC0 SRXD/PC1 SCK/STCK/PC2 SS/STFS/PC3 MISO/SRCK/PC4 MOSI/SRFS/PC5 RXD/PE0 TXD/PE1 A17/TIO0 A18/TIO1 A19/CS3 A20/CLKOUT VDDC1 VDDC2 VDDC3 VSSC1 VSSC2 VSSC3 VDD1 VDD2 VDD3 D13/MODEA VDD4 D14/MODEB VDD5 D15/MODEC VDD6 CS0/PA0 CS1/PA1 CS2/PA2 TRST RESET VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 XTAL EXTAL /IRQA /IRQB STXD MISO MOSI /CS2 74AC04AD MISO
+3.3V
YELLOW
74AC04AD U14C MOSI
+1.8V
GREEN
74AC04AD U14D +3.3V
DSP56852EVM User's Manual MOTOROLA
74AC04AD 74AC04AD U14F 74AC04AD
YELLOW
GREEN
VDDA VSSA
DSP56852VF120
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
Title Size
DSP56852 Processor DEBUG LEDS Document Number DSP56852EVM.DSN Designer: DSPD Design Sheet
Rev.
Date: Thursday, January 2002
Figure A-1. DSP56852 Processor DEBUG LEDS
MOTOROLA
+3.3V VCC/3 4.00MHz EXTAL
IRQA PUSHBUTTON
BYPASS
XTAL +3.3V 0.1uF
/IRQA
+3.3V
12.288MHZ
+3.3V
IRQB PUSHBUTTON
VCC/2
/IRQB 0.1uF /POR
DSP56852EVM Schematics
RESET PUSHBUTTON
0.1uF
+3.3V MODA 470K
+3.3V DS1818 /POR
MODB
470K MODC
Boot MODE Select
470K
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284
DS1818
(480) 413-5090
FAX: (480) 413-2510
Title Size
RESET, CLOCK, BOOT MODE IRQS Document Number DSP56852EVM.DSN Designer:
Rev. Sheet
Date: Thursday, January 2002
Figure A-2. RESET, CLOCK, BOOT MODE IRQs
128Kx16-bit Program Memory (CS0)
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 +3.3V
128Kx16-bit Data Memory (CS1/CS2)
/CS1 /CS2 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 +3.3V
+3.3V
/CS0 /ECS0
DSP56852EVM User's Manual MOTOROLA
GS72116ATP-7
GS72116ATP-7
+3.3V
CS1/CS2 ENABLE JUMPER
OPTION SRAM WORD ENABLE SRAM UPPER BYTE ENABLE
ENABLE JUMPER
OPTION SRAM ENABLE SRAM DISABLE
/ECS1
/ECS2
SRAM LOWER BYTE ENABLE
SRAM DISABLE
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
Title Size
[WORD] (CS0) DATA [BYTE] (CS1/CS2) SRAM MEMORY Document Number DSP56852EVM.DSN Designer: DSPD Design
Rev. Sheet
Date: Sunday, October 2002
Figure A-3. Program [Word] (CS0) Data [Byte] (CS1/CS2) SRAM Memory
MOTOROLA
+3.3V MISO MOSI /EE_CS EE_SO EE_SI EE_SCK RESET /RST
DSP56852EVM Schematics
EEPROM Enable
AT45DB011B-SC
+3.3V /RST
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
Title Size
Serial Document Number DSP56852EVM.DSN Designer:
Rev. Sheet
Date: Thursday, January 2002
Figure A-4. Serial 1M-bit Serial EEPROM Memory
+3.3V C1C2+ C2GND
T2IN T3IN T1IN T2IN T3IN R2OUTB R1OUT R2OUT R3OUT R4OUT R5OUT FORCEON INVALID FORCEOFF MAX3245EEAI T1OUT T2OUT T3OUT R1IN R2IN R3IN R4IN R5IN
DSP56852EVM User's Manual MOTOROLA
+3.3V
R2IN R3IN R4IN R5IN
+3.3V
RS-232 ENABLE
RS-232 CONNECTOR
T2IN T3IN R2IN R3IN R4IN R5IN
RS-232 ENABLE RS-232 DISABLE
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
Title Size
PORT, RS-232 CONNECTOR Document Number DSP56852EVM.DSN Designer:
Rev. Sheet
Date: Thursday, January 2002
Figure A-5. PORT, RS-232 Connector
20.0K 20.0K BYPASS SHUTDN
IN_B
OUT_B
MOSI
IN_A BYPASS SHUTDN
OUT_A
MOTOROLA
5.62K 1/8" RING_IN
0.33uF 5.62K /PDN MODE1 ROUT LOUT 0.47uF 0.47uF 0.47uF 12.288MHZ .288MHZ /PDN CODEC_FSYNC CODEC_SDIN +5.0VA LIN1 REFBUF SWODE3 SWODE2 SWODE1 CLKIN RESET SSYNC SCLK SDOUT SDIN VDDA GNDA 4218-KQ REFBY 0.1uF REFGND +3.3V CODEC_SDIN CODEC_FSYNC ROUT RING_PHN 10VDC TIP_PHN SHUTDN 10VDC MODE3 MODE2 MODE1 /CCS /CCS CCLK CDIN 0.0022uF 0.0022uF ROUT RING_OUT TIP_OUT MODE2
+3.3V
TIP_IN 5.62K 5.62K 0.33uF
RIN1
Line-Input Stereo Jack
RIN2
39.2K
Line Stereo Jack
1/8"
MODE3
LIN2
DSP56852EVM Schematics
STXD MISO
STCK STFS
/CCS CDIN CCLK
LOUT
Headphone Stereo Jack
10VDC 1/8"
Sample Select
+5.0VA
SERIAL MODE SELECTED MASTER, 32BITS FRAME
(KHZ) 48.00 32.00 24.00 19.20 16.00 12.00 9.60 8.00
LM4880M
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
Mode Select
Title Size
16-BIT STEREO CODEC Document Number DSP56852EVM.DSN Designer: DSPD Design Sheet
Rev.
Date: Thursday, January 2002
Figure A-6. 16-Bit Stereo Codec
Parallel JTAG Interface
DENT DB25M NECT RT_TDO RT_RESET PORT_TMS RT_TCK RT_TRST
5.1K MC74LCX244D P_RESET /J_TRST +3.3V 5.1K
+3.3V
DSP56852EVM User's Manual MOTOROLA
5.1K
On-Board Host Target Interface Disable
/J_TRST +3.3V 5.1K U10A P_RESET 5.1K /J_TRST AC00 AC00 2N2222A /POR AC00 U10C /TRST AC00 U10D /RESET /J_TRST
JTAG Connector
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
2N2222A
Title
PARALLEL JTAG HOST TARGET INTERFACE JTAG CONNECTOR Document Number DSP56852EVM.DSN Designer: DSPD Design Sheet
Size
Rev.
Date: Thursday, January 2002
Figure A-7. Parallel JTAG Host Target Interface JTAG Connector
MOTOROLA
/CS0 +3.3V +5.0V /CS1 /CS2 +3.3V CLKO /CS0 SRXD MOSI MOSI MISO SRCK STFS MISO /RESET STXD /IRQB /IRQA +3.3V +5.0V TIO0
TIO1 /CS1 /CS2
SRFS SCLK
/CS0 /CS1 /CS2 RXD1 TXD1 +3.3V
DSP56852EVM Schematics
STCK
/CS3
Daughter Address/Data Connector
Daughter Peripheral Port Connector
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
Title Size
CARD EXPANSION CONNECTORS Document Number DSP56852EVM.DSN Designer:
Rev. Sheet
Date: Thursday, January 2002
Figure A-8. Daughter Card Expansion Connectors
A-10
EXTERNAL POWER INPUT 7-12VDC/AC
FM4001 +5.0V VOUT VOUT 0.1uF
FM4001
VOUT VOUT FERRITE BEAD MC33269DT-3.3 47uF 10VDC +3.3V
470uF 16VDC
MC33269DT-5
DSP56852EVM User's Manual MOTOROLA
FM4001 +5.0V 0.1uF +5.0VA VOUT VOUT FERRITE BEAD MC33269DT-ADJ 47uF 10VDC +1.8V
+5VDC INPUT
+5.0V FERRITE BEAD 0.1uF FERRITE BEAD
Rhigh
47uF 10VDC
Vout 1.25( (Rlow/Rhigh)) Rlow 1.8V Rlow 2.5V Rlow 1.9V
Rlow
+3.3V
5.0V, 3.3V REGULATOR
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
LED7
Title Size
SUPPLIES Document Number DSP56F852EVM.DSN Designer:
Rev. Sheet
POWER GOOD
MC33269
Date: Thursday, January 2002
Figure A-9. Power Supplies
0.01uF
0.1uF
0.01uF
0.1uF
MOTOROLA
DSP56852
+3.3V 0.01uF +3.3V 0.1uF +3.3V 0.01uF +3.3V 0.1uF +3.3V 0.01uF +3.3V 0.1uF +1.8V 0.01uF +1.8V 0.1uF +1.8V 0.01uF +1.8V 0.1uF +3.3V 0.01uF +3.3V 0.1uF
Near VDDA GS72116
+3.3V 0.1uF 0.01uF +3.3V 0.1uF
GS72116
+3.3V 0.01uF
AT45DB011
+3.3V 0.01uF
74AC04
+3.3V 0.1uF
74AC00
+3.3V 0.1uF
DS1818
+3.3V 0.01uF
MAX3245
+3.3V 0.1uF
74LCX244
+3.3V 0.1uF
+3.3V
DSP56852EVM Schematics A-11
CS4218
+3.3V
+3.3V
LM4880
+5.0VA +5.0VA
+3.3V
ANALOG GROUND TEST POINT
GROUND TEST POINT
+3.3V
+1.8V
+5.0VA TEST POINT
+3.3V TEST POINT
+1.8V TEST POINT
Standard Products Division
2100 East Elliot Road Tempe, Arizona 85284 (480) 413-5090 FAX: (480) 413-2510
Title Size
BYPASS CAPS Document Number DSP56852EVM.DSN Designer:
Rev. Sheet
Date: Thursday, January 2002
Figure A-10. Bypass Caps
A-12
DSP56852EVM User's Manual More Information This Product, www.freescale.com
MOTOROLA
Appendix DSP56852EVM Bill Material
Description Ref. Designators Integrated Circuits DSP56852 GS72116 AT45DB011 CS4218 MAX3245 +3.3V Voltage Regulator +1.8V Voltage Regulator 74LCX244 74AC00 12.288MHz LM4880 +5.0V Voltage Regulator 74AC04 DS1818 Resistors 5.1K R10, R14, R15, R17, R18, R78, R83, SMEC, RC73L243OHMFT SMEC, RC73L107OHMFT SMEC, RC73L2A270OHMJT SMEC, RC73L2A51OHMJT SMEC, RC73L2A5.1KOHMJT SMEC, RC73L2A47KOHMJT Motorola, DSP56852VF120 GSI, GS72116ATP-7 Atmel, AT45DB011B-SC Crystal Semiconductor, CS4218-KQ Maxim, MAX3245EEAI Semiconductor, MC33269DT-3.3 Semiconductor, MC33269DT-ADJ Semiconductor, MC74LCX244ADW Fairchild, 74AC00SC Epson, SG-531P-12.288MC National Semiconductor, LM4880M Semiconductor, MC33269DT-5 Semiconductor, MC74AC04AD Dallas Semiconductor, DS1818 Vendor Part
MOTOROLA
DSP56852EVM Bill Material More Information This Product, www.freescale.com
Description
Ref. Designators R19, R20, R23, R21, R22, R24, R26, R31, R34-R36, R38, R58-R61, R64, R70, R71, R82, R27, R32, R33, R50-R57, R62, R63, R37, R39, R42, R41, R43, R66, Inductors
Vendor Part SMEC, RC73L2A10MOHMJT SMEC, RC73L2A5.62KOHMFT SMEC, RC73L2A10KOHMJT
5.62K
39.2K 20.0K 470K
SMEC, RC73L2A39.2KOHMFT SMEC, RC73L2A1KOHMJT
SMEC, RC73L20.0KOHMFT SMEC, RC73L2A470KOHMJT SMEC, RC73L2A10KOHMJT SMEC, RC73JP2A SMEC, RC73JP2A
1.0mH FERRITE BEAD
LEDs
Panasonic, EXC-ELSA35V
Yellow Green
LED1, LED4 LED2, LED5 LED3, LED6, LED7 Diode
Hewlett-Packard, HSMS-C650 Hewlett-Packard, HSMY-C650 Hewlett-Packard, HSMG-C650
S2B-FM401 +50V BRIDGE RECT
Vishay, DL4001DICT DIODES, DF02S
DSP56852EVM User's Manual More Information This Product, www.freescale.com
MOTOROLA
Description
Ref. Designators
Vendor Part
Capacitors 470µF, +16V 0.1µF C20, C32, C34, C36, C38, C40, C42, C44, C46, C48, C50, C51, C53, C54, C56, C19, C22, C10, C12, C21, C23, C14, C33, C35, C37, C39, C41, C43, C45, C47, C49, C52, C55, ELMA, RV-16V471MH10R SMEC, MCCE104K2NR-T1
47µF, +16V 0.33µF 470pF 1.0µF, +25V 0.0022µF 0.47µF 0.01µF
ELMA, RV2-16V470M-R SMEC, MCCE334K3NR-T1 SMEC, MCCE471J2NO-T1 SMEC, MCCE105K3NR-T1 SMEC, MCCE222K2NR-T1 SMEC, MCCE474K3NR-T1 SMEC, MCCE103K2NR-T1
Jumpers Header Header Header Header Header Header JG2, JG7, JG3, JG1, JG10 Test Points Black Test Point Test Point White Test Point Yellow Test Point TP1, TP3, TP6, Crystals 4.00MHz Crystal CTS, ATS04ASM-T Keystone, 5001 Keystone, 5000 Keystone, 5002 Keystone, 5004 SAMTEC, TMM-102-02-S-S SAMTEC, TMM-103-02-S-S SAMTEC, TMM-104-02-S-D SAMTEC, TMM-102-02-S-D SAMTEC, TMM-105-02-S-D SAMTEC, TMM-103-02-S-D
MOTOROLA
DSP56852EVM Bill Material More Information This Product, www.freescale.com
Connectors DB25M Connector 2.1mm coax Power Connector 1/8" Stereo Jack DE9S Connector 51-Pin Connector Bergstick 2-Pin Terminal Block Switches SPST Pushbutton 3-Position Transistors 2N2222A Miscellaneous Shunt Rubber Feet SH19 Samtec, 2SN-BK-G SJ5018BLKC ZETEX, FMMT2222ACT Panasonic, EVQ-PAD05R CTS, 209-3LPST AMPHENOL, 617-C025P-AJ121 Switchcraft, RAPC-722 Switchcraft, 35RAPC4BHN2 AMPHENOL, 617-C009S-AJ120 BERG, 91930-21151 SAMTEC, TSW-107-07-S-D On-Shore Technology, ED500/2DS
DSP56852EVM User's Manual More Information This Product, www.freescale.com
MOTOROLA
Index
Clock Source Codec viii Codec sample rate selector Connecting DSP56852EVM Cables Connectors Memory Daughter Card Expansion 2-18
Host Parallel Interface Connector Host Target Interface
ISSI
Daughter Card Connectors 2-18 Daughter Card Expansion interface Debugging viii DSP56852EVM M-bit Serial EEPROM/Data FLASH 12.0V power supply 2-14 128Kx16-bit data memory (U3) 128Kx16-bit memory (U2) 16-bit 1.8V/3.3V Digital Signal Processor 16-bit stereo codec interface 4.00MHz crystal oscillator external oscillator frequency input FSRAM ISSI compatible peripheral JTAG port interface On-board power regulation Parallel JTAG Host Target Interface real-time debugging RS-232 interface compatible peripheral test points 2-20
JTAG 1-1, connector 2-10 Jumper Group JG10
MBGA MPIO
EEPROM viii EOnCE viii
Operating Mode
FSRAM
GPIO
RS-232
MOTOROLA
Index More Information This Product, www.freescale.com
interface 2-1, level converter schematic diagram RS-232 Serial Communications
SRAM external data external program stereo 16-bit codec interface Stereo headphone interface
DSP56852EVM User's Manual More Information This Product, www.freescale.com
MOTOROLA
More Information This Product, www.freescale.com
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola Stylized Logo registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
MOTOROLA Stylized Logo registered Patent Trademark Office. other product service names property their respective owners. Motorola, Inc. 2002. reach USA/EUROPE/Locations Listed: Motorola Literature Distribution; P.O. 5405, Denver, Colorado 80217. 1-303-675-2140 1-800-441-2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu. Minato-ku, Tokyo 106-8573 Japan. 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, King Street, Industrial Estate, N.T., Hong Kong. 852-26668334 Technical Information Center: 1-800-521-6274 HOME PAGE:
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DSP56F852EVMUM/D
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