Conversion Using bq2031 bq2031 incorporates necessary control cir
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U-511 Switch-Mode Power
Conversion Using bq2031
bq2031 incorporates necessary control circuitry support switch-mode voltage current regulation, required charge control function block. This application note describes configure bq2031 buck mode switching power supply topology. methodology phase compensation voltage current feedback loops recommended. brief description control circuitry phase compensation criteria appears below, followed discussion dealing with topology-specific issues. relationship CPWM switching frequency, given Equation where:
CPWM
CPWM
Pulse-Width Modulator
bq2031 incorporates voltage mode direct duty cycle Pulse-Width Modulators, each control loop (voltage current). block diagram shown Figure Each runs common saw-tooth waveform whose time-base controlled capacitor, CPWM TPWM pin.
either loop consists comparator whose positive terminal driven output sawtooth ramp signal, while negative terminal driven output Operational Transconductance Amplifier (OTA). output control signal, output each logically ORed generate constant frequency pulse width modulated rectangular waveform output. relationship output with respect control signal, sawtooth ramp signal, shown Figure
Figure Block Diagram bq2031 Control Circuitry
6/96
Switch-Mode Power Conversion Using bq2031
output swings rail-to-rail source sink 10mA. used control switching transistor switch-mode application. pulse width modulated square wave signal synchronized internal sawtooth ramp signal. ramp-down time (TD) fixed approximately total period (TP). This condition limits maximum duty-cycle approximately 80%. example, with switching frequency 100kHz, 2µs.
Voltage Current Control Loops
independent function blocks implement direct duty cycle control current voltage regulation. During current regulation feedback signal voltage across current sense resistor, RSNS, shown current feedback loop model Figure current regulation total open-loop transfer function, IL(s), expressed Equation A(s) where:
Phase Compensation
feedback control system, phase compensation necessary achieve both loop stability dynamic line load response. shown block diagram (Figure bq2031 provides highimpedance nodes, ICOMP VCOMP, current voltage loop phase compensation. battery charger application dynamic load response much concern loop stability, especially during voltage regulation.
A(s) error amplifier compensation network transfer function, VC/VO P(s) transfer function, D/VC PT(s) power train transfer function, VO/D duty cycle waveform
3.6V Sawtooth Ramp (VS) 1.9V
*Dead Time
Control Signal (VC)
*Exaggerated Clarity
TD203103.eps
Figure Relationship Output Sawtooth Waveform Control Signal
Switch-Mode Power Conversion Using bq2031
During voltage regulation, feedback signal voltage sensed midpoint battery voltage divider (between RB2). voltage feedback control loop modeled shown Figure
bq2031 Error 275mV IREF Error A(s)
Output Power Stage Power Switch Output Power Filter RSNS
PW(s)
ICOMP
PT(s)
FG203106.eps
Figure Model Current Control Loop
bq2031 Error 2.2V VREF Error A(s)
Output Power Stage Power Switch Output Power Filter
PW(s)
VCOMP
PT(s)
FG203107.eps
Figure Model Voltage Control Loop
Switch-Mode Power Conversion Using bq2031
voltage regulation, total open-loop transfer function, VL(s), expressed Equation A(s) where:
where:
DMAX maximum duty cycle waveform peak-to-peak amplitude sawtooth waveform
PT(s) transfer function output power stage, VO/D.
switching frequency circuit topology system dictate gain-frequency characteristics output power stage. characteristics fixed within bq2031. This situation leaves associated compensation network only function block whose characteristics changed achieve desired loop stability response.
bq2031, fixed 1.7V, maximum duty cycle 80%. This condition reduces transfer function Equation 0.47 PT(s) (the transfer function output power stage) given Equation
Error Amplifier
bq2031 error amplifiers (Operational Transconductance Amplifier) type. parameters interest (see Figure are:
Transconductance gain, 0.42 milli-mhos Output resistance error amplifier, 250k Gain Bandwidth product 80MHz
where:
complex variable input voltage equivalent internal battery capacitance (see Figure inductor value inductor resistance equivalent internal battery resistance (see Figure RSNS sense resistor value equivalent battery load resistance (see Figure
This situation fixes maximum voltage gain (gm*R) 40.4dB, which good corner frequency 2MHz. Note that 40dB gain maximum achievable, regardless impedance across output ground.
Criteria Loop Stability
gain phase characteristics associated circuitry must adjusted meet following three criteria loop stability: Total open-loop gain (IL(s) VL(s) above) must forced crossover frequency (FC) equal least switching frequency (FS). phase total open-loop gain must least degress less than degrees.
above criteria loop stability easily achieved total loop-gain transfer function exhibits dominant pole characteristics shown Figure
Stabilizing current loop requires compensation loop error amplifier such that transfer function A(s) dominant pole characteristics. This achieved adding capacitor, between ground output error amplier shown Figure transfer function A(s) given A(s)
Stabilizing Current Loop
From Equation total open-loop transfer function expressed A(s) P(s) (the transfer function PWM) given
Switch-Mode Power Conversion Using bq2031
Dominant Pole
Gain (dB)
Crossover Frequency
Switching Frequency
10^3 Frequency (Hz) 10^4 10^5 10^6
Phase (deg.)
-100 10^3 Frequency (Hz)
GR203105.eps
10^4
10^5
10^6
Figure Target Gain Phase Characteristics Stable Closed-Loop System
Switch-Mode Power Conversion Using bq2031
Substituting values get: Equation A(s) where:
resultant transfer function compensated error amplifier expressed Equation A(s) where:
250000
RB1*CF (2.5
output capacitance error amplifier (see Figure
Battery voltage divider ratio during voltage regulation: ((RB2 RB3) RB1)
Substituting Equations Equation gives compensated total current loop gain transfer function: Equation 0.47 250000
Note: application note entitled "Using bq2031 Charge Lead-Acid Batteries" instructions calculating RB1, RB2, RB3.
shown bode plot IL(s) (Figure varied achieve necessary phase gain margin different values.
resistor value between high side battery stack battery voltage divider network capacitance parallel with series resistance between VCOMP ground series capacitance between VCOMP ground
Stabilizing Voltage Loop
Recalling Equation voltage regulation open-loop transfer function expressed A(s) output power stage transfer function PT(s) depends inductor battery impedances. components required compensate error amplifier achieving voltage loop stability appear Figure
(See Figure Voltage Loop Error Amplifier Compensation below calculating values CV.) above transfer function contributes poles zeros.
IREF
ICOMP
275mV
RSNS
FG203108.eps
Figure Compensation Network Current Loop
Switch-Mode Power Conversion Using bq2031
Phase (deg.)
-100 10^3 10^4 10^5 10^6
Frequency (Hz)
Gain (dB)
-100
Figure Bode Plot Current Loop-Gain Transfer Function
Switch-Mode Power Conversion Using bq2031
Poles (Equation (2.5 Zeros (Equation lates voltage (VSNS) temperaturecompensated reference 0.275V. This turn regulates current IMAX, provided that properly designed resistor network use. passive component ICOMP VCOMP form phase compensation network current voltage control loops, respectively. diode (Db1) prevents battery drain when absent, while pull-up resistor detects battery removal. resistor R13, typically tens optional depends battery impedance resistance battery leads from charger board.
Output Power Stage
output power stage buck topology charger comprises inductor parallel combination output capacitor, impedance battery (see Figure 12). output capacitor electrolytic range from 47µF 100µF. nullifies inductive effect long leads from charger terminals battery.
effect this feedback compensation network transfer function A(s) shown Figure
Voltage Loop Compensation Buck Topology
Figure shows functional diagram switch-mode buck topology converter using bq2031. battery voltage divided down per-cell equivalent value pin. During voltage regulation, voltage (VBAT) regulated internal band-gap reference 2.2V (with temperature drift -3.9mV/°C). charge current through inductor sensed across resistor RSNS. During current regulation, bq2031 regu-
Inductor Selection
inductor selection criteria DC-DC buck converter vary depending charging algorithm used. Two-Step Current Pulsed Current charge algorithms, inductor equation
VREF 2.2V
VCOMP
FG203109.eps
Figure Compensation Network Voltage Loop
Switch-Mode Power Conversion Using bq2031
Phase (deg.)
10^3 Frequency (Hz) 10^4 10^5 10^6
Gain (dB)
10^3 Frequency (Hz)
GR203107.eps
10^4
10^5
10^6
Figure Effect Compensation Network Amplifier Transfer Function, A(s)
Switch-Mode Power Conversion Using bq2031
Figure Functional Diagram Switch-Mode Buck Regulator Lead-Acid Charger Using bq2031
Switch-Mode Power Conversion Using bq2031
Equation where:
VBLK 0.5)
configured Two-Step Voltage mode, with IMIN IMAX/20. inductor value required 2.45 267µH 0.1375)
number cells VBLK bulk voltage cell, volts switching frequency, Hertz ripple current IMAX, amperes
Model Lead Acid Battery
battery impedance represented capacitor (CB) series with internal impedance shown Figure capacitance empirically derived from amp-hour rating battery. rule thumb where capacity battery ampere-hours. internal resistance lead-acid battery dictated
ripple current usually between 20-25% IMAX. Example: 6-cell battery charged IMAX 2.75A buck topology running 100kHz. VBLK threshold 2.45V cell charger configured Pulsed Current mode. Assuming ripple IMAX, inductor value required 2.45 0.5) 107µH 0.6875) inductor current, which must remain continuous down IMIN during Fast-Charge phase (voltage regulation phase), dictates inductor formula TwoStep Voltage charge algorithm. Equation VBLK
Number cells, Amp-hour capacity, State charge
Figure shows variation internal impedance Yuasa NP6-12 (12V, amp-hrs) battery function state charge. average value impedance swing recommended loop stability equations. example, with battery above, 0.05 recommended. resistor models loading effects battery when voltage equivalent VBLK (typically 2.45V/cell) applied across battery. range values takes depends bulk charge current, bulk voltage, IMIN IMAX ratio. example:
Example: 6-cell battery charged IMAX 2.75A buck topology running 100kHz. VBLK threshold 2.45V cell charger
Battery
FG203110.eps
Figure Model Output Filter Buck Topology
Switch-Mode Power Conversion Using bq2031
battery being charged IMAX exhibits following range with IMIN/IMAX ratio 1:20. (min) 2.45
second pole used these calculations:
2.45 (max) 0.15 minimum value worst-case scenario loop stability.
Typical Switch-Mode Buck Charger Specifications
application specifications switch-mode buck topology charger usually given
Power Stage Transfer Function
transfer function output power stage, PT(s) expressed Equation where:
input voltage, Switching frequency, 100kHz, 10µs Charge algorithm Two-Step Voltage mode:
VBLK 2.45V/cell VFLT 2.2V/cell IMAX IMIN IMAX/30 300mA
Battery specs: 12V, 10A-hr, Internal impedance: 0.02 0.07
poles zeros PT(s) are: Equation
Internal Resistance Terminal Voltage
Output Power Stage Transfer Functions
Starting again from basic voltage regulation loopgain transfer function (Equation given A(s)
Internal Battery Resistance
1.53A 300mA 1.02A 560mA
Discharge Time (Hours)
GR203108.eps
Figure Internal Resistance Yuasa NP6-12 Battery State Charge
Switch-Mode Power Conversion Using bq2031
This equation written A(s) G(s) where G(s) combined transfer function P(s) PT(s) Combining Equations Equation G(s) 0.47 zeros A(s), fz2, cancel second-order poles G(s) fpo: fpo/2 263/2 131.5 From Equation 10's first zero, fz1: 463nF fz1)
From Equation second pole, fp2: fp2= achieve loop-gain compensated amplifier gain must forced absolute gain G(s) crossover frequency, which determined from Bode plot Figure -31dB 35.48. value determined from gain magnitude equation A(s)
Based typical values section above, worst-case values loop parameters are:
0.05 1000µF 2.45 0.5) 367.5µH
From Equation
Using value 35.48 A(fp2) above equation gives: 35.48 35.48 15.75
resulting bode plots G(s) shown below. Since plots exhibit similar characteristics that output power filter, Equation used determine poles zeros:
263Hz 3183Hz
Plugging this value into equation yields: 2.7nF
Voltage Loop Error Amplifier Compensation
this control loop, appropriate values must found compensation components COMP pin. From Table "Using bq2031 Charge Lead-Acid Batteries," values divider network components are:
Substituting these values equation gives: 84.2Hz (450 (2.5 2.7nF
RB1=261K RB2=49.9K RB3= 475K (RB2 RB3) 0.15 (RB2 (RB1 (RB2 RB3)))
Figures show resultant Bode loop gain plots A(s), respectively.
Current Loop Error Amplifier Compensation
this control loop, value must found compensation component ICOMP pin. compensation network component must chosen such that current loop gain transfer function dominant pole 1/20th switching frequency, F(s). 131.5 (2.5 4.84nF (2.5 131.5
Therefore
From first criterion loop stability, crossover frequency loop-gain) 1/20th switching frequency: FS/20 5kHz
Switch-Mode Power Conversion Using bq2031
Phase (deg.)
-120 10^3 Frequency (Hz) 10^4 10^5 10^6
Gain (dB)
10^3 Frequency (Hz)
GR203109.eps
10^4
10^5
10^6
Figure Bode Plot G(s)
Switch-Mode Power Conversion Using bq2031
Phase (deg.)
10^3 Frequency (Hz) 10^4 10^5 10^6
Gain (dB)
10^3 Frequency (Hz)
GR203110.eps
10^4
10^5
10^6
Figure Bode Plot Error Amplifier, A(s)
Switch-Mode Power Conversion Using bq2031
Phase (deg.)
-100 10^3 Frequency (Hz) 10^4 10^5 10^6
Gain (dB)
10^3 Frequency (Hz)
GR203111.eps
10^4
10^5
10^6
Figure Loop Gain Bode/Example Buck Charger Design
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