AN97077 UBA1710M modulator GSM/DCS/PCS amplifiers Applicatio

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AN97077 UBA1710M modulator GSM/DCS/PCS amplifiers Applicatio

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Application UBA1710M modulator GaAs power amplifiers
AN97077
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Abstract
UBA1710M monolithic silicon modulator transmission GSM/DCS/PCS applications. This report contains description device mode operation association with GaAs power amplifier
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
APPLICATION UBA1710M MODULATOR
AN97077
Author: Jean-Pierre Manhout Technical Marketing, Telecom Product Group Caen, France
Keywords Telecom Demonstration board UBA1710M Power controller/modulator Buffer Comparator Bandwidth Charge pump Switch Power amplifier Negative supply
Date: 7th, 1997
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Summary This report intended provide support designing power control GSM/DCS/PCS applications with GaAs power amplifier. contains general description circuit well more in-depth analyse different blocks implemented controller application example UBA1710M given means board description testing performances. Some additional informations concerning optimisation modulator when this used under GSM/DCS/PCS standards also available this document
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
CONTENTS INTRODUCTION PINNING CIRCUIT DESCRIPTION.8 General block diagram Voltage tripler circuit.9 Negative voltage Power management Shut down circuit.11 Power switch buffer.12 Oscillator.13 MODE OPERATION.13 GENERAL CHARACTERISTICS CIRCUIT DIAGRAM RECOMMENDATIONS Circuit diagram.15 Recommendations PRINTED CIRCUIT BOARD LAYOUT-LIST COMPONENTS Circuit layout. Part list power amplifier with UBA1710.18 ELECTRICAL CHARACTERISTICS Control curve Turn-on time (tripler negative voltage Rdson versus power switches ).20 Buffer bandwidth Switching time /settling time
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
LIST FIGURES FIG. CONFIGURATION FIG. GENERAL BLOCK DIAGRAM. FIG. VOLTAGE TRIPLER FIG. NEGATIVE VOLTAGE CIRCUIT.10 FIG. POWER MANAGEMENT.11 FIG. SHUT DOWN CIRCUIT.12 FIG. POWER SWITCH BUFFER FIG. OSCILLATOR.13 FIG. CIRCUIT DIAGRAM FIG. CIRCUIT LAYOUT FIG. CONTROL CURVE FIG. TRIPLER TURN-ON TIME.19 FIG. NEGATIVE VOLTAGE TURN-ON TIME FIG. MOS1 RDSON FIG. MOS2 RDSON FIG. BUFFER BANDWIDTH FIG. SWITCHING TIME/SETTLING TIME
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
INTRODUCTION
This note describes application monolithic silicon devices plastic packages DCS/PCS power control GaAs amplifiers. Their main features are: -low cost -100% -high performance -low Rdson switches -Negative voltage board -Power management idle mode -Wide bandwidth feedback loop amplifier -4.8 operation
PINNING
pinning shown Fig.1.
SYMBOL NC3P NC3N TC1N TC1P TC2N TC2P BUFI
DESCRIPTION charge pump tank capacitor charge pump tank capacitor negative bias voltage analog. supply voltage ground charge pump tank capacitor digital supply voltage charge pump tank capacitor charge pump tank capacitor charge pump tank capacitor positive tripler voltage buffer input power source power source power drain
Rext
power drain power source power drain external resistor stand input (active high)
NC3p NC3n TC1n TC1p TC2n TC2p
Rext BUFI
Fig. configuration
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
CIRCUIT DESCRIPTION General block diagram
described fig.2. controller built double power switch drain voltages applied power amplifier order control power level transmit path These power devices connected parallel separately power amplifier output driver stages drain circuits transistors switching buffer used drive these ones buffer output voltage capability much higher than battery voltage order saturate turn power rated maximum output power level with minimum insertion losses voltage tripler used supply buffer This voltage converter necessary allow high positive voltage swing buffer output drive power devices negative voltage also built bias gates GaAs power amplifier This negative voltage adjust externally with resistor tripler voltage negative bias charge pump circuits internal clock/oscillator drives simultaneously these blocks power management block disables input control ramp applied buffer long negative bias available Finally stand circuit circuit idle mode when activated
TC1N TC1P TC2N TC2P
CLOCK
NC3N NC3P Rext
VOLTAGE TRIPLER POWER MOS2 POWER MOS1
NEGATIVE BIAS
BUFFER
POWER MANAGEMENT
BUFI
Fig. General block diagram
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Voltage tripler circuit
voltage tripler described fig.3. circuit works basis charge pump circuits with transferred charges from capacitor other first step switches closed while opened charged Vbat .Then switches closed opened discharged with additional voltage Vbat applied .The peak voltage across this capacitor then 2*Vbat third step closed once more with opened discharges with additional applied previous peak voltage present across (2*Vbat This voltage appearing across 3*Vbat group switches operated alternately through switches control block long Vtriple reached value given ratio [(R1+R2)/R2 ]*Vbg band voltage applied inverting port comparator When this voltage value reached output level comparator goes zero ,disabling switches control turn stopping capacitors charging/discharging process Theorically Vtriple 3*Vbat practically voltage regulated constant level 11.8V
CLOCK
SWITCHES CONTROL BAND Vbat COMPARATOR Triple
Fig. Voltage tripler
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Negative voltage
negative voltage block diagram given fig.4. voltage tripler process charge pump circuit using diodes switches starting point negative voltage zero voltage output level comparator high enabling clock pulses charge capacitors voltage inverting port comparator gradually pulled down Vneg decreasing toward negative values .When voltage become zero ,the output comparator goes zero turn pulses from clock longer charge capacitors charge pump circuit Vneg stabilises value determined band voltage resistors bridge value Vneg given formula Vneg -[R2*Rext/R1(R2+Rext)]Vbg with 38.4k 1.28 negative voltage adjust mean external resistor Rext range lies between Rext Rext
BAND CLOCK
INVERTER
NAND COMPARATOR REXT
VNEG
CHARGE PUMP
Fig. Negative voltage circuit
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Power management
schematic power management circuit given fig.5. this circuit prevent signal from being applied buffer long negative voltage least fact this does allow drain voltage applied power amplifier negative voltage enough prevent this from excess drain current this purpose comparator association with switches used When UBA1710M turn Vneg close zero positive voltage applied inverting port comparator .The output voltage level this high switches /SW2 respectively states .This situation prevent control signal present buffer input When Vneg goes negative voltage comparator pulled down when this voltage zero less, /SW2 ,enabling control signal switch drain voltage
BUFFER INPUT
BUFFER
BAND
SWITCHES
COMPARATOR
VNEG
Fig. Power management
Shut down circuit
When UBA1710M modulator operating (within bursts example), avoid unnecessary consumption ,the circuit idle mode circuit described fig.6 ,comprises switch inserted between battery rest modulator When positive voltage (+Vbat) applied stand ,the modulator idle state while this active with zero volt applied
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
UBA1710M
Switch
MODULATOR Standby Off(Idle mode) On(Active mode)
Fig. Shut down circuit
Power switch buffer
order improve bandwidth dynamic range association power buffer negative feedback introduced means resistors .The block diagram given fig.7. feedback ratio ,equal R2/(R1+R2) sufficient insure bandwidth minimum with input signal ranging from .These values important modulator used control loop
Vbat Power BUFFER Buffer input
Fig. Power switch buffer
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Oscillator
oscillator (clock) UBA1710M source coupled CMOS multivibrator. schematic given fig.8. oscillation frequency this given formula F=I/(4*C*Vc) ,where current source value coupling capacitor value voltage across capacitor
Fig. Oscillator
MODE OPERATION
device must operated under pulse conditions with power driving current capability exceeding peak MOS1 MOS2 connected parallel with maximum duty cycle pulse width
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
GENERAL CHARACTERISTICS
VDD=4.8V;Tamb=25°C; unless otherwise specified
SYMBOL Supplies Icc=Idd
PARAMETER peak supply current
CONDITIONS power-up mode; power-down mode; standby mode Ids=1.3A Ids=0.4A with Ipo=2 with Ipo=2 C1=C2=100 Cp=100
0.18 11.8 -1.8
12.3 -2.0
UNIT
Istb standby current Power MOS1 Rdson1 resistance Power MOS2 Rdson2 resistance Clock circuit fclk clock frequency Voltage tripler output voltage Vr(p-p) amplitude ripple (peak-to-peak value) turn-on-time Negative DC/DC converter output voltage Vr(p-p) amplitude ripple (peak-to-peak value) turn-on-time buffer amplifier level input voltage HIGH level input voltage switching time from
11.4
with Ino=250 Rext=470k with Ino=250 C3=100 Cn=100
-1.5
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
CIRCUIT DIAGRAM RECOMMENDATIONS Circuit diagram
With circuit diagram given fig.9 make GaAs power amplifier DCS/PCS applications active device controlled modulator UBA1710M
Fig. Circuit diagram
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Recommendations
When modulator associated with power amplifier DCS/PCS applications know that standards rather difficult fulfil this particularly critical time frequency masks Some attention must paid with decoupling filtering around UBA1710M avoid unwanted spurious noise amplified transmit path that reason when looking circuit diagram fig.9 ,low high frequency decouplings used (pin locations close possible circuit connection values these capacitors other important decoupling connected terminal voltage tripler third important filtering inductor inserted between source pins 17,14,13 drains power amplifier first three stages other capacitors used around circuit charge pump
PRINTED CIRCUIT BOARD LAYOUT-LIST COMPONENTS Circuit layout.
demoboard layout using layout describes fig. optimised noise spurious ,but demonstrate dynamic behaviour modulator UBA1710M association with power amplifier CGY2021G. characteristics substrate follows: -substrate type:FR4 double clad -Relative permetivity:r=4.7 -Thickness:H=0.8mm -Size:35x42mm
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Fig. Circuit layout
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Part list power amplifier with UBA1710
CAPACITORS (Size:0603) VALUE 1.8pF 2.2pF NUMBER
RESISTORS (Size:0603) VALUE 220k NUMBER
ACTIVE COMPONENTS CGY2021G UBA1710M HMS2825
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
ELECTRICAL CHARACTERISTICS Control curve
control curve given association power modulator .The output power amplifier plotted versus control voltage applied modulator buffer input (see fig.11
Pout(dBm)
Vcontrol(V)
Fig. Control curve
Turn-on time (tripler negative voltage
turn-on time delay that voltages take establish nominal values when modulator switched .This important parameter modulator periodically shut down idle mode order reduce overall consumption .These parameters plotted fig.12 fig.13
Vtriple(V)
t(µS)
Fig. Tripler turn-on time
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
-0.2 -0.4 -0.6 -0.8 Vneg(V) -1.2 -1.4 -1.6 -1.8 t(µS)
Fig. Negative voltage turn-on time
Rdson versus power switches
Rdson also important parameter value will influences overall efficiency association modulator/power amplifier rated maximum power output level plot Rdson versus voltage applied drain shown fig.14 fig.15 both MOS1 MOS2
1600
1400
1200 Rdson(Ohm) MOS1
1000
Vcc(V
Fig. MOS1 Rdson
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
4000
3500
3000 Rdson(Ohm) MOS2
2500
2000
1500
1000
Vcc(V)
Fig. MOS2 Rdson
Buffer bandwidth
buffer bandwidth measured between input buffer sources power given quiescent control voltage .The result this measurement shown fig.16
Gv(dB) 0.01
F(MHz)
Fig. Buffer bandwidth
UBA1710M modulator GSM/DCS/PCS amplifiers
Application Note
Switching time /settling time
switching time settling time characterised terms rise fall times output port power amplifier using UBA1710M modulator .The rise/fall times plotted versus power level output amplifier (see fig.17
1000
Trise Tfall Tr/Tf(nS)
Pout(dBm)
Fig. Switching time/settling time

AN97077 UBA1710M modulator GSM/DCS/PCS amplifiers Applicatio

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