ABSTRACT This paper discusses unique approach simplify implementation

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ABSTRACT This paper discusses unique approach simplify implementation

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AND8167/D NIS5101 SMART HotPlugt, Integrated Inrush Current Limiter Telecom Applications
ABSTRACT This paper discusses unique approach simplify implementation swap protection circuits boards that regularly switched powered-up computing telecom systems. swap protection circuits require combination control circuitry power devices. Integrating these functions into monolithic chip saves cost adds features that possible with separate components. Performance advantages solution such integration power vertical SENSEFETt current sensing, integrated temperature-sensing diodes accurate thermal protection explained. INTRODUCTION swap protection circuits necessary distributed power systems, high availability servers, disk arrays powered insertion boards. These circuits provide functions limiting inrush current short circuit protection eliminate costly down-times glitches, overloads short circuits that happen while cards plugged into backplane. High availability servers such telecom ones would able operate without swap circuits. CURRENT SWAP CIRCUIT SOLUTIONS
Discrete Swap Circuits
Controller
Sense Resistor
Power
Figure Typical Discrete Swap Circuit
Discrete swap solutions usually composed controller, separate power FET, power sense resistor number discrete biasing components. Figure shows schematic diagram typical discrete swap circuit. This approach complicated, high cost implementation several inherent problems.
those problems power loss impedance power sense resistor. full load current must flow through this resistor associated power loss simply load current multiplied voltage drop across this resistor. This result substantial amount power loss, along with decreasing efficiency system, generates heat board which must also dealt with. Another issue associated with non-integrated swap circuits thermal protection short circuit overload conditions. When short circuit overload occurs, swap circuit must withstand this condition without exceeding junction temperature power FET. This requires overdesign with circuit breaker approach because FET's junction temperature just estimated measured. This critical thing consider especially discrete swap circuits that have active current limit. these circuits, short circuit current could high maximum current value that system deliver, which cause junction exceed temperature rating power FET.
Semiconductor Components Industries, LLC, 2004
September, 2004 Rev.
Publication Order Number: AND8167/D
AND8167/D
Current Integrated Swap Circuits
There also some integrated swap solutions that integrate control circuitry plus FET. These existing solutions usually intended power applications lateral FETs. Lateral FETs have higher on-resistance more) than vertical FETs, which limits this technology high power applications.
NIS5101 Device SMART HotPlug, Integrated Inrush Current Limiter
ROVLO Input RUVLO
DC-DC Converter
OVLO NIS5101 Drain UVLO Current Limit Input
Rlimit
SMART HotPlug Integrated Circuit combines control function power into single that saves design time reduces number components required complete swap application. designed allow safe insertion removal electronic equipment backplanes. This chip features simplicity combined with integrated solution. Figure shows block diagram NIS5101 device.
Input
Figure Swap Circuit Using NIS5101 Device
Voltage Regulator Thermal Shutdown Drain
UVLO/ ENABLE
Undervoltage Lockout
OVLO
Overvoltage Shutdown
Current Limit
Current Limit Input
illustrated Figure SMART HotPlug device only needs three resistors overvoltage, undervoltage current limit functions. device turns-on when UVLO voltage been reached. that point, internal circuitry slowly charges gate internal SENSEFET which does begin conduction until slight delay some milliseconds (typically been elapsed. This delay increased simply adding capacitor UVLO (refer application note AND8115/D further discussion). SENSEFET will increase load current with controlled di/dt until current limit level been reached. this point SENSEFET will enter into constant current mode operation until load capacitor been fully charged. thermal limit threshold reached before capacitor reaches final charge level, device will shut down until temperature reaches 135°C then restart, auto-retry device. thermal latching version must allowed reach thermal shutdown level turn-on this will cause latch state. During capacitor charging period, dV/dt capacitor
dV/dt ILimit CLoad
Figure NIS5101 Block Diagram
This integrated device includes user selectable undervoltage overvoltage lockout levels. also adjustable active current limiting that reduced from maximum level with single resistor. also integrates internal temperature shutdown circuit that greatly increases reliability this device short circuit overload conditions.
NIS5101 Device's Operation
Once load capacitance charged, SENSEFET will become fully enhanced long current does reach current limit threshold, shutdown overvoltage, undervoltage thermal fault. Both UVLO OVLO circuits incorporate hysteresis assure clean turn-on turn-offs with chatter. thermal latching circuit will require input power recycled resume operation after fault. current limit always active, transient overload will always limited. Figure illustrates NIS5101 device's startup waveforms when charging load capacitance
Because fully integrated design, NIS5101 device significantly simplifies implementation swap circuit. Figure shows typical schematic diagram swap circuit using NIS5101 device.
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AND8167/D
cells. This case when device fully enhanced, since there only millivolts from drain source. this condition, sense voltage follows different equations. overload condition which fully enhanced operating it's minimum RDSon. short circuit condition occurs when either load shorted upon turn load capacitor swap device initially looks like short circuit. Figure shows both curves. single resistor will determine both short circuit overload current.
Voltage Bounce Load Voltage
Load Current A/div
Delay time di/dt A/ms
ILimit
Figure Startup Waveforms Load Capacitance
Overload
Figure NIS5101 device configured with UVLO resistor OVLO resistor current limit resistor illustrated picture, device does start conducting current until delay time elapsed. that point, load capacitance charged slowly controlled di/dt, peak current limited RILimit external resistor. Similar startup waveforms obtained different load capacitances current limit settings.
NIS5101 Device's Undervoltage Overvoltage (UVLO, OVLO) Lockout Functions
Short Circuit
Rext_ILimit
1000
Figure Current Limit Adjustment
UVLO circuit holds chip when input voltage less than turn-on limit. includes internal hysteresis assure clean on/off switching. internal divider sets turn-on voltage level This voltage reduced adding external resistor from UVLO Input pin. OVLO shutdown circuit optional protection feature that disabled simply grounding OVLO left open. This circuit contains internal Zener diode/resistor combination series with gate FET. When input input voltage reaches level sufficient apply required gate voltage FET, operation SMART HotPlug will inhibited. There hysteresis circuit built that will eliminate on/off bursts noise input. complete descriptions explanations UVLO OVLO circuits, please refer NIS5101 datasheet.
NIS5101 Device's Current Limit
example, resistor would result current limit when charging capacitance turn once fully enhanced, would allow load operate current Once limit reached, further reduction load impedance will result short circuit condition current will reduced with SMART HotPlug devices, current limit will never shut down limiter. Only thermal limit will stop flow current load. Once current stopped thermal limit, will remain until input power recycled latching version, will continuously restart auto-retry version. detailed explanation current limit function please refer Semiconductor application note AND8140/D.
NIS5101 Device's Temperature Limit
NIS5101 device's current limit biggest technical advantages over other current swap solutions. device uses SENSEFET measure drain current. behavior SENSEFET short circuit condition varies from that overload because there sufficient voltage across drain source terminals sense current follow ratio sense cells main
temperature shutdown circuit NIS5101 provides unique thermal function that protects SENSEFET during short circuit overload conditions. This circuit senses temperature SENSEFET through internal sense diodes which strategically located active area power FET. maximum temperature reached, gate drive removed from SENSEFET which causes device shut off. NIS5101 device options thermal protection, auto-retry latch-off. Figure shows graph that describes types thermal protection.
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AND8167/D
1355
Load Voltage
Hysteretic
Voltage
1355
Load Current A/div -48V
Latching
Device Reaching Thermal Shutdown
Figure Latch-Off Device Charging Load Capacitance 4,200 Figure Thermal Protection Functions
auto-retry version, there nominal hysteresis 40°C. After thermal shutdown, device will automatically restart when temperature drops safe level determined hysteresis. latch-off version, once device reaches temperature limit, will remain until input power recycled. Figures show pictures that describe different types operation thermal protection circuits (auto-retry latch-off).
both versions, typical junction temperature which device turned thermal circuit 135°C. This assures that maximum junction temperature power never exceeded.
NIS5101 Device, Add-On Features
SMART HotPlug simple, rugged, integrated device. Even though only control pins, there number parameters that controlled adding various external components these pins.
Enable
Voltage Load Voltage Load Current A/div
possible enable function NIS5101 device simply adding small open drain connected between UVLO input pins. Figure shows this concept.
Input
OVLO -48V Enable UVLO
Device Reaching Thermal Shutdown
NUD3124
Figure Auto-Retry Device Charging Load Capacitance 4,200
Figure Enable Function Using External Open Drain N-Channel FET.
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AND8167/D
When logic signal applied input external (NUD3124LT1, Semiconductor), UVLO pulled down which makes NIS5101 device turn-off. device then turned back when logic signal removed.
Power Good
swap circuits require power good signal used dc-dc converters that connected downstream circuit. purpose power good give signal
dc-dc converters once load capacitance been fully charged. NIS5101 device offers ability power good function that referenced drain input (-). these purposes, necessary NUD3048MT1 device from Semiconductor. Figures show circuit waveforms power good referenced input (-), Figures power good referenced drain.
Input UVLO NIS5101 Drain OVLO Current Limit Input
Good NUD3048
Figure Power Good Referenced Input
Output Voltage
Output Current Power Good Signal
A/div
Figure Expected Waveforms Power Good Referenced Input
Input UVLO NIS5101 Drain OVLO Current Limit Input NUD3048 MM3Z5V1
Figure Power Good Referenced Drain http://onsemi.com
AND8167/D
Picture NUD3048 without external capacitor extra delay. Cload 4,200
Output Voltage
Power Good
Output Voltage, V/div
Delay time
Output Current, A/div
Voltage Bounce
ILimit UVLO 316k OVLO 324k
Input Voltage Bounce, V/div Output Current
V/div) Vout V/div) Iout (2.0 A/div) Power Good
Figure Expected Waveforms Power Good Referenced Drain
both previous power good circuits, possible delay time power good signal simply connecting capacitor between Gate source (Pins NUD3048 device. more details about this, please refer Semiconductor application note AND8166/D.
Extended Turn-On Delay
Figure Normal Turn-On (UVLO Open; Delay Capacitor)
Output Voltage, V/div
Delay time
Output Current, A/div
Extended turn-on delays sometimes desired avoid problems because bouncing caused when cards plugged unplugged from Bus. This avoided extending delay time. extended turn-on delay created NIS5101 device addition single chip capacitor UVLO pin. Figure shows typical application circuit with delay capacitor connected UVLO pin.
Input Voltage Bounce, V/div
ROVLO RUVLO
Input OVLO NIS5101 Drain UVLO/EN Current Limit Input
Figure Extended Turn-On (UVLO Open; Cdelay=80
additional information about extended turn-on delay circuit, please refer Semiconductor application note AND8115/D.
References
Rlimit
Cdelay
Figure Typical Application Circuit with Delay Capacitor
Figures shows startup pictures normal turn-on delay capacitor), Figure shows waveforms extended turn-on delay.
A.E. Fitzgerald, David Higginbotham, Arvin Basic Electrical Engineering, Fifth Edition, 1981. Semiconductor site www.onsemi.com Semiconductor application notes AND8115/D, AND8140/D, AND8166/D. Linear Technology datasheet LT1640. Semiconductor's data sheets: NIS5101 NUD3048 NUD3124
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Notes
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AND8167/D
SMART HotPlug SENSEFET trademarks Semiconductor Components Industries, (SCILLC).
Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer. This literature subject applicable copyright laws resale manner.
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AND8167/D

ABSTRACT This paper discusses unique approach simplify implementation

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