Interfacing X9408/X9418 XDCP 8051 Microcontrollers those instruct

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Interfacing X9408/X9418 XDCP 8051 Microcontrollers those instruct

Datasheet Thumbnail

Top Searches for this datasheet

This application note describes routines control X9408 X9418 digitally controllable potentiometer. X9408/X9418 devices have variety different instructions that provide flexibility designer. Additionally, nonvolatile nature device allows stored wiper positions that retrieved after power cycles. following code implements available X9408/X9418 instructions using standard bi-directional protocol. Although subroutines occupy about bytes program memory, designers won't need implement instructions shorten code removing unnecessary routines. However, this will necessitate reassembly code.
Interfacing X9408/X9418 XDCP 8051 Microcontrollers
those instructions which program nonvolatile data registers (XFR_WCR, GXFR_WCR, WRITE_DR), acknowledge polling been implemented determine early completion internal write cycle. Although this automatically handled routines, word regarding procedure should informative. After issuing start condition, master sends slave address receives acknowledge. then issues instruction byte X9408/ X9418 again receives acknowledge. necessary, transmits data byte receives final acknowledge. master must then initiate stop condition which will cause X9408/X9418 begin internal write cycle. X9408/X9418 pins high impedance until this internal cycle complete.
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 INT0 INT1 EA/VP 80C51 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 ALE/P PSEN
X940
Figure Connecting X9408 80C51 microcontroller
11/12/02 www.xicor.com
master begin acknowledge polling successively sending start conditions followed "dummy" instructions. When X9408/X9418 finally answers with acknowledge, internal write cycle been completed. master must then initiate stop condition. After next start condition, X9408/X9418 ready receive further instructions. code listing, assumption made that code executes upon reset microcontroller. That code loaded into memory, however this changed with assembler directive. Simple MAIN program routines included code listing. These modified different device addresses, different registers different DCPs within device.
this listing, commands cause X9408/X9418 A3A2A1A0 1100 accessed.) listing also includes some instructions that specific Cygnal 80C51 processor. These should examined modified, needed, specific 80C51 system. commands issued "Main" section code simple assignment call sequences. Figure representative hardware connection between X9408 8051 family microcontroller shown. pull-up resistors lines determined total capacitance devices connected bus, which about 18pF.
80C51 MICROCONTROLLER ROUTINES MANIPULATING X9408
80C51 MICROCONTROLLER ROUTINES MANIPULATING X9408 QUAD EEPOT XICOR INC. 2002 FILE NAME X9408_8051.TXT TARGET MCU: Cygnal C8051F000 DESCRIPTION: This code provides basic 80C51 code commmunicating with controlling X9408 quad digital potentiometer. this listing code that implements available X9408 instructions. X9408 communicates 2-wire that similar, little different from bus. This code very generic simplified shortened removing unnecessary routines. those instructions which program nonvolatile data registers (XFR_WCR, GFXR_WCR, WRITE_DR) this program provides acknowledge polling determine early completion internal write cycle. Although this handled automatically routines, some background might helpful. After issuing start condition, master sends slave address receives acknowledge (ACK). master then sends instruction byte X9408 again receives ACK. necessary, master sends data byte receives final ACK. master then initiates stop condition signal X9408 begin internal nonvolatile write cycle. When write cycle begins, pins high impedance state remain this state until nonvolatile write complete. Immediately following stop condition, master begin acknowledge polling successively sending start conditions, followed "dummy" instructions. When X9408 finally answers with acknowledge, internal write cycle completed. master then issues stop condition. After next start condition, X9408 ready receive further instructions.
11/12/02 www.xicor.com
This code give flexibility communicate with different X9408 devices same bus. does this using register, named "ADDR_BYTE". This register loaded with specific slave address address desired X9408 device. register saved there only X9408 bus, making ADDR_BYTE constant. 80C51 register used identify particular X9408 register DCP, both, used particular operation. There various constants available easy selection combination. contents register appended specific instruction "instr_gen' routine. register used counter keeping track number bits sent each byte.
register used increment/decrement instruction specify down movement wiper. each command, master loads "PULSES" register with direction bits count. wiper increments specified number positions. wiper decrements specified number positions. register used hold specific command being executed. This allows instruction built sent X9408. MAIN section sample main code segments showing various subroutines. This code tested Cygnal 80C51 microcontroller, using Cygnal tools. specific routines required Cygnal processor identified probably needed other standard 8051 devices. Since each 8051 have specific requirements that handled this code, programmer advised check setup needs specific 80C51 derivation that being used. Definition ;-SCL p1.0 p1.1 80C51 used 80C51 used
Register Definition ;-$include (c8051f000.inc); Include regsiter definition file (Cygnal). TEMP COUNT PULSES COMMAND ADDR_BYTE DATA_BYTE Scratch register Loop counting register Bits ###### (#=pulses Instruction (I.E. 0,4,8,12,16,.) Bits Bits Bits
Constant Definition ;-SLAVE_ADR0 SLAVE_ADR1 SLAVE_ADR2 SLAVE_ADR3 SLAVE_ADR4 SLAVE_ADR5 SLAVE_ADR6 050h 051h 052h 053h 054h 055h 056h
11/12/02
www.xicor.com
SLAVE_ADR7 SLAVE_ADR8 SLAVE_ADR9 SLAVE_ADR10 SLAVE_ADR11 SLAVE_ADR12 SLAVE_ADR13 SLAVE_ADR14 SLAVE_ADR15 WCR_0 WCR_1 WCR_2 WCR_3 DR_0 DR_1 DR_2 DR_3 DCP0_R0 DCP0_R1 DCP0_R2 DCP0_R3 DCP1_R0 DCP1_R1 DCP1_R2 DCP1_R3 DCP2_R0 DCP2_R1 DCP2_R2 DCP2_R3 DCP3_R0 DCP3_R1 DCP3_R2 DCP3_R3 READWCR WRITEWCR READDR WRITEDR XFRDR XFRWCR GXFRDR GXFRWCR INCDECWIPER 057h 058h 059h 05Ah 05Bh 05Ch 05Dh 05Eh 05Fh
INTERNAL ;-STACK_TOP 060H Stack
RESET INTERRUPT VECTORS ;-cseg ljmp main Locate jump start code
11/12/02
www.xicor.com
CODE SEGMENT ;-Code_Seg segment CODE rseg using Code_Seg Switch this code segment. Specify register bank following program code.
NAME: execute FUNCTION: Determines which X9408 instruction issued, then executes INPUTS: COMMAND OUTPUTS: none CALLS: read_wcr, read_dr, write_wcr, write_dr, xfr_dr, xfr_wcr, gxfr_dr, gxfr_wcr, inc_wiper AFFECTED: DPTR, ;-execute: first: call call call call call call call call call read_wcr write_wcr read_dr write_dr xfr_dr xfr_wcr gxfr_dr gxfr_wcr inc_wiper COMMAND COMMAND COMMAND COMMAND COMMAND COMMAND COMMAND COMMAND COMMAND dptr,#first a,COMMAND @a+dptr Base Address Jump Offset Jump instruction handler
following routines handle each X9408 instruction. These called "execute" routine. read_wcrReads returns value DATA_BYTE write_wcrWrites value DATA_BYTE read_drReads Data Register returns value DATA_BYTE write_drWrites value DATA_BYTE data register xfr_drTransfers value data register xfr_wcrTransfers value data registers gxfr_drGlobal transfer data registers WCRs gxfr_wcrGlobal transfer WCRs Data Registers inc_wiperSingle Step Increment/Decrement wiper position
11/12/02
www.xicor.com
FUNCTION: Appends bits appropriate Instruction code passes instruction byte Instruction Generator. INPUTS: OUTPUTS: NONE CALLS: instr_gen AFFECTED: ID,A,DPTR ;-read_wcr: call write_wcr: call read_dr: call write_dr: call xfr_dr: call xfr_wcr: call gxfr_dr: call a,ID a,#090h ID,a dptr,#case1 instr_gen bits Append read instruction code Save result Jump base addr this instruciton
a,ID a,#0A0h ID,a dptr,#case2 instr_gen
bits Append Write instruction code Save result Jump base addr this instruction
a,ID a,#0B0h ID,a dptr,#case1 instr_gen
bits Append Read instruction code Save result Jump base addr this instruction
a,ID a,#0C0h dptr,#case3 instr_gen
bits Append Write instruction code Save result Jump base addr this instruction
a,ID a,#0D0h dptr,#case4 instr_gen
bits Append instruction code Save result Jump addr this instruction
a,ID bits a,#0E0h Append instruction code Save result dptr,#case5 Jump addr this instruction instr_gen
a,ID a,#010h dptr,#case4 instr_gen
bits Append GXFR instruction code Save result Jump addr this instruction
11/12/02
www.xicor.com
gxfr_wcr: call inc_wiper: call a,ID a,#080h dptr,#case5 instr_gen bits Append GXFR instruction code Save result Jump addr this instruction
a,ID a,#020h ID,a dptr,#case6 instr_gen
bits Append Incr Wiper instruction code Save result Jump addr this instruction
NAME: instr_gen (Instruction generator) FUNCTION: Issues appropriate protocol each X9408 instruction INPUTS: ADDR_BYTE, PULSES, DPTR, DATA_BYTE OUTPUTS: DATA_BYTE CALLS: start_cond, stop_cond, send_byte, send_bit, get_byte, polling AFFECTED: DATA_BYTE, COUNT ;-instr_gen: call call call case6: wiper_lp: call djnz case4: case2: call case1: call case3: call a,DATA_BYTE send_byte Send X9408 Data Byte get_byte stop_gen Receive X9408 Data Byte a,DATA_BYTE send_byte stop_gen Send X9408 data byte stop_gen program gets here, then done a,PULSES a,#00111111b COUNT, a,PULSES a,#10000000b Bits Bits Save number pulses Bits start_cond a,ADDR_BYTE send_byte stop_gen a,ID send_byte stop_gen +dptr Issue start condition Send X9408 slave/address byte NACK, end. Send X9408 instruction byte NACK, end. Reset offset before jump Jump various instruction cases
send_bit Send single pulse) COUNT,wiper_lp Continue until pulses sent
11/12/02
www.xicor.com
call call case5: call call stop_gen: call stop_cond polling stop_cond Issue stop condition Begin Acknowledge Polling Transmission Over! stop_cond polling stop_gen Issue stop condition Begin Acknowledge Polling
NAME: send_byte FUNCTION: Sends bits (from LSB) reads from INPUTS: OUTPUTS: NONE CALLS: send_bit, get_bit AFFECTED: COUNT, TEMP, ;-send_byte: bit_loop: call next_bit: djnz setb call NAME: send_bit FUNCTION: Places initiates clock pulse INPUTS: OUTPUTS: NONE CALLS: clock AFFECTED: ;-send_bit: setb sent_zero: call sent_zero clock Pull Should really LOW? Not, pull HIGH Initiate clock pulse COUNT,#8 TEMP,a loop repetitions store shifted byte shift)
a,TEMP Retrieve last saved shifted byte a,#10000000b Mask (Most Significant Bit) send_bit Place this a,TEMP TEMP,a COUNT,bit_loop clock Retrieve last saved shifted byte Rotate bits position left Store this updated shifted byte high after When bits done, read line (ACKnowledge pulse)
11/12/02
www.xicor.com
NAME: clock FUNCTION: Issues LOW-HIGH-LOW clock pulse sufficient duration reads during high phase, just case needed INPUTS: NONE OUTPUTS: CALLS: NONE AFFECTED: SCL, ;-clock: Set-up setb Pull HIGH hold c,SDA Move into carry flag Pull NAME: get_byte FUNCTION: Receives bits from (MSB LSB) sends INPUTS: NONE OUTPUTS: DATA_BYTE CALLS: clock, send_bit AFFECTED: COUNT, SDA, DATA_BYTE ;-get_byte: setb get_loop: call djnz call COUNT,#8 Receiver shouldn't drive Loop count repetitions Clock current Reconstruct byte using left shifts Store retrieved Byte user (Sending Send acknowledge
clock COUNT,get_loop DATA_BYTE,a send_bit
NAME: start_cond (Start Condition) FUNCTION: Issues start condition INPUTS: NONE OUTPUTS: NONE CALLS: NONE AFFECTED: SDA, ;-start_cond: setb setb
11/12/02
Pull HIGH allow set-up Pull HIGH hold
;Pull (SCL=HIGH) hold
www.xicor.com
;Complete clock pulse NAME: stop_cond (Stop condition) FUNCTION: Issues stop condition INPUTS: NONE OUTPUTS: NONE CALLS: NONE AFFECTED: SDA, ;-stop_cond: setb setb Pull hold Pull HIGH hold
Pull HIGH (SCL=HIGH)
NAME: ack_send (Send Acknowledge) FUNCTION: Sends acknowledge complete line data reads INPUTS: NONE OUTPUTS: NONE CALLS: send_bit AFFECTED: ;-ack_send: call SEND_BIT (Sending Send bit!
NAME: polling (Acknowledge polling XFR_WCR, WRITE_DR, GXFR_WCR) FUNCTION: Sends dummy commands X9408 during internal write cycle that cycle marked acknowledge INPUTS: ADDR_BYTE OUTPUTS: NONE CALLS: start_cond, send_byte AFFECTED: ;-polling: call again: call SEND_BYTE POLLING C=1, then there START_COND a,ADDR_BYTE Re-establish protocol Attempt send dummy command
11/12/02
www.xicor.com
MAIN PROGRAM HERE. Below sample main programs calling various command routines ;-main: #STACK_TOP; Initialize stack pointer
following section required Cygnal processor. This could change different versions 80C51. Disable WDT. (IRQs enabled this point.) interrupts were enabled, they would need explicitly disabled that move WDTCN occurs more than four clock cycles after first move WDTCN. Disable interupts
WDTCN, #0DEh; Cygnal processor specific WDTCN, #0ADh; Cygnal processor specific
Enable Port Crossbar XBR2, #40h Cygnal processor specific (enable weak pull ups)
PRT1CF, #00h Cygnal processor specific ports push-pull (this processor operates from 3.3V, X9408 operates from 8051 outputs must pulled with external resistors.)
following sample code segments main program. potentiometer A0-A3 pins were address 0Ch. ;-write_2_wcr: call ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #WCR_2 Specify DCP#2 COMMAND, #WRITEWCR; Write DATA_BYTE, #43; wiper position execute
read_from_wcr: ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #WCR_2 Specify DCP#2 COMMAND, #READWCR; Read call execute value DATA_BYTE write_2_dr: call ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #DCP2_R1; Specify DR#1 DCP#2 COMMAND, #WRITEDR; Write DATA_BYTE, #21; data value execute
11/12/02
www.xicor.com
read_from_dr: call mov_dr_2_wcr: call mov_wcr_2_dr: call ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #DCP2_R1; Specify DR#1 DCP#2 COMMAND, #READDR; Read execute value DATA_BYTE ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #DCP2_R1; Specify DR#1 DCP#2 COMMAND, #XFRDR; Transfer execute ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #DCP2_R1; Specify DR#1 DCP#2 COMMAND, #XFRWCR; Transfer WCRto execute
global_dr_2_wcr: ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #DR_1 Specify DR#1 COMMAND, #GXFRDR; Transfer call execute global_wcr_2_dr: ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #DR_1 Specify DR#1 DCP#2 COMMAND, #GXFRWCR; Transfer WCRto call execute decr_wiper: call incr_wiper: call ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #WCR_2 Select DCP#2 PULSES, #0Fh; Decrement DCP#2 pulses COMMAND, #INCDECWIPER; wiper execute ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte #WCR_2 Select DCP#2 PULSES, #8Fh; Increment DCP#2 pulses COMMAND, #INCDECWIPER; wiper execute
11/12/02
www.xicor.com

Interfacing X9408/X9418 XDCP 8051 Microcontrollers those instruct

Top Searches for this datasheet

Other recent searches