Application Note December 2001 AN9991 Author: LaFontaine Ref

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Application Note December 2001 AN9991 Author: LaFontaine Ref

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HC55185 Ringing SLIC AK2306/2306LV Dual CODEC
Application Note December 2001 AN9991
Author: LaFontaine
Reference Design using HC55185 AK2306/2306LV Dual CODEC
purpose this application note provide reference design HC55185 AK2306/2306LV Dual CODEC. network requirements many countries require analog subscriber line circuit (SLIC) terminate subscriber line with impedance voiceband frequencies which complex, rather than resistive (e.g. 600). HC55185 accomplishes this impedance matching with single network Figure connected between pin. AK2306/2306LV Dual CODEC includes Selectable A-law/µ-law function, Internal Gain Adjustment from +6dB -18dB steps control selectable 16Hz/20Hz Ring Tone Generator. Discussed this application note following: 2-wire impedance matching Receive gain (4-wire 2-wire) transmit gain (2-wire 4-wire) calculations Reference design both +820||115nF Complex Impedance
equal desired terminating impedance minus value protection resistors (RP). formula calculate proper matching 2-wire impedance shown Equation
133.3 (EQ.
Equation used match impedance SLIC protection resistors (ZTR) known line impedance (ZL). Figure shows calculations match resistive complex loads. EXAMPLE Calculate make series with 2.16µF.
133.3 j2.16X10 (EQ.
66.9k series with 16.2nF. Note: Some impedance models, with series capacitor, will cause feedback behave open circuit resistor with value about times reactance capacitor (2.16µF/133.3 16.2nF) frequency interest (200Hz example) placed parallel with capacitor order solve problem (491k 16.2nF capacitor). EXAMPLE Calculate make 820//115nF
133.3 j820 )X10 (EQ.
Impedance Matching
Impedance matching HC55185 subscriber load important optimization wire return loss, which turn cuts down echoes voice communication path. Impedance matching HC55185 accomplished making SLIC's impedance (ZO, Figure
16.26k series with parallel combination 109.3k 862pF.
INTERSIL HC55185 RING
RESISTIVE 133.3(600 2*49) 66.9k VALUE 66.5k COMPLEX 2.16µF 133.3(600 2*49) 2.16µF/133.3 66.9k COMPLEX 820//115nF 133.3(220 2*49)+ 133.3(820) 115nF/133.3 491k 16.2nF 16.26k
862pF
109.3k
FIGURE IMPEDANCE MATCHING
1-888-INTERSIL 321-724-7143
Intersil (and design) trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2001. Rights Reserved
Application Note 9991 SLIC Active Mode
Figure shows simplified transmission model HC55185 connection AK2306 SLIC. Figure shows simplified transmission model HC55185 connection "Low Voltage" AK2306LV SLIC. Voltage AK2306LV CODEC requires different connection HC55185 achieve voltage gain required ring without clipping output signal CODEC. following analysis performed with AK2306 CODEC connection. Circuit analysis "Low Voltage" circuit left reader. Circuit analysis HC55185 yields following design equations: Sense Amplifier configured input differential amplifier with gain 3/4. voltage output sense amplifier (VSA) calculated using superposition. VSA1 voltage resulting from VSA2 voltage resulting from (reference Figure
(EQ. (EQ.
Substitute Equation into Equation
Loop Equation HC55185 feed amplifiers load (EQ. (EQ.
Substitute Equation into Equation
(EQ.
Substitute Equation -V2w/ZL into Equation
(EQ.
Loop Equation Tip/Ring interface
(EQ.
Substitute Equation into Equation combine terms
(EQ.
where:
(EQ. (EQ. (EQ.
input voltage pin. internal node voltage that function loop current output Sense Amplifier. Internal current SLIC that difference between input receive current feedback current. metallic current. protection resistor (typical 49.9).
Where equal IMRSENSE (RSENSE
(EQ.
voltage equal
(EQ.
external resistor/network matching line impedance. ring voltage output pins SLIC. ring voltage including voltage across protection resistors. line impedance. source impedance device.
defined Figure note polarity assigned
(EQ.
Setting equal zero, substituting Equation into Equation defining -VTR/IM will enable user determine require feedback match line impedance V2W.
133.33 (EQ.
HC55185 Receive Gain (VRX V2W)
4-wire 2-wire gain across HC55185 equal divided input voltage VRX, reference Figure receive gain calculated using Equation Equation expresses receive gain (VRX V2W) terms network impedances. From Equation value match line impedance (ZL) HC55185 plus protection resistors RP). This results 4-wire 2-wire gain shown Equation
(EQ.
source impedance device defined 2Rp. line impedance. defined
133.33 Node Equation HC55185 input (EQ. (EQ.
Application Note 9991
RSENSE
INTERSIL HC55185 RECEIVE BLOCK 0.47µF
AK2306 RECEIVE PATH
0.47µF 120K AMPT AMPLIFIER AMPR AMPLIFIER
RING RING
FEED AMPLIFIER
BCLK
FEED AMPLIFIER RSENSE
49.9K
120K VFTN VFTP
FEEDBACK AMPLIFIER
0.47µF
TRANSMIT PATH
IM30 SENSE AMPLIFIER
66.5K
FIGURE HC55185 SIMPLIFIED TRANSMISSION CIRCUIT AK2306
RSENSE
INTERSIL HC55185 RECEIVE BLOCK 0.47µF
AK2306LV RECEIVE PATH 0.47µF 42.2K AMPR AMPLIFIER
FEED AMPLIFIER
BCLK
FEED AMPLIFIER RSENSE
36.5K
30.1K VFTN VFTP
AMPT AMPLIFIER
FEEDBACK AMPLIFIER
0.47µF 66.5K
TRANSMIT PATH
45.3K
IM30 SENSE AMPLIFIER
0.47µF
RECEIVE GAIN FROM +3.3dB TRANSMIT GAIN FROM -9.3dB AK2306LV
VOLTAGE CONNECTION
FIGURE HC55185 SIMPLIFIED TRANSMISSION CIRCUIT AK2306LV
Application Note 9991 Receive Gain Across System
receive gain across system defined gain from phone (V2W). With receive gain through HC55185 receive gain across system entirely controlled programming AK2306. AK2306 program receive gain across system from +6dB -18dB increments (reference Figure more precise gain increments required, AMPR amplifier used adjust overall Receive gain (R6/R7). Combining Equations results Equation
(EQ.
more useful form equation rewritten terms /V2W. voltage divider equation written convert from shown Equation
(EQ.
Transmit Gain Across HC55185 VTX)
2-wire 4-wire gain equal VTX/EG with reference Figure
Loop Equation (EQ.
Substituting rearranging Equation terms results Equation
2V2W (EQ.
Substituting Equation into Equation results equation 2-wire 4-wire gain that's function synthesized input impedance SLIC protection resistors.
0.416 (EQ.
From Equation with
(EQ.
600, programmed with 498.76 (66.5k/133.33), equal 49.9. This results 2-wire 4-wire gain 0.416 -7.6dB.
Substituting Equation into Equation simplifying.
(EQ.
Transmit Gain Across System
transmit gain across system defined gain from phone 2-wire side (V2W) highway (DX). Setting gain AK2306 will have account attenuated signal through HC55185. system gain entirely controlled programming AK2306. AK2306 program transmit gain across system from +6dB -18dB increments (reference Figure more precise gain increments required, AMPT amplifier used adjust overall Transmit gain (Rf/R8).
Substituting Equation into Equation defining -V2W/ZL results Equation VTX.
(EQ.
AK2306 0.47µF RING 4.7µF 66.5K 49.9K 0.47µF 0.47µF 120K 120K VFTN VFTP TRANSMIT PATH GAIN +6dB -18dB RECEIVE PATH GAIN +6dB -18dB
INTERSIL HC55185
AMPT AMPLIFIER
FIGURE RECEIVE GAIN G(4-2), TRANSMIT GAIN (2-4)
AMPR AMPLIFIER
Application Note 9991 Transhybrid Balance G(4-4)
Transhybrid balance measure well input signal canceled (that being received SLIC) from transmit signal (that being transmitted from SLIC CODEC). Without this function, voice communication would difficult because echo. signals VGSR (Figure opposite phase. Transhybrid balance achieved summing signals that equal magnitude opposite phase into AMPT amplifier inside AK2306. Transhybrid balance achieved summing VGSR signal with output signal from HC55185 when proper gain adjustments made match VGSR magnitudes. discussion purpose, AMPT amplifier redrawn with external resistors Figure
VGSR VFTN VFTP GAOT AMPT
across system, with transmit gain AK2306 0dB, equal 49.9k. shown Equation
120k 0.416 2.404 49.9k (EQ.
gain through AMPT amplifier from VGSR must equal gain from achieve transhybrid balance. therefore equal shown Equation
120k 120k
(EQ.
Reference Design HC55185 AK2306 With Load
design criteria follows: 4-wire 2-wire gain V2W) equal 2-wire 4-wire gain (V2W equal 49.9 Figure gives reference design using Intersil HC55185 AK2306 Dual CODEC. Also shown Figure voltage levels specific points circuit.
Impedance Matching
2-wire impedance matched line impedance using Equation repeated here Equation
133.3 (EQ.
FIGURE TRANSHYBRID BALANCE CIRCUIT
Transhybrid balance achieved adjusting magnitude from both VGSR their equal each other. gain across system gain through SLIC (0.416) AMPT amplifier through RF/R8. randomly selected 120k. achieve gain
line impedance 600, equals:
133.3 66.9k (EQ.
closest standard value would 66.5k.
G4-2
0dBm0(600) 0.7745VRMS
SYSTEM REQUIREMENTS: IMPEDANCE: TRANSMIT GAIN (A/D): +5.0dB RECEIVE GAIN (D/A): INTERSIL HC55185
AK2306 0dBm0(600) 0.7745VRMS 0.47µF 0.47µF 120K 49.9K 120K VFTN VFTP AMPT AMPLIFIER TRANSMIT PATH GAIN RECIEVE PATH GAIN
0dBm0(600) 0.7745VRMS
RING
66.5K 4.7µF 0.47µF
0dBm0(600) 0.7745VRMS
-7.619dBm0(600) 0.32219VRMS
G2-4
0dBm0(600) 0.7748VRMS
FIGURE REFERENCE DESIGN HC55185 AK2306/2306LV WITH LOAD IMPEDANCE
AMPR AMPLIFIER
0dBm0(600) 0.7748VRMS
Application Note 9991 Reference Design HC55185 AK2306 With Complex Load
design criteria Complex load solution follows: Desired line circuit impedance 820//115nF Receive gain -3.5dB Transmit gain 0dBm0 defined into complex impedance 1020Hz 49.9 Figure gives reference design using Intersil HC55185 AK2306 Dual CODEC. Also shown Figure voltage levels specific points circuit. Note: transmit gain system (-1.79dB(897) -3.5dB(600)) explained following section.
Adjustment -3.5dBm0 Load Referenced
voltage equivalent 0dBm0 into (0dBm0(897)) calculated using Equation (897 impedance complex load 1020Hz).
0dBm 0.9471V 0.001
(EQ.
gain referenced back 0dBm0(600) equal
0.9471V GAIN 1.747dB 0.7745V (EQ.
adjustment -3.5dBm0 load referenced
Adjustment 3.5dBm0 1.747dBm0 1.75 (EQ.
voltage load (referenced 600) given Equation
1.75d 0.63306V (EQ. 0.001
Setting Receive Path Gain equal -1dB adjusting R6/R7 with standard resistor values results voltage 0.62969Vrms -1.70dBm0 (600).
G4-2
-1dBm0(600) 0.69036VRMS AK2306 RECEIVE PATH GAIN -1dB
0dBm0(600) 0.7745VRMS
-1.79dBm0(600) 0.62969VRMS RING INTERSIL HC55185
-1.79dBm0(600) 0.62969VRMS 30.1K 0.47µF 0.47µF 31.2K 90.9k 4.7µF -9.41dBm0(600) 0.26195VRMS 0.47µF 25.5K
AMPT AMPLIFIER VFTN VFTP TRANSMIT PATH GAIN
-3.56dBm0(600) 0.51382VRMS
-1.79dBm0(600) 0.62969VRMS
FIGURE REFERENCE DESIGN HC55185 AK2306 WITH COMPLEX LOAD IMPEDANCE
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
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AMPR AMPLIFIER
-3.56dBm0(600) 0.51382VRMS

Application Note December 2001 AN9991 Author: LaFontaine Ref

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