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Using The HI7188 Evaluation Kit

Authors: John J. Kornblum and David C. Jarman

Using The HI7188 Evaluation Kit
Application Note June 1996 AN9518.1
Authors: John J. Kornblum and David C. Jarman
Evaluation Kit Description
The HI7188 Evaluation Kit (evaluation board and evaluation software) can be used to evaluate the performance of the HI7188 16-bit Sigma Delta Analog-to-Digital Converter (ADC). The evaluation board includes a reference circuit, a crystal, an oscillator, and digital circuitry used to interface to a personal computer running the evaluation software. Also included are two single ended to differential converter circuits and two resistor ladder networks which can be used to provide inputs to the HI7188. In addition, the board provides means for the user to supply an external reference and an external clock.
Hardware Description
HI7188 Description
HI7188 Functional Block Diagram
VREF HI VREF LO
50 / 60Hz REJECT VIN1H, VIN1L 2 VIN2H, VIN2L 2 VIN3H, VIN3L 2 VIN4H, VIN4L 2 PGIA 4TH ORDER 1 INTEGRATING FILTER 23 50 / 60Hz REJECT CALIBRATION AND CONTROL 50 / 60Hz REJECT
50 / 60Hz REJECT
Application Note 9518
VIN5H, VIN5L 2 VIN6H, VIN6L 2 VIN7H, VIN7L 2 VIN8H, VIN8L 2
MODULATOR 50 / 60Hz REJECT DATA RAM DATA RAM
50 / 60Hz REJECT
50 / 60Hz REJECT 50 / 60Hz REJECT 16
CONVERSION CONTROL CHANNEL CONFIGURATION REGISTERS VCM CONTROL REGISTER
SERIAL INTERFACE CLOCK GENERATOR
OSC1 OSC2
MUXCTL
RST MODE
SCLK SDO SDIO RSTIO
Application Note 9518 HI7188 Evaluation Board Simplified Block Diagram
J2 EXTERNAL DIFFERENTIAL INPUT CONNECTOR 16 CHANNELS J6 - J13, J16 - J23 16 CHANNELS JP4 - JP19 CALIBRATION JUMPERS 16 CHANNELS JP20 - JP35 FILTER JUMPERS 16 CHANNELS CRYSTAL OSCILLATOR EXTERNAL CLOCK CRYSTAL
VINH1 VINL1 VINH8 VINL8 VRHI
OSC1 OSC2
J4, J5, J14, J15 ON-BOARD REFERENCES
DIGITAL I / O
LINE DRIVERS AND RECEIVERS
VCM SINGLE TO DIFFERENTIAL CONVERTERS AND TAP VOLTAGES EXTERNAL VREF
DGND HI7188
input filter circuitry as the input sampling rate (or modulator clock rate) varies with the selected PGIA gain, and the input impedance is dependent upon the modulator clock rate. Please refer to the data sheet for more information. External analog inputs come onto the board via the 34 pin connector (J2) located at the upper left hand corner of the board. Pin 1 is the bottom left pin on the connector. The top row of jumpers (J6 - J13, J16 - J23) are used in conjunction with the single ended to differential converters. If an external input on J2 is being used for a particular channel then the top row jumpers for that channel must be removed from the board. For example, if external inputs are used for channels 1 and 5 and come into the board on J2, jumpers J6, J10, J16, and J20 must be removed from the board. The middle row of jumpers, JP4 - JP19 can be used to calibrate the HI7188 in the gain of 1 mode by using the on-board reference voltage. For example, to perform a positive full scale calibration on channel 3 jumper JP9 is in the upper position (VREF) while JP8 is in the lower position (AGND). For a negative full scale calibration on channel 3, jumper JP9 is in the lower position (AGND) and jumper JP8 is in the upper position (VREF). To offset calibrate channel 6 on the HI7188 jumpers JP13 and JP14 are in the lower position (AGND). If an external or on-board input is being used for a particular channel then the middle row jumpers for that channel must be removed from the board. For example, if exter-
Application Note 9518
Software Description
Application Note 9518
Configuration Menu:
MAIN MENU
READ MENU
CONFIGURATION MENU IO RESET RESET EXIT PROGRAM
WRITE MENU
The Configuration Menu allows the user to quickly program the HI7188 or to verify the current configuration. Capability includes: 1) Chip level and channel level programming via prompts to the user, 2) Configure the HI7188 from a file and save the current configuration to a file, 3) Interpret a configuration file and 4) Move from the Configuration Menu to any other menu. Configuration Menu: 1 2 Set Chip Configuration Set Channel Configuration Set Full Configuration Interpret Configuration File Display / Save Current Configuration Restore Full Configuration
FIGURE 1. SIMPLIFIED SOFTWARE FLOW CHART
The Main Menu appears after invoking the HI7188 Evaluation Software. This menu is the gateway to other menus that allow the user to communicate with and evaluate the HI7188. Main Menu: c r x Configuration Menu Read Menu EXIT PROGRAM
Menu Select: m Main Menu r Read Menu
w Write Menu
Reset Select: i s I / O Reset System Reset
w Write Menu Reset Select: i s I / O Reset System Reset
Enter Selection: c Configuration Menu: Entering c from the Main Menu causes the HI7188 Configuration Menu to be displayed on the screen. The HI7188 Configuration Menu allows the user to easily program the HI7188 configuration, load preexisting configurations or quickly determine the current configuration. See the Configuration Menu description for details. Read Menu: Entering r from the Main Menu causes the Read Menu to be displayed on the screen. The Read Menu allows read access to all registers without having knowledge of the specific instruction byte details. See the Read Menu description for details.
Enter Selection: 1 Set Chip Configuration: Entering 1 from the Configuration Menu allows the user to perform chip level configuration of the HI7188. The user is asked a series of questions relating to the HI7188 Control Register bits. After completing these questions, the user is given the option of saving the information to a configuration file and actually executing the configuration. If the user requests writing a configuration file they are prompted to enter a filename. If the users confirms execution of the configuration, the software compiles the proper data and writes the Control Register, programming the HI7188 as desired. Executing this command, regardless of options chosen, returns the user to the Configuration menu. In addition, entering c at any of the prompts immediately returns the user to the Configuration menu. Set Channel Configuration: Entering 2 from the Configuration Menu allows the user to program the channel(s) specific configuration of the HI7188. The user is asked a series of questions for each channel being converted. In the logical conversion order the user is prompted for 1) physical channel 2) unipolar / bipolar mode 3) operating / calibration mode and 4) gain. After completing these questions, the user is given the option of saving the information to a configuration file and actually executing the configuration. If the user requests writing a configuration file they are prompted to enter a filename. If the users confirms execution of the configuration, the software compiles the proper data and writes the Channel Config-
w Write Menu: Entering 3 from the Main Menu causes the Write Menu to be displayed on the screen. The Write Menu allows write access to all registers without having knowledge of the specific instruction byte details. See the Write Menu description for details. i I / O Reset: Entering i from the Main Menu sends an active low signal to the HI7188 RSTI / O pin, clearing the Serial Interface Controller effectively aborting an ongoing communication cycle. The Main Menu remains displayed on the screen. System Reset: Entering s from the Main Menu sends an active low signal to the HI7188 RST pin, which initializes the HI7188. The Main Menu remains displayed on the screen. Exit Program: Entering x from the Main Menu causes the software to exit.
Application Note 9518
w Write Menu: Entering w from the Configuration Menu returns software execution to the Write Menu. i I / O Reset: Entering i from the Configuration Menu sends an active low signal to the HI7188 RSTI / O pin, clearing the Serial Interface Controller effectively aborting an ongoing communication cycle. The Configuration Menu remains displayed on the screen. Reset: Entering s from the Configuration Menu sends an active low signal to the HI7188 RST pin, which initializes 6
Application Note 9518
Towards the bottom of the Read Menu are picks that allow the user to quickly access the Main Menu, Configuration Menu, and Write Menu. m Main Menu: Entering m from the Read Menu returns software execution to the Main Menu. c Configuration Menu: Entering c from the Read Menu returns software execution to the Configuration Menu. 4
w Write Menu: Entering w from the Read Menu returns software execution to the Write Menu. i I / O Reset: Entering i from the Read Menu sends an active low signal to the HI7188 RSTI / O pin, clearing the Serial Interface Controller effectively aborting an ongoing communication cycle. The Read Menu remains displayed on the screen. Reset: Entering s from the Read Menu sends an active low signal to the HI7188 RST pin, which initializes the HI7188. The Read Menu remains displayed on the screen. 5
Write Menu: The Write Menu allows the user to quickly write data into all accessible memory elements of the HI7188, without knowledge of the instruction byte required. Write Menu: 1 Data RAM (No OP) 2 Data RAM (No OP) 3 Control Register 4 CCR #2 5 CCR #1 6 Offset RAM 7 Positive Gain RAM 8 Negative Gain RAM 9 Hex Input Menu Select: m Main Menu c Configuration Menu r Read Menu Reset Select: i s I / O Reset System Reset
Application Note 9518
Software Execution
Towards the bottom of the Write Menu are picks that allow the user to quickly access the Main Menu, Configuration Menu, and Read Menu. m Main Menu: Entering m from the Write Menu returns software execution to the Main Menu. c Configuration Menu: Entering c from the Write Menu returns software execution to the Configuration Menu.
Software Clarifications
Interrupting Configuration Menu Prompts When programming the HI7188 configuration via the Configuration Menu entering c at any of the prompts will return the user to the Configuration Menu. This feature is useful if an undesired input is made allowing the user to quickly restart configuring the product without having to answer any further questions. Active Channels Display The upper right corner of the screen displays the current number of active channels programmed into the DUT, regardless of the current menu. This is helpful as a quick check on the current configuration of the HI7188.
w Read Menu: Entering w from the Write Menu returns software execution to the Read Menu. i I / O Reset: Entering i from the Write Menu sends an active low signal to the HI7188 RSTI / O pin, clearing the Serial Interface Controller effectively aborting an ongoing communication cycle. The Write Menu remains displayed on the screen. Reset: Entering s from the Write Menu sends an active low signal to the HI7188 RST pin, which initializes the HI7188. The Write Menu remains displayed on the screen.
Application Note 9518
NOTE: The CTRL input on the keyboard is used to "normalize" the statistical output. For example, the maximum voltage is set to 5.5V and the minimum is set to -5.5V. The maximum / minimum results displayed from then on will include only those conversions read since "normalization".
Helpful Hints
Start with the Configuration Menu Novice users should consider reviewing and exercising the Configuration Menu picks first. The Configuration Menu offers a wide range of functions that allow the user to quickly program and report on the HI7188 configuration. When programming the initial configuration, use pick 3. This will prompt for both chip level and channel configuration information. After the initial configuration is complete it is generally useful to use picks 1 or 2 when making configuration revisions. Use of picks 1 or 2 allow chip level or channel specific programming, respectively. Make use of Configuration Files Understand and make use of the configuration file restore capability. This capability allows the user to "fully" configure the HI7188 with a single command. Configuration files may be hand crafted with a text editor of your choice or they may be generated via the Configuration Menu. Recall that when the HI7188 is configured for a calibration mode that the CCR bits will return to normal mode automatically. Therefore, it is recommended that when using the Configuration Menu to generate a configuration file, the user save the configuration file before executing the command.
The Dynamic Range and ENOB Equations are as follows:
Resetting the DUT Entering s from the Main Menu resets the HI7188 to its initial state. The initial state of the HI7188 is as follows: Convert 1 logical channel (physical channel 1, bipolar inputs, gain of 1, conversion mode), bypass line noise rejection filters. The serial interface configuration is MSB first bit positioning, descending byte order, bidirectional I / O Pin. This reset function is also accessible from the sub-menus as previously described in the Software Description Section of this document. Resetting the I / O of DUT Entering i from the Main Menu resets the HI7188 serial interface controller. This has no affect on the HI7188 configuration, only the synchronization of the serial interface is affected. As this hardware and software has been tested and I / O synchronization is automatically maintained, this menu pick will seldom be used. This serial interface reset function is also accessible from the sub-menus as previously described in the Software Description Section of this document.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and / or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
C7 0.01µF CLOCK L1 H1 L2 H2 L3 H3 L4 H4 L5 H5 +5VD
U2 FOSC 14 +5VD C26 CAP V DGND CC
XTAL OSC
TP1 1 CON1
JP3 JMP3
FIGURE 2. SCHEDULE 1 SCHEMATIC
+5V C4 4.7µF AT 10V JP2 1 2 C2 3 JMP3 U1 2 0.01µF R3 +V 6 C8 VOUT 50 5 R1 0.1µF 10K TRIM -V REF 4 3 2 1 JP1 JP3 VREFH
SDIO SDO SCLK MODE
9 10 11 12 13 14 15 16 17 18 19 20 VINL6 VINH5 VINL5 VINH4 VINL4 VINH3 VINL3 VINH2 VINL2 VINH1 VINL1 AVSS AVSS 30 AVDD 29 VRHI 28 VRLO 27 VCM 26 VINH8 25 VINL8 24 VINH7 23 VINL7 22 VINH6 21
40 1 CS MODE 39 2 SCLK RSTIO 38 3 EOS SDO 37 4 A SDIO 2 36 5 A1 OSC 1 35 6 A0 OSC2 34 7 MXC DVDD 8 CA 33 DGND RST 32 DGND 31
Application Note 9518
U3 HI7188IP
CS RSTIO EOS A2 A1 A0 C1 0.01µF MXC CA RST +5VD RS 10 SMA 2 -5V -5V C5 4.7µF AT 10V +5V SMA VREFH PC4 PINCON PC5 PINCON R2 10 R4 10 +5VD C6 4.7µF AT 10V
PC3 PINCON
PC1 PC2 PINCON PINCON
Application Note 9518
VINL1 VINH1 VINL2 VINH2 VINL3 VINH3 VINL4 VINH4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 J2 CON34A 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 VINL5 VINH5 VINL6 VINH6 VINL7 VINH7 VINL8 VINH8 J1 +5V 1A 2A 3A 4A 5A 6A 7A 8A 9A 10A 11A 12A 13A 14A 15A 16A 17A 18A 19A 20A 21A 22A AB 2B 3B 4B 5B 6B 7B 8B 9B 10B 11B 12B 13B 14B 15B 16B 17B 18B 19B 20B 21B 22B +5V D2 IN4000 D3 -5V IN4000 -5V +5VD +5VD D1 IN4000 CONNECTOR EDGE 44AB
FIGURE 2. SCHEDULE 1 SCHEMATIC (Continued)
J24 JMP2 1 TAP1 TAP3 2 R23 2K 1 2 +5V 3 2 -5V 1 P4 PIN 2 J28 JMP2 7 1 + U11 6 OP27
R24 2K -5V 2 3 +5V 4 8 + 7 1 2 1 U12 6 OP27 J15 JMP2 2 1 VINL1 J22 JMP2 VINL2 VINH1 R25 2K 2 1 2 1 J21 JMP2 VINH2 2 1 J19 JMP2 VINH3 2 1 J17 JMP2 VINH4 2 1 2 1 2 1 J20 JMP2 VINL3 J18 JMP2 VINL4 J16 JMP2
VREFH
R31 10K TAP1 R32 4.99K TAP2 R33 10K
R36 23.7K TAP3 R35 2.49K TAP4 R34 23.7K VMINUS 6 R37 10K
VINX P2 PIN TAP2 TAP4 VINY P3 PIN P5 PIN
J25 JMP2
J14 JMP2
+V U10 REF
VOUT 5 TRIM -4 4 -5V
Application Note 9518
J15 JMP2
C9 0.01µF
+5V VINL5 1 J4 JMP2 2 1 J6 JMP2 VINL6 VINH5 2 1 J8 JMP2 VINL7 2 1 J10 JMP2 VINL8 2 1 J12 JMP2 -5V C36 0.01µ C37 0.01µ C38 0.01µ C39 0.01µ C32 0.01µ C33 0.01µ C34 0.01µ C35 0.01µ
BYPASS CAPS FOR OP AMPS
J27 JMP2
R29 2K
J7 JMP2 VINH6
J9 JMP2 VINH7
J11 JMP2 2 1
VINH8 J13 JMP2
FIGURE 3. SCHEDULE 2 SCHEMATIC
VREFH
VREFH JP34 JMP3 1 2 3 VINH1 H1
VREFH
VREFH R51 3 2 1 50 JP21 JMP3 1 2 3 VINH5 H5
R43 3 2 1 JP18 JMP3 50
C11 0.1µF JP35 JMP3 1 2 3
C19 0.1µF JP20 JMP3 1 2 3
JP15 JMP3 R44 3 2 1 JP19 JMP3 50 VINL1 L1 3 2 1 JP12 JMP3 50 R52 VINL5 L5
3 2 1 J16 JMP3 R46 3 2 1 J17 JMP3 50 3 2 1 J14 JMP3 3 2 1 J15 JMP3 3 2 1 J12 JMP3 50 3 2 1 J13 JMP3
C12 0.1µF JP32 JMP3 1 2 3
C20 0.1µF JP23 JMP3 1 2 3
R45 50
VINH2 H2 3 2 1 JP14 JMP3
R53 50
VINH6 H6
C13 0.1µF VINL2 L2
C21 0.1µF VINL6 L6
Application Note 9518
JP33 JMP3
R54 3 2 1 JP13 JMP3 50
JP22 JMP3
C14 0.1µF JP30 JMP3 1 2 3
C22 0.1µF JP25 JMP3 1 2 3
R47 50
VINH3 H3 3 2 1 JP17 JMP3
R55 50
VINH7 H7
C15 0.1µF JP31 JMP3 1 2 3
C23 0.1µF JP24 JMP3 1 2 3
R48 50
VINL3 L3
R42 3 2 1 JP16 JMP3 JP27 R56 JMP3 3 2 1 JP18 JMP3 50 50
VINL7 L7
C16 0.1µF VINH4 H4
C10 0.1µF VINH8 H8
JP28 R49 JMP3
C17 0.1µF JP29 JMP3
C24 0.1µF
JP26 JMP3
VINL8 L8
R50 50
VINL4 L4 3 2 1 JP19 JMP3
R57 50 C25 0.1µF
C18 0.1µF
FIGURE 4. SCHEDULE 3 SCHEMATIC
BYPASS CAPS FOR DIGITAL DEVICES C28 0.01µ C27 0.01µ C29 0.01µ C30 0.01µ C31 0.01µ
U8B 74HC125 5 6
TP3 1 CON1 +5VD R18 10K R17 10K R16 10K R15 10K R14 10K R13 10K U9 2G 1G 3 5 7 9 12 14 16 18 2Y4 2A4 2Y3 2A3 2Y2 2A2 2Y1 2A1 1Y4 1A4 1Y2 1A3 1Y3 1A2 1Y1 1A1 74HC244 19 1 17 15 13 11 8 6 4 A0 2 U4
4 CA MXC EOS SCLK CS RST RSTIO MODE 8 9 U6D 74HC04 11 U6E 74HC04 6 5 U6C 74HC04 EOS
A2 A1 A0 A2 A1 A0 SDO SDO SDIO
TP7 1 CON1 TP2 1 CON1
Application Note 9518
13 U6F 74HC04
TP6 1 CON1
TP5 1 CON1 U7A 74HC125 2 R7 10K 3 U6A 74HC04 1 2 1 TP4 1 CON1 3 5 7 9 12 14 16 18 2Y4 2Y3 2Y2 2Y1 1Y4 1Y3 1Y2 1Y1 U5 2G 1G 2A4 2A3 2A2 2A1 1A4 1A3 1A2 1A1 19 1 17 15 A1 13 11 A2 8 6 4 2
74HC244
R9 10K
U7B 74HC125 6 5
U8D 74HC125 11 13 12 2 1 J3 JMP2
4 U7C 74HC125 9 8 10 R10 10K U6B 4 74HC04 3 13 12 11 U7D 74HC125 R12 10K R11 10K R8 10K R6 10K +5VD R19 10K R21 10K 2 1
U8A 74HC125
FIGURE 5. SCHEDULE 4 SCHEMATIC
Application Note 9518
TABLE 1. PARTS LIST ITEM 1 2 3 4 5 QUANTITY 19 3 18 3 62 REFERENCE C1, C2, C3, C7, C9, C26, C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37, C38, C39 C4, C5, C6 C8, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26 D1, D2, D3 JP1, JP2, JP3, JP4, JP5, JP6, JP7, JP8, JP9, JP10, JP11, JP12, JP13, JP14, JP15, JP16, JP17, JP18, JP19, JP20, JP21, JP22, JP23, JP24, JP25, JP26, JP27, JP28, JP29, JP30, JP31, JP32, JP33, JP34, JP35, J3, J4, J5, J6, J7, J8, J9, J10, J11, J12, J13, J14, J15, J16, J17, J18, J19, J20, J21, J22, J23, J24, J25, J26, J27, J28, J29 J1 J2 P1 R1, R37 R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22 R3, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57 R2, R4, R5 R23, R24, R25, R27, R28, R29 R26, R30 R31, R33 R32 R34, R36 R35 SMA1, SMA2 U1, U10 U2 U3 U5, U9 U6 U7, U8 U11, U12, U13, U14 Y1 0.01µF 10µF at 10V 0.1µF 1N4001 JMP2, JMP3 PART
CONNECTOR EDGE44AB CON34A CONNECTOR DB25 10K 10K 49.9 10 2.0K 2.0K 10K 4.99K 23.7K 2.49K SMA LT1019CN8-2.5 XTAL OSCILLATOR HI7188IP 74HC244 74HC04 74HC125 HA5170 CRYSTAL Shunts Bumpers Cable Pin Sockets 14 Pin IC sockets
Application Note 9518
FIGURE 6. COMPONENTS LAYOUT
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FIGURE 7. COMPONENT SIDE
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FIGURE 8. GROUND PLANES
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FIGURE 9. POWER PLANES
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FIGURE 10. SOLDER SIDE