AN997 Freescale Semiconductor, Inc. CONFIG Register Issues C

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AN997 Freescale Semiconductor, Inc. CONFIG Register Issues C

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Freescale Semiconductor, Inc.
CONFIG Register Issues Concerning M68HC11 Family
Introduction
Some customers field representatives have expressed concerns about reliability CONFIG (configuration) register M68HC11 Family microcontrollers (MCUs). These fears based problems with early mask sets part; however, current production units proper application parts have overcome these earlier problems. earlier fault mechanisms, circuit changes correct them, application guidelines prevent undesirable results presented here.
Discussion Concerns
First, there lack understanding about CONFIG register mechanisms. Because M68HC11 first Family offer semipermanent configuration options, customers unfamiliar with supporting circuit system mechanisms. There been very little printed material explaining these mechanisms showing preferred ways using them. result, many customers have applied M68HC11 ways that contribute problems that make recovery from problems difficult. Useful printed material exists, which will help customers avoid problems older customers understand correct problems. Refer Section MC68HC11A8 HCMOS Single-Chip Microcomputer Technical Data, Motorola document order number MC68HC11A8/D.
Motorola, Inc., 1988, 2000
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Freescale Semiconductor, Inc. Application Note
Second, customers parts with wrong value CONFIG. Motorola distributors always ship products exactly customer requires. problem always caused Motorola distributor. Sometimes CONFIG gets corrupted customer's incoming testing first power turn which happen reset properly controlled during power transitions. Even parts were shipped handled correctly, CONFIG still corrupted manufactured product fault properly designed power reset circuitry. Application techniques allowing such assembly correct itself automatically will discussed Application Guidelines. Third, reset must controlled time below minimum operating level. low-voltage inhibit (LVI) circuit required primarily protection EEPROM (electrically erasable programmable readonly memory) contents, because CONFIG also based EEPROM, protection required even EEPROM array being used. Reset must controlled because (computer processor unit) able fetch execute instructions properly when below minimum operating level. Presently, there several economical ways solve this problem. good external components reset Motorola MC34064 Seiko S-8054HN other S-805 series devices). Seiko part, which extremely power µA), TO-92 package, limited temperature range (-20° +70°C), available various trip-point voltage ranges. S-8054HN trip point usually most suited 1-MHz rather than 2.1-MHz frequency. Motorola MC34064 available TO-92 SO-8, draws about works over -40° +85°C, very wellcontrolled trip point, very inexpensive. Many other components available, often incorporated into voltage regulator.
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Application Note Early Fault Mechanisms
Early Fault Mechanisms
known cases CONFIG erasure corruption well understood. cases, starts execute nonsense code drops unacceptably level. most typical problem power turn off, same problem happen even drops only very short period. Power turn less often problem because most users accustomed controlling reset predictable startup. Because M68HC11 fully static design, oscillator startup delay actually required; this requirement (which dropped with latest documentation revision. application some special requirement accurate timing within first several milliseconds after power-up, delay power-up still required. Since delay required, reset circuit simple MC34064 pullup register. When drops, misbehave number ways, almost which altered EEPROM CONFIG early mask sets M68HC11 (A38P, A49N, before). However, current parts nearly sensitive accidental EEPROM errors. First, when drops, branch instructions have tendency stop branching sooner than other functions fail work because logic circuits used resolve branch conditions more complex than instructions such load, store, etc. result, programs tend executed linearly, ignoring branches. instructions intended EEPROM programming soon encountered erroneously, some change (write erase) takes place. likelihood this occurrence depends lot-to-lot processing differences, which affect level where branch instructions stop working. much older A38P material, this condition primary cause EEPOM corruption, much less common cause more recent parts. example drop branch instructions used your advantage shown BUFFALO monitor version 2.5.
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Freescale Semiconductor, Inc. Application Note
Second, when drops, opcode incorrectly read from memory (either internal external) resulting illegal opcode interrupt. many user systems, this vector initialized; thus, another illegal opcode usually encountered before (return from interrupt), which turn creates infinite series illegal opcode requests. stacking operations cause registers repeatedly written memory locations descending order. MHz, entire memory could filled less than this mechanism. A38P, A49N, older mask sets, having EELAT EEPGM both would cause programming erasure. Since stacking takes nine bytes, registers will eventually written PPROG address, likely that least registers will have least significant bits (corresponding EELAT EEPGM). This mechanism will have tendency byte erase $B600 since CONFIG byte erasable. Thus, case stack runaway, $B600 would last EEPROM address written until next wraparound. BYTE bits happen ERASE bulk erase everything will occur, including CONFIG, since this case CONFIG would last location written until next wraparound stack. Depending other bits written PPROG, several results occur including programming erasure locations CONFIG. This failure mechanism common older parts (A38P, A49N, before). Since runaway problem concerns operation levels VDD, many other sequences possible. should clear that should allowed execute instructions when support proper operation. Fortunately, because standby feature M68HC11, reset logic specifically designed operate properly extremely levels VDD.
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Application Note Questions Interest
Questions Interest
Question Answer what level does misinterpret commands? This level depends processing, operating temperature, operating frequency. 125°C, could fail drops below room temperature, should operate correctly with indication, guarantee). what level internal programming supply incapable changing EEPROM changes have been caused MC68HC05A6, which similar M68HC11, levels Most Motorola EEPROMs stop being able program lower slower longer takes program erase because charge pump efficiency falls off. Digital logic devices conventional opamps generally good enough function since their operation guaranteed enough supply voltage. Question Answer just incorporate circuit M68HC11 chip? Experiments being conducted that might eventually allow this, right combination process capabilities does presently exist. M68HC11 uses digital HCMOS process that optimized characterized digital logic. circuits choice linear CMOS process, which compatible with current M68HC11 process. Even process existed, problem still solved because applications need same trip-point voltage range. High performance applications need maximum speed, which, turn, dictates high trip point (~4.5 Battery-operated applications require very power supply current wider operating voltage range (~3.0 accommodate battery wear out). These applications sacrifice speed (32-kHz 1-MHz frequency). trip point about would required these applications. Many system-related details must resolved allow control this flexibility.
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Question
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Answer
Freescale Semiconductor, Inc. Application Note
Question Answer What about long-term retention CONFIG EEPROM byte? answering this question lies understanding wear characteristics EEPROM. When EEPROM (that been written erased only tens times), ideal oxides, programs quickly, retains data very well. cell erased reprogrammed thousands times, oxide degrades charge-trapping mechanism. This trapped charge interferes with operation EEPROM cell increasing programming time and, more unusual cases, reducing retention time programmed bits. specified programming time nominal) value that will assure proper programming after thousands write-erase cycles; typically programs Theoretically, that programmed longer will retain value longer. benefit limited because rate charge transfer exponential; consequently, there significant improvement once programmed hard. Based extensive reliability data, parts have shown failure retain data early stages wear (tens hundreds cycles). CONFIG byte should only write-erase cycles life product; hence, will have much shorter programming time much longer retention than byte programmed erased thousands times. specifications statement EEPROM capabilities after been exposed thousands write-erase cycles. Furthermore, significantly better than specifications when new. bytes that have only been programmed erased tens times, standard programming time more than enough program byte hard. There would special advantage programming CONFIG longer than this time, although would also cause harm.
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Application Note Circuit Design Changes
Circuit Design Changes
original specification called programming procedure requiring several writes specific data specified order enable program/erase voltage. Unfortunately, actual circuit design enforce this sequence; therefore, very easy enable programming voltage source array (until B96D B46E mask sets). When field problems associated with this error surfaced, Motorola made drastic changes programming logic fully enforce sequence needed enable programming supply. These changes actually went beyond what originally specified, they first appeared production B96D mask set. circuit, single write PPROG with least significant bits would initiate program erase function some EEPROM location(s). necessary into code that changed EEPROM purpose. runaway situation, there relatively high probability that something EEPROM CONFIG would corrupted. current circuit, sequence least three writes must performed correct order with correct data change take place. additional protection mechanism CONFIG location exists that this register only changed while operating special modes (test bootstrap). Getting into special mode requires different levels hard-wired mode pins. current sequence required still conforms documented programming erase procedures; therefore, changes required user application software. current sequence follows: Write PPROG with EELAT equal EEPGM equal EELAT will change unless corresponding EEPGM Write EEPROM location CONFIG). location written before next step, location will changed.
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Freescale Semiconductor, Inc. Application Note
Write PPROG with both EELAT EEPGM equal which locks further changes latched address. Writing address after writing EEPGM will change address location being altered. Write PPROG with EEPGM equal (Any write PPROG with EELAT EEPGM bits equal will also programming erase operation.) Write PPROG.
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only shortcuts allowed this procedure are: Clear PPROG program erase operation instead 2-step procedure (steps Leave EELAT equal between successive bytes when programming series locations (turn EEPGM between successive bytes).
probability meeting sequence requirements accident" been drastically reduced. Reset must controlled with circuit during power transitions sure corruption will occur.
Application Guidelines
Always include low-voltage detector control reset. easiest type 3-terminal device like MC34064 Seiko S-8054HN. open drain type device available, device with push-pull output used placing resistor series from output reset line M68HC11. looks like pullup when good; looks like pulldown when low. Another circuit based Motorola TL431 shown Section MC68HC11A8 HCMOS Single-Chip Microcomputer Technical Data, Motorola document order number, MC68HC11A8/D. This circuit draws several milliamps provides very good reset signal over full -40°C +125°C range. nice aspect this circuit that passively pulls down only provides logic reset when above trip point. Other circuits stop working some level VDD. proper operation M68HC11, reset must until less than
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Application Note Application Guidelines
system configured comes reset special test mode. Some system integrity functions overridden while test bootstrap) mode. example, 64-cycle limitation writes sensitive registers does apply test mode, resets from watchdog clock monitor inhibited. Secondly, there some important capabilities that available normal operating modes. mode itself changed while special mode (SMOD HPRIO register equal Software begin special mode change safer normal mode under program control. reset interrupt vectors fetched from $BFC0 $BFFF rather than from $FFC0 $FFFF. normal expanded operating mode, vectors external memory only accessible ROMON CONFIG part comes with wrong value CONFIG CONFIG gets changed, internal could turned making vectors inaccessible. similar problem arises NOCOP gets enabled software does have necessary routine service approaches correcting CONFIG presented following paragraphs. system expanded system with external program memory, expanded test mode approach used memory such that reset interrupt vectors located $BFFx area wire mode selects special test mode. used external memory, leave address line decode that memory such that appears both $A000 $BFFF $E000 $FFFF. Most software would written memory were only $E000 $FFFF area, initialization routine would written were $A000 $BFFF area. response reset, will execute this code even CONFIG wrong value. This code would check CONFIG only correct wrong. erase reprogram CONFIG every power CONFIG already correct, write time-protected registers needed; then write HPRIO register change normal operating mode. CONFIG wrong, correct needed, then force reset cause CONFIG
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Freescale Semiconductor, Inc. Application Note
updated with corrected value. This reset forced software ways. would FCOP bits TEST register. Another way, which does test features, would enable clock monitor (CME enable reset functions (DISR TEST register); enable STOP register then execute STOP instruction, which will result clock monitor reset. should have corrected value CONFIG register.
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completely different approach uses bootstrap mode correct erroneous CONFIG event corruption. this approach, finished product wired reset normal modes reset bootstrap mode under special circumstances. procedure reset special mode hidden from customers, desired. Rather than tying MODB directly VDD, connect through pullup (4.7-k would good), provide test point other means this pulled allow reset special bootstrap mode. PD0/RxDS PD1/TxD pins should accessible such that activity these pins during bootloading compatible with normal application use. Usually, this procedure requires nothing new, except possibly test point wire external system could drive line. loading process drives transmit data pin; however, necessary monitor this information. Since port outputs configured open-drain operation during bootloading, pullup needed PD1/TxD line. expanded test mode approach advantage being completely automatic necessarily best choice. bootstrap approach minimum requirement good design. Avoid design which CONFIG change involves removing from finished product. Refer Section MC68HC11A8 HCMOS Single-Chip Microcomputer Technical Data, Motorola document order number MC68HC11A8/D.
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Application Note General Comments
General Comments
When resetting normal single-chip mode, internal enabled (regardless state ROMON CONFIG), which means that internal will accessible even CONFIG gets corrupted. part with security mode capability gets NOSEC programmed erase CONFIG attempting reset bootstrap mode. necessary load anything; just come reset special bootstrap mode. firmware bootloader checks NOSEC bit; erases EEPROM CONFIG register before going downloading phase. problem existed older parts involving programming EEPROM while certain other unusual conditions existed. used Motorola provide external 19-volt programming supply bulk programming mode. switch this pin, made from single transistor, worked fine when high during EEPROM programming operations. problem caused configured edge-triggered operation low-level while EEPROM programming erase operation being performed. difference between level charge pump output (~20 volts) other side switch caused breakdown switch. This breakdown (temporary non-destructive) caused repeated requests, which hung system long enough reset occur. customers were only programming EEPROM their factories; hence, they changed procedure that masked and/or kept high during programming operation. meantime, Motorola changed design switch eliminate breakdown mechanism. Current production parts subject this potential problem. Some MC68HC11A2 parts (and older MC68HC11A8 parts) were manufactured with EEPROM that slow recover from programming operations. This problem could cause EEPROM read incorrectly attempt made read EEPROM location less than cycles MHz) after EEPGM written (corresponding programming cycle).
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Freescale Semiconductor, Inc. Application Note
Consider problem described previous paragraph. that case, EEPROM programming operation terminated reset. reset drove reset four cycles released this rising edge reset, CONFIG location transferred CONFIG working latches (like read operation). Because slow recovery EEPROM, CONFIG incorrectly initialized. test mode, CONFIG register MC68HC11A2 written like regular register. reset test mode, CONFIG written directly, then mode controls changed normal mode. Even CONFIG EEPROM byte completely stuck, normal operation possible. byte erase CONFIG byte MC68HC11A2.
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Conclusion
While CONFIG register mechanism offers unprecedented degree flexibility MCU, also presents some design challenges user. Like many features MCUs, serious problems arise care exercised their use. Many such problems have arisen CONFIG register M68HC11 because function, guidelines proper application were readily available. This application note explained problems what should done correct prevent them. Following guidelines forth here will assure reliable operation CONFIG register mechanism M68HC11.
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
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AN997 Freescale Semiconductor, Inc. CONFIG Register Issues C

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