AN974 Freescale Semiconductor, Inc. MC68HC11 Floating-Point

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AN974 Freescale Semiconductor, Inc. MC68HC11 Floating-Point

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Freescale Semiconductor, Inc.
MC68HC11 Floating-Point Package
Introduction
MC68HC11 very powerful capable single-chip microcontroller. concise instruction combined with powerful addressing modes, true manipulation, 16-bit arithmetic operations, second 16-bit index register make ideal control applications requiring both high-speed input/output (I/O) high-speed calculations. While most applications implemented using 16-bit integer precision MC68HC11, certain applications algorithms difficult impossible implement without floating-point math. goal writing MC68HC11 floating-point package provide fast, flexible floating-point math just such applications. HC11 floating-point package (HC11FP) implements more than just four basic math functions (add, subtract, multiply, divide); also provides routines convert from ASCII floating point from floating point ASCII. those applications that require three basic trig functions SINE, COSine, TANgent provided along with some trig utility functions converting from both radians degrees. square root function also included. those applications that benefit using both integer floatingpoint operations, there routines convert from integer floating-point format.
Motorola, Inc., 1987, 2000
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Freescale Semiconductor, Inc. Application Note
entire floating-point package requires just little over Kbytes memory only requires bytes page-zero random-access memory (RAM) addition stack RAM. temporary variables needed floating-point routines reside stack. This feature makes routines completely re-entrant long bytes page zero saved before using routines. This will allow both interrupt routines main line programs float-point package without interfering with another.
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Floating-Point Format
Floating-Point Accumulator Format
bytes page-zero used software floating-point accumulators, FPACC1 FPACC2. Each five-byte accumulator consists one-byte exponent, three-byte mantissa, byte that used indicate mantissa sign. exponent byte used indicate position binary point biased decimal ($80) make floating-point comparisons easier. This one-byte exponent gives dynamic range about mantissa consists three bytes bits) used hold both integer fractional portion floating-point number. mantissa always assumed normalized (for example, mostsignificant most-significant byte one). 24-bit mantissa will provide slightly more than seen decimal digits precision. separate byte used indicate sign mantissa rather than keeping two's complement form that unsigned arithmetic operations used when manipulating mantissa. positive mantissa indicated this byte being equal zero ($00). negative mantissa indicated this byte being equal minus ($FF). FPACC1 FPACC2 C90FDB C90FDB +3.1415927 -3.1415927
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Application Note Errors
Memory Format
that floating-point numbers stored memory memory format floating-point number slightly different than floating-point accumulator format. order save memory, floatingpoint numbers stored memory format called hidden normalized form. this format, number stored into four consecutive bytes with exponent residing lowest address. mantissa stored next three consecutive bytes with most-significant byte stored lowest address. Since most-significant mantissa normalized floating-point number always one, this used store sign mantissa. This results positive numbers having most-significant mantissa cleared (zero) negative numbers having their most-significant (one). example: 490FDB C90FDB +3.1415927 -3.1415927
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There four routines that used save load floatingpoint accumulators same time convert between floatingpoint accumulator memory format. These routines discussed detail Floating-Point Routines.
Errors
There seven error conditions that returned HC11 floating-point package. When error occurs, condition indicated calling program setting carry condition code register returning error code accumulator. error codes their meanings explained Table
NOTE:
None routines check valid floating-point numbers either FPACC1 FPACC2. Having illegal floating-point values floatingpoint accumulators will produce unpredictable results.
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Freescale Semiconductor, Inc. Application Note
Table Error Codes
Error Number Meaning Format error ASCII floating-point conversion Floating-point overflow Floating-point underflow Division zero Floating-point number large small convert integer Square root negative number (90°)
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Floating-Point Routines
This section provides description each routine floating-point package. information provided includes subroutine name, operation performed, subroutine size, stack space required, other subroutines that called, input, output, possible error conditions. stack space required subroutine includes only that required particular routines local variables, also stack space that used other subroutine's that called including return addresses.
NOTE:
trig functions require good deal stack space. Since some applications require routines provided floating-point package, description each routine includes names other subroutines that calls. This makes easy determine exactly which subroutines required particular function.
ASCII-to-Floating-Point Conversion
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: ASCFLT ASCII FPACC1 bytes (includes NUMERIC subroutine) bytes NUMERIC, FPNORM, FLTMUL, PSHFPAC2, PULFPAC2 register points ASCII string convert. FPACC1 contains floating-point number. Floating-point format error returned. AN974
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Application Note Floating-Point Routines
Notes:
This routine converts ASCII floating-point number format required floating-point routines. Conversion stops either when non-decimal character encountered before exponent after exponent digits have been converted. input format very flexible. Some examples shown here. 20.095 0.125 7.2984E 167.824E5 005.9357E-7
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Floating-Point Multiply
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: FLTMUL FPACC1 FPACC2 FPACC1 bytes bytes PSHFPAC2, PULFPAC2, CHCK0 FPACC1 FPACC2 contain numbers multiplied. FPACC1 contains product floating-point accumulators. FPACC2 remains unchanged. Overflow, underflow
Floating-Point
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: Notes: FLTADD FPACC1 FPACC2 FPACC1 bytes bytes PSHFPAC2, PULFPAC2, CHCK0 FPACC1 FPACC2 contain numbers added. FPACC1 contains numbers. FPACC2 remains unchanged. Overflow, underflow floating-point routine performs full signed addition. Both floating-point accumulators have mantissas with same different sign.
Floating-Point Subtract
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: Notes: FLTSUB FPACC1 FPACC2 FPACC1 bytes bytes FLTADD FPACC1 FPACC2 contain numbers subtracted. FPACC1 contains difference numbers (FPACC1 FPACC2). FPACC2 remains unchanged. Overflow, underflow Since FLTADD performs full signed addition, floating-point subtract routine inverts sign byte FPACC2, calls FLTADD, then changes sign FPACC2 back what originally.
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Freescale Semiconductor, Inc. Application Note
Floating-Point Divide
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: FLTDIV FPACC1 FPACC2 FPACC1 bytes bytes PSHFPAC2, PULFPAC2 FPACC1 FPACC2 contain divisor dividend respectively. FPACC1 contains quotient. FPACC2 remains unchanged. Divide zero, overflow, underflow
Floating-Point-to-ASCII Conversion
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Subroutine name: Operation: Size: Stack space: Calls: Input: Output:
Error conditions:
FLTASC FPACC1 bytes bytes FLTMUL, FLTCMP, PSHFPAC2, PULFPAC2 FPACC1 contains number converted ASCII string. index register points 14-byte string buffer. buffer pointed index register contains ASCII string that represents number FPACC1. string terminated with zero byte register points start string. None
Floating-Point Compare
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: FLTCMP FPACC1 FPACC2 bytes None None FPACC1 FPACC2 contain numbers compared. Condition codes properly that branch instructions used alter program flow. FPACC1 FPACC2 remain unchanged. None
Error conditions:
Unsigned Integer Floating Point
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: UINT2FLT (6-bit unsigned integer) FPACC1 bytes bytes FPNORM, CHCK0 lower bits FPACC1 mantissa contain unsigned 16-bit integer. FPACC1 contains flowing-point representation 16-bit unsigned integer. None
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Application Note Floating-Point Routines
Signed Integer Floating Point
Subroutine Name: SINT2FLT Operation: (16-bit signed integer) FPACC1 Size: bytes Stack space: bytes Calls: UINT2FLT Input: lower 16-bits FPACC1 mantissa contain signed integer. Output: FPACC1 contains floating-point representation 16-bit signed integer. Error conditions: None
Floating Point Integer
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Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: Notes:
FLT2INT FPACC1 (16-bit signed unsigned integer) bytes bytes CHCK0 FPACC1 contain floating-point number range 65535 FPACC1 32767. lower 16-bits FPACC1 mantissa will contain 16-bit signed unsigned number. None floating-point number FPACC1 positive, will converted unsigned integer. number negative will converted signed two's complement integer. This type conversion will allow 16-bit addresses represented positive numbers floating-point format. fractional part floating-point number discarded.
Transfer FPACC1 FPACC2
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: TFR1TO2 FPACC1 FPACC2 bytes bytes None FPACC1 contains floating-point number FPACC2 contains same number FPACC1. None
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Freescale Semiconductor, Inc. Application Note Floating-Point Functions
This section describes supplied floating-point functions, returned results, possible error conditions. Note that even though Taylor series which used calculate trig functions requires that input angle expressed radians less precision lost through angle reduction angle being reduced expressed degrees. Once angle reduced, DEG2RAD subroutine called convert angle radians.
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reduce number factors Taylor expansion series angles reduced fall between ANGRED subroutine. This subroutine returns reduced angle FPACC1 along with quad number that original angle flag that tells calling routine whether actually needs calculate sine cosine reduced angle obtain proper answer.
Square Root
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: FLTSQR FPACC1 FPACC1 bytes bytes TFR1TO2, FLTDIV, FLTADD, PSHFPAC2, PULFPAC2 FPACC1 contains valid floating-point number. FPACC1 contains square root original number. FPACC2 unchanged. NSQRTERR returned number FPACC1 negative FPACC1 remains unchanged.
Sine
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: Notes: FLTSIN (FPACC1) FPACC1 bytes (including SINCOS subroutine) bytes ANGRED, SINCOS, DEG2RAD, PSHFPAC2, PULFPAC2 FPACC1 contains angle radians range FPACC1 FPACC1 contains sine FPACC1, FPACC2 remains unchanged. None Taylor expansion series used calculate sine angle between subroutine ANGRED called reduce input angle within this range. Spot checks show maximum error throughout input range.
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Application Note Floating-Point Functions
Cosine
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: Notes: FLTCOS COS(FPACC1) FPACC1 bytes (including SINCOS subroutine) bytes ANGRED, FLTSIN, DEG2RAD, PSHFPAC2 FPACC1 contains angle radians range FPACC1 FPACC1 contains cosine FPACC1, FPACC2 remains unchanged. None Taylor expansion series used calculate cosine angle between subroutine ANGRED called reduce input angle within this range. Spot checks show maximum error throughout input range. FLTTAN (FPACC1) FPACC1 bytes (also requires FLTSIN FLTCOS) bytes TFR1TO2, EXG1AND2, FLTSIN, FLTCOS, FLTDIV, PSHFPAC2, PULFPAC2 FPACC1 contains angle radians range FPACC1 FPACC1 contains tangent input angle, FPACC2 remains unchanged. returns largest legal number tangent attempted. tangent input angle calculated first obtaining sine cosine input angle then using this formula: COS. 89.9° tangent function only accurate decimal digits. angles greater than 89.9°, accuracy decreases rapidly. DEG2RAD FPACC1 FPACC1 bytes bytes GETFPAC2, FLTMUL valid floating-point number representing angle degrees. Input angles equivalent degrees. None GETPI FPACC1 bytes None None value returned FPACC1. None This routine should used obtain value required calculations since accurate full bits mantissa.
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Tangent
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions: Notes:
Degrees Radians Conversion
Subroutine name: Operation: Size: Stack space: Calls: Input: Output: Error conditions:
Subroutine name: Operation: Size: Stack space: Input: Output: Error conditions: Notes:
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Freescale Semiconductor, Inc. Application Note Floating-Point Conversion Routines
discussed Floating-Point Accumulator Format Memory Format, format floating-point numbers they appear floating-point accumulators different than numbers stored memory. This done primarily save memory when large number floating-point variables used program. Four routines provided convert from different formats while same time moving number into floating-point accumulators. always using these routines move numbers into floating-point accumulators, would extremely easy adapt this floating-point package work with other floating-point format. example might interface this package with code produced Motorola's 68HC11 compiler. Motorola compiler generates code single-precision floating-point numbers whose internal format that defined IEEE Standard Binary Floating-Point Arithmetic. rewriting four routines described here IEEE format could easily converted format required this floating-point package.
FPACC(x)
Subroutine name: Operation: Size: Stack space: Input: Output: Error conditions: GETFPAC1 FETFPAC2 FPACC1; FPACC2 bytes each None index register points memory formatted number moved into floating-point accumulator. number pointed specified floating-point accumulator. None
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FPACC(x)
Subroutine name: Operation: Size: Stack space: Input: Output: Error conditions: PUTFPAC1 PUTFPAC2 FPACC1 (X); FPACC2 bytes each None index register points four consecutive memory locations where number will stored. floating-point accumulator moved into consecutive memory locations pointed index register. None
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Application Note Floating-Point Conversion Routines
Freescale Semiconductor, Inc.
0001 0002 0003 0004 0005 0006 0007 0008 0009 0010 0011 0012 0013 0014 0015 0016 0017 0018 0019 0020 0021 0022 0023 0024 0025 0026 0027 0028 0029 0030 0031 0032 0033 0034 0035 0036 0037 0038 0039 0040 0041 0042 0043 0044 0045 0046 0047
0000 0000 0001 0004 0005 0006 0009
0001 0002 0003 0004 0005 0006 0007
HC11FP Copyright 1986 Gordon Doughman source code this floating point package MC68HC11 freely distributed under rules public domain. However copyrighted work such sold product included part product sale without express permission author. object code produced source code included part product sale. there questions comments about floating point package please feel free contact Gordon Doughman Motorola Semiconductor 3490 South Dixie Drive Dayton, 45439 (513) 294-2231 $0000 FPACC1EX FLOATING POINT ACCUMULATLR FPACC1MN MANTSGN1 MANTISSA SIGN FPACC1 (0=+, F=-). FPACC2EX FLOATING POINT ACCUMULATOR FPACC2MN MANTSGN2 MANTISSA SIGN FPACC2 (0=+, FF=-). FLTFMTER floating point format error ASCFLT OVFERR floating point overflow error UNFERR floating point underflow error DIV0ERR division error TOLGSMER number large small convert int.*/ NSQRTERR tried take square root negative TAN90ERR TANgent degrees attempted ASCFLT
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Freescale Semiconductor, Inc. Application Note
0048 0049 0050 0051 0052 0053 0054 0055 0056 0057 0058 0059 0060 0061 0062 0063 0064 0065 0066 0067 0068 0069 0070 0071 0072 0073 0074 0075 0076 0077 0078 0079 0080 0081 0082 0083 0084 0085 0086 0087 0088 0089 0090 0091 0092 0093 0094 0095 0096 0097 0098 0099 0100 0101 0102 0103 0104 0105 0106 0107 0108 0109 0110 0111 ASCII FLOATING POINT ROUTINE This routine will accept most ASCII floating point format return 32-bit floating point number. following some examples legal ASCII floating point numbers. 20.095 0.125 7.2984E10 167.824E5 5.9357E-7 floating point number returned "FPACC1". exponent biased facilitate floating point comparisons. pointer ASCII string passed routine D-register. $0000 FPACC1EX FLOATING POINT ACCUMULATOR FPACC1MN MANTSGN1 MANTISSA SIGN FPACC1 (0=+, FF=-). FPACC2EX FLOATING POINT ACCUMULATOR FPACC2MN MANTSGN2 MANTISSA SIGN FPACC2 (0=+, FF=-). FLTFMTER LOCAL VARIABLES STACK POINTED EXPSIGN EXPONENT SIGN (0=+, FF=-). PWR10EXP POWER EXPONENT. $C000 (TEST EVB) ASCFLT PSHX SAVE POINTER ASCII STRING. PSHFPAC2 SAVE FPACC2. PUSH ZEROS STACK INITIALIZE LOCALS. PSHX ALLOCATE BYTES LOCALS. FPACC1EX CLEAR FPACC1. FPACC1EX+2 MANTSGN1 MAKE MANTISSA SIGN POSITIVE INITIALLY. POINT LOCALS. POINTER ASCII STRING. ASCFLT1 LDAA CHARACTER STRING. NUMERIC NUMBER. ASCFLT4 YES. PROCESS LEADING MINUS SIGN ENCOUNTERED? ASFCFLT2 CMPA #'NO. MINUS SIGN?
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0000 0001
C000 C000 C000 C001 C004 C007 C008 C00A C00C C00F C011 C014 C016 C019
C01B
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Application Note Floating-Point Conversion Routines
0112 0113 0114 0115 0116 0117 0118 0119 0120 0121 0122 0123 0124 0125 0126 0127 0128 0129 0130 0131 0132 0133 0134 0135 0136 0137 0138 0139 0140 0141 0142 0143 0144 0145 0146 0147 0148 0149 0150 0151 0152 0153 0154 0155 0156 0157 0158 0159 0160 0161 0162 0163 0164 0165 0166 0167 0168 0169 0170 0171 0172 0173 0174 0175
C01D C01F C022 C023 C025 C028
LDAA
ASCFLT3 MANTSGN1 NUMERIC ASCFLT4
CHECK DECIMAL POINT. YES. MANTISSA SIGN. LEADING MINUS BEFORE? POINT NEXT CHARACTER. NUMBER? YES. PROCESS
LEADING DECIMAL POINT?
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C02A C02C C02E C02F C031 C034 C036
ASCFLT3
CMPA LDAA
ASCFLT5 NUMERIC ASCFLT5 ASCFLT11
DECIMAL POINT? FORMAT ERROR. YES. POINT NEXT CHARACTER. MUST HAVE LEAST DIGIT AFTER D.P. REPORT ERROR. BUILD FRACTION.
C039 C03A C03B C03E C03F C041 C042
ASCFLT5
FLOATING POINT FORMAT ERROR PULX LDAA DE-ALLOCATE LOCALS. PULFPAC2 #FLTFMTER RESTORE FPACC2. POINTER TERMINATING CHARACTER STRING. FORMAT ERROR. ERROR FLAG. RETURN.
C043 C045 C048 C04A C04D C04E
ASCFLT4
DECIMAL POINT MANTISSA BUILD LDAA NUMERIC ASCFLT10 ADDNXTD ASCFLT4
C050 C053 C055 C056 C059 C05B C05D
ASCFLT6
DECIMAL POINT MANTISSA OVERFLOW LDAA CMPA FPACC1EX NUMERIC ASCFLT6 ASCFLT7 EACH DIGIT ENCOUNTERED PRIOR D.P. NEXT CHARACTER. POINT NEXT. DIGIT? YES. KEEP BUILDING POWER MANTISSA. DECIMAL POINT? CHECK EXPONENT.
C05F C061 C064 C066 C067 C069 C06B C06D
ASCFLT8
FRACTIONAL DIGITS SIGNIFICANT LDAA CMPA NUMERIC ASCFLT7 ASCFLT8 ASCFLT13 FINISH NEXT CHARACTER. DIGIT? CHECK EXPONENT. POINT NEXT CHARACTER. FLUSH REMAINING DIGITS. EXPONENT? YES. PROCESS FINISH CONVERSION.
ASCFLT7
C070 C071 C073 C076
ASCFLT13
PROCESS EXPONENT LDAA POINT NEXT CHARACTER. NEXT CHARACTER. IT'S DIGIT. YES. EXPONENT.
NUMERIC ASCFLT9
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Freescale Semiconductor, Inc. Application Note
0176 0177 0178 0179 0180 0181 0182 0183 0184 0185 0186 0187 0188 0189 0190 0191 0192 0193 0194 0195 0196 0197 0198 0199 0200 0201 0202 0203 0204 0205 0206 0207 0208 0209 0210 0211 0212 0213 0214 0215 0216 0217 0218 0219 0220 0221 0222 0223 0224 0225 0226 0227 0228 0229 0230 0231 0232 0233 0234 0235 0236 0237 0238 0239 C078 C07A C07C C07E C080 C082 C085 C086 C088 C08B C08D C08F C092 C093 C095 C098 C09A C09D C09E C09F C0A2 C0A3 C0A5 C0A6 C0A9 C0AB C0AD C0B0 C0B3 C0B5 C0B6 C0B8 COBA CMPA CMPA LDAA SUBA STAA LDAA LDAB LSLB LSLB ADDB LSLB SUBA STAA CMPA LDAA NEGA ADDA STAA ASCFLT15 ASCFLT16 ASCFLT5 EXPSIGN,Y NUMERIC ASCFLT5 #$30 PWR10EXP,Y NUMERIC ASCFLT14 PWR10EXP,Y MINUS SIGN? YES. FLAG NEGATIVE EXPONENT. PLUS SIGN? YES. JUST IGNORE FORMAT ERROR. FLAG NEGATIVE EXPONENT. 1ST? POINT NEXT CHARACTER. NEXT CHARACTER. NUMBER? FORMAT ERROR. MAKE BINARY. BUILD POWER EXPONENT. POINT NEXT CHARACTER. NUMERIC? FINISH CONVERSION. YES. PREVIOUS DIGIT. MULT. MAKE SECOND DIGIT BINARY. FIRST DIGIT. EXPONENT RANGE? YES. REPORT ERROR. POWER EXPONENT. NEGATIVE? BUILT EXPONENT. FINAL TOTAL EXPONENT. SAVE RESULT. FINISH CONVERSION.
ASCFLT15 ASCFLT16
ASCFLT9
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PWR10EXP,Y #$30 PWR10EXP,Y ASCFLT5 PWR10EXP,Y EXPSIGN,Y ASCFLT12 FPACC1EX FPACC1EX FINISH
ASCFLT14
ASCFLT12
C0BC C0BE C0C0
ASCFLT10
PRE-DECIMAL POINT NON-DIGIT FOUND, DECIMAL POINT? CMPA ASCFLT7 DECIMAL POINT? CHECK EXPONENT. YES. POINT NEXT CHARACTER.
COC1 COC3 C0C6 C0C8 C0CA C0CB C0CD C0D0
ASCFLT11
POST DECIMAL POINT PROCESSING LDAA NUMERIC ASCFLT7 ADDNXTD ASCFLT8 FPACC1EX ASCFLT11 NEXT CHARACTER. NUMERIC? CHECK EXPONENT. YES. DIGIT. POINT NEXT CHARACTER. OVER FLOW, FLUSH REMAINING DIGITS. ADJUST POWER EXPONENT. PROCESS FRACTIONAL DIGITS.
C0D2 C0D4 C0D6 C0D8 C0DA C0DB C0DE COE0 COE1 C0E4 C0E6
ADDNXTD
LDAA STAA LSLD LSLD ADDD
FPACC1MN FPACC2MN FPACC1MN+1 FPACC2MN+1 FPACC1MN ADDNXTD1 FPACC1MN ADDNXTD1 FPACC2MN+1
UPPER BITS. COPY INTP FPAC2. LOWER BITS MANTISSA. COPY INTO FPACC2. MULT. OVERFLOW? YES. DON'T DIGIT MULT. OVERFLOW? YES. DON'T DIGIT
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Application Note Floating-Point Conversion Routines
0240 0241 0242 0243 0244 0245 0246 0247 0248 0249 0250 0251 0252 0253 0254 0255 0256 0257 0258 0259 0260 0261 0262 0263 0264 0265 0266 0267 0268 0269 0270 0271 0272 0273 0274 0275 0276 0277 0278 0279 0280 0281 0282 0283 0284 0285 0286 0287 0288 0289 0290 0291 0292 0293 0294 0295 0296 0297 0298 0299 0300 0301 0302
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C0E8 C0E9 C0EB C0ED C0EF C0F1 C0F2 C0F4 C0F5 C0F8 COFA C0FC C0FE C100 C101 C103 C105 C107 C109 C10B C10D C10E C110 C112 C114 C116
ADDNXTD1
PSHA LDAA ADCA ADDA STAA PULA LSLD LDAB SUBB CLRA ADDD LDAA ADCA STAA LDAA STAA
FPACC1MN FPACC2MN FPACC1MN ADDNXTD1 FPACC1MN FPACC1MN+1 ADDNXTD1 #$30 FPACC1MN+1 FPACC1MN+1 FPACC1MN ADDNXTD1 FPACC1MN FPACC2MN+1 FPACC1MN+1 FPACC2MN FPACC1MN
SAVE UPPER BITS. POSSIBLE CARRY FROM LOWER BITS. UPPER BITS. SAVE RESTORE OVERFLOW? DON'T SAVE LOWER BITS. OVERFLOW? DON'T CURRENT DIGIT. MAKE BINARY. 16-BIT. TOTAL. SAVE RESULT. UPPER BITS. POSSIBLE CARRY. OVERFLOW? YES. COPY MANTISSA FROM FPACC2. EVERYTHING RETURN. RESTORE ORIGINAL MANTISSA BECAUSE OVERFLOW.
RETURN.
C117 C117 C11A C11D C120 C122 C124 C127 C129 C12B C12E C131 C133 C135 C138 C13B C13E C140 C143 C146 C149 C14C C14E C14F C150 C153 C154
FINISH
FINISH CONVERSION MULTIPLYING RESULTANT MANTISSA EACH POSITIVE POWER EXPONENT RECEIVED (DIVIDE EACH NEGATIVE POWER EXPONENT RECEIVED.
FINISH1 FINISH2
FINISH3
LDAA STAA LDAA STAA PULX
#FPACC1EX CHCK0 FINISH3 FPACC1EX PWR10EXP,Y #$80+24 FPACC1EX FPNORM PWR10EXP,Y FINISH3 FINISH1 #CONSTP1 GETFPAC2 PWR10EXP,Y FINISH2 #CONST10 GETFPAC2 FLTMUL PWR10EXP,Y FINISH2
SAVE POINTER TERMINATING CHARACTER STRING. POINT FPACC1. NUMBER ZERO. QUIT POWER EXPONENT. SAVE INITIAL EXPONENT BITS BIAS). NORMALIZE MANTISSA. POWER EXPONENT POSITIVE ZERO? IT'S ZERO, WE'RE DONE. IT'S POSITIVE MULTIPLY CONSTANT (DIVIDE 10). CONSTANT INTO FPACC2. MAKE POWER EXPONENT POSITIVE. MULTIPLIES. CONSTANT '10' MULTIPLY CONSTANT INTO FPACC2. MULTIPLY FPACC1 FPACC2, RESULT FPACC1. DECREMENT POWER EXPONENT. CHECK WE'RE DONE. DE-ALLOCATE LOCALS. RESTORE FPACC2. POINTER TERMINATING CHARACTER STRING. RETURN WITH NUMBER FPACC1.
PULFPAC2
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Freescale Semiconductor, Inc. Application Note
0303 0304 0305 0306 0307 0308 0309 0310 0311 0312 0313 0314 0315 0316 0317 0318 0319 0320 0321 0322 0323 0324 0325 0326 0327 0328 0329 0330 0331 0332 0333 0334 0335 0336 0337 0338 0339 0340 0341 0342 0343 0344 0345 0346 0347 0348 0349 0350 0351 0352 0353 0354 0355 0356 0357 0358 0359 0360 0361 0362 0363 0364 0365 0366 C155 C155 C157 C159 C15B C15D C15E C15F C160 C161 C161 C164 C166 C168 C16B C16D C16F C172 C174 C175 C178 C17A C17C C17D C17E C17F C180 C180 C181 C182 C184 C186 C188 C189 C18A NUMERIC CMPA CMPA LSLD PSHB PSHA PULA PULB NUMERIC1 NUMERIC1
NUMERIC1 FPNORM
LESS THAN ASCII YES. NUMERIC. GREATER THAN ASCII YES. NUMERIC. NUMERIC. CARRY. RETURN. NON-NUMERIC CHARACTER. CLEAR CARRY. RETURN.
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FPNORM1 FPNORM2
#FPACC1EX CHCK0 FPNORM3 FPACC1MN FPNORM3 FPACC1MN+1 FPACC1EX FPNORM4 FPACC1MN FPNORM2 FPACC1MN+1
FPNORM3 FPNORM4 CHCK0
POINT FPACC1. CHECK IT'S YES. JUST RETURN. NUMBER ALREADY NORMALIZED? YES. JUST RETURN. LOWER BITS MANTISSA. DECREMENT EXPONENT EACH SHIFT. EXPONENT WENT UNDERFLOW. SHIFT LOWER BITS. ROTATE UPPER BITS. NUMER NORMALIZED? KEEP SHIFTING LEFT. LOWER BITS BACK INTO FPACC1. SHOW ERRORS. YES. RETURN. FLAG ERROR. RETURN. CHECKS ZERO FPACC POINTED SAVE FPACC EXPONENT HIGH BITS. ZERO. RETURN. CHECK LOWER BITS. RESTORE RETURN WITH SET.
CHCK01
CHCK01
C18B CONSTP1 C18F CONST10
$7D,$4C,$CC,$CD $84,$20,$00,$00
DECIMAL 10.0 DECIMAL
C193 C193 C196 C199 C19C C19E C1A1 C1A4 C1A6
FLTMUL FPMULT: FLOATING POINT MULTIPLY This floating point multiply routine multiplies "FPACC1" "FPAAC2" places result FPACC1. FPACC2 remains unchanged. WORSE CASE 2319 CYCLES 1159 2MHz FLTMUL PSHFPAC2 SAVE FPACC2. #FPACC1EX POINT FPACC1. CHCK0 CHECK FPACC1 ZERO. FPMULT3 ANSWER #FPACC2EX POINT FPACC2. CHCK0 FPMULT4 CONTINUE. CLRA CLEAR
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Application Note Floating-Point Conversion Routines
0367 0368 0369 0370 0371 0372 0373 0374 0375 0376 0377 0378 0379 0380 0381 0382 0383 0384 0385 0386 0387 0388 0389 0390 0391 0392 0393 0394 0395 0396 0397 0398 0399 0400 0401 0402 0403 0404 0405 0406 0407 0408 0409 0410 0411 0412 0413 0414 0415 0416 0417 0418 0419 0420 0421 0422 0423 0424 0425 0426 0427 0428 0429 0430
Freescale Semiconductor, Inc.
C1A7 C1A8 C1AA C1AC C1AE C1B0 C1B2 C1B4 C1B6 C1B8 C1BA C1BC C1BE C1BF C1C1 C1C3 C1C5 C1C6 C1C8 C1CA C1CC C1CF C1D2 C1D4 C1D5 C1D8
FPMULT4
FPMULT5
FPMULT1
FPMULT2
FPMULT3
FPMULT6 UMULT
CLRB LDAA EORA STAA LDAA ADDA LDAA LDAA ADDA STAA
FPACC1EX FPACC1MN+1 FPMULT3 MANTSGN1 MANTSGN2 MANTSGN1 FPACC1EX FPACC2EX FPMULT1 FPMULT2 #OVFERR FPMULT6 FPMULT2 #UNFERR FPMULT6 #$80 FPACC1EX UMULT FPACC1EX FPMULT5 PULFPAC2
MAKE FPACC1 RETURN. FPACC1 EXPONENT. SIGN RESULT. SAVE SIGN RESULT. FPACC1 EXPONENT. FPACC2 EXPONENT. RESULT MINUS CARRY THEN: OVERFLOW ERROR. ERROR FLAG. RETURN. RESULT PLUS CARRY THEN ELSE UNDERFLOW ERROR OCCURRED. FLAG ERROR. RETURN. BIAS BACK THAT LOST. SAVE EXPONENT. MULTIPLY "INTEGER" MANTISSAS. THERE OVERFLOW ERROR FROM ROUNDING? YES. RETURN ERROR. SHOW ERRORS. RESTORE FPACC2.
C1D9 C1D9 C1DC C1DD C1DE C1DF C1E1 C1E3 C1E5 C1E6 C1E8 C1EA C1EC C1EE C1F0 C1F2 C1F4 C1F6 C1F8 C1FA C1FD C200 C203 C205 C207 C209 C208 C20E C210 C212 C214 C217 C21A C21C C21E C221
UMULT1
UMULT2
UMULT3
PSHX PSHX LDAA STAA LDAA LSRA ADDD LDAA ADCA STAA ADDD
CREATE PARTIAL PRODUCT REGISTER COUNTER. POINT VARIABLES. COUNT NUMBER BITS. L.S. BYTE MULTIPLIER. L.S. CARRY. CARRY CLEAR, DON'T MULTIPLICAND P.P. MULTIPLICAND L.S. BITS. PARTIAL PRODUCT. SAVE P.P. UPPER BITS MULTIPLICAND. CARRY P.P. SAVE PARTIAL PRODUCT. ROTATE PARTIAL PRODUCT RIGHT.
FPACC2MN+2 UMULT2 FPACC1MN+1 FPACC1MN FPACC2MN FPACC2MN+1 FPACC2MN+2 UMULT1 UMULT3 FPACC2MN FPACC1EX FPACC2MN UMULT4
SHIFT MULTIPLIER RIGHT BIT.
DONE YET? KEEP GOING. DOES PARTIAL PRODUCT NEED NORMALIZED? ANSWER RETURN. THAT SHIFTED P.P. REGISTER. BACK INTO PARTIAL PRODUCT.
EXPONENT. NEED ROUND PARTIAL PRODUCT? JUST RETURN. YES. LEAST SIGNIFICANT BITS. SAVE RESULT.
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Freescale Semiconductor, Inc. Application Note
0431 0432 0433 0434 0435 0436 0437 0438 0439 0440 0441 0442 0443 0444 0445 0446 0447 0448 0449 0450 0451 0452 0453 0454 0455 0456 0457 0458 0459 0460 0461 0462 0463 0464 0465 0466 0467 0468 0469 0470 0471 0472 0473 0474 0475 0476 0477 0478 0479 0480 0481 0482 0483 0484 0485 0486 0487 0488 0489 0490 0491 0492 0493 C223 C225 C227 C229 C22B C22D C22F C231 C234 C235 C236 C238 C239 C23B LDAA PROPIGATE THROUGH. ADCA STAA UMULT4 CARRY CLEAR OVERFLOW. ROTATE CARRY INTO P.P. FPACC1EX EXPONENT. UMULT4 TAKE COUNTER STACK. PULX M.S. BITS PARTIAL PRODUCT. FPACC1MN FPACC1. PULA L.S. BITS PARTIAL PRODUCT. STAA FPACC1MN+2 FPACC1. RETURN. FLTADD FLOATING POINT ADDITION This subroutine performs floating point addition numbers FPACC1 FPACC2. result addition placed FPACC1 while FPACC2 remains unchanged. This subroutine performs full signed addition either number same opposite sign. WORSE CASE 1030 CYCLES FLTADD PSHFPAC2 SAVE FPACC2. #FPACC2EX POINT FPACC2. CHCK0 ZERO? FLTADD1 CHECK FPACC1. FLTADD6 ERRORS. FLTADD10 PULFPAC2 RESTORE FPACC2. ANSWER FPACC1. RETURN. FLTADD1 #FPACC1EX POINT FPACC1. CHCK0 ZERO? FLTADD2 NUMBER. FLTADD4 FPACC2EX ANSWER FPACC2. MOVE INTO FPACC1. FPACC1EX FPACC2MN+1 MOVE LOWER BITS MANTISSA. FPACC1MN+1 LDAA MANTSGN2 MOVE FPACC2 MANTISSA SIGN INTO FPACC1. STAA MANTSGN1 FLTADD6 RETURN. FLTADD2 LDAA FPACC1EX FPACC1 EXPONENT. CMPA FPACC2EX EXPONENTS SAME? FLTADD7 YES. MANTISSA'S. SUBA FPACC2EX FPACC1EX-FPACC2EX. FPACC1 FPACC2? FLTADD3 YES. CHECK RANGE. NEGA FPACC1 FPAAC2. MAKE DIFFERENCE POSITIVE. CMPA NUMBERS WITHIN RANGE? FLTADD4 FPACC2 LARGER. MOVE INTO FPACC1. DIFFERENCE ADDB FPACC1EX CORRECT FPACC1 EXPONENT. STAB FPACC1EX SAVE RESULT. #FPACC1MN POINT FPACC1 MANTISSA. FLTADD5 DENORMALIZE FPACC1 ADD.
Freescale Semiconductor, Inc.
C23C C23C C23F C242 C245 C247 C248 C24B C24C C24F C252 C254 C256 C258 C25A C25C C25E C260 C262 C264 C266 C268 C26A C26C C26D C26F C271 C272 C274 C276 C279
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Application Note Floating-Point Conversion Routines
0494 0495 0496 0497 0498 0499 0500 0501 0502 0503 0504 0505 0506 0507 0508 0509 0510 0511 0512 0513 0514 0515 0516 0517 0518 0519 0520 0521 0522 0523 0524 0525 0526 0527 0528 0529 0530 0531 0532 0533 0534 0535 0536 0537 0538 0539 0540 0541 0542 0543 0544 0545 0546 0547 0548 0549 0550 0551 0552 0553 0554 0555 0556 0557
C27B C27D C27F C282 C284 C286 C288 C289 C28B C28D C28F C291 C294 C296 C298 C299 C29B C29D C29E C2A0 C2A2 C2A3 C2A5 C2A7 C2A8 C2AA C2AC C2AE C2B0 C2B2 C2B4 C2B6 C2B8 C2BA C2BB C2BC C2BE C2BF C2C0 C2C3 C2C5 C2C6 C2C8 C2CA C2CC C2CE C2D1 C2D3 C2D5 C2D6 C2D9 C2DC C2DE C2E0 C2E2 C2E4 C2E6 C2E8 C2EA C2ED C2F0 C2F3 C2F6
FLTADD3
FLTADD5
FLTADD7
FLTADD8
FLTADD9
FLTADD12 FLTADD11
CMPA DECA LDAA CMPA PSHX PULX PSHX PULX SUBD LDAA SBCA STAA LDAA COMA PSHA COMB COMA ADDD PULA ADCA STAA LDAA STAA LDAA ADDD LDAA ADCA STAA
FLTADD6 #FPACC2MN FLTADD5 MANTSGN1 MANTSGN2 FLTADD11 MANTSGN1 FLTADD8 FPACC2MN FPACC1MN FPACC2MN FPACC1MN FPACC2MN+2 FPACC1MN+2 FPACC2MN+2 FPACC1MN+2 FPACC1MN+1 FPACC2MN+1 FPACC1MN+1 FPACC1MN FPACC2MN FPACC1MN FLTADD9 FPACC1MN
Freescale Semiconductor, Inc.
FPACC1 FPACC2. NUMBERS WITHIN RANGE? ANSWER ALREADY FPACC1. JUST RETURN. POINT MANTISSA DENORMALIZE. SHIFT FIRST BYTE MANTISSA. SECOND. THIRD. DONE YET? KEEP SHIFTING. FPACC1 MANTISSA SIGN. SIGNS SAME? YES. JUST MANTISSAS. FPACC1 NEGATIVE NUMBER? FPACC1-FPACC2. YES. EXCHANGE FPACC1 FPACC2 BEFORE SUB. SAVE PART FPACC1. FPACC2. SAVED PORTION FPACC2. FPACC1. LOWER BITS SIGN FPACC2. SAVE LOWER BITS SIGN FPACC1. FPACC2. SAVED PART FPACC2. FPACC1. LOWER BITS FPACC2. SUBTRACT LOWER BITS FPACC2. SAVE RESULT. HIGH BITS FPACC1 MANTISSA. SUBTRACT HIGH BITS FPACC2. SAVE RESULT. RESULT NEGATIVE? NORMALIZE RESULT. YES. NEGATE MANTISSA. SAVE RESULT. LOWER BITS. FORM ONE'S COMPLEMENT. FORM TWO'S COMPLEMENT. SAVE RESULT. UPPER BITS BACK. POSSIBLE CARRY. SAVE RESULT. SHOW THAT FPACC1 NEGATIVE. NORMALIZE RESULT. EVERYTHING'S RETURN. UNDERFLOW OCCURED DURING NORMALIZATION. FLAG ERROR. RETURN. CAN'T BRANCH THAT FROM HERE. LOWER BITS FPACC1. LOWER BITS FPACC2. SAVE RESULT FPACC1. UPPER BITS FPACC1. (WITH CARRY) UPPER BITS FPACC2. SAVE RESULT. OVERFLOW JUST RETURN. CARRY INTO MANTISSA. PROPIGATE THROUGH MANTISSA. MANTISSA EVERYTHING'S JUST RETURN.
FPACC1MN+1
FPACC1MN+1 FPACC1MN #$FF MANTSGN1 FPNORM FLTADD12 #UNFERR FLTADD10 FLTADD6 FPACC1MN+1 FPACC2MN+1 FPACC1MN+1 FPACC1MN FPACC2MN FPACC1MN FLTADD12 FPACC1MN FPACC1MN+1 FPACC1MN+2 FPACC1EX FLTADD12
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Freescale Semiconductor, Inc. Application Note
0558 0559 0560 0561 0562 0563 0564 0565 0566 0567 0568 0569 0570 0571 0572 0573 0574 0575 0576 0577 0578 0579 0580 0581 0582 0583 0584 0585 0586 0587 0588 0589 0590 0591 0592 0593 0594 0595 0596 0597 0598 0599 0600 0601 0602 0603 0604 0605 0606 0607 0608 0609 0610 0611 0612 0613 0614 0615 0616 0617 0618 0619 C2F8 C2FA C2FB FLTSUB FLOATING POINT SUBTRACT SUBROUTINE This subroutine performs floating point subtraction (FPACC1-FPACC2) inverting sign FPACC2 then calling FLTADD since FLTADD performs complete signed addition. Upon returning from FLTADD sign FPACC2 again inverted leave unchanged from original value. WORSE CASE 1062 CYCLES FLTSUB FLTSUB1 INVERT SIGN. FLTADD FLOATING POINT ADD. FLTSUB1 LDAA MANTSGN2 FPACC2 MANTISSA SIGN. EORA #$FF INVERT SIGN. STAA MANTSGN2 BACK. RETURN. FLTSUB FLOATING POINT DIVIDE This subroutine performs signed floating point divide. operation performed FPACC1/FPACC2. divisor (FPACC2) left unaltered answer placed FPACC1. There several error conditions that returned this routine. They are: division zero. overflow. underflow. with other routines, error indicated carry being error code being A-reg. WORSE CASE 2911 CYCLES 1455 FLTDIV #FPACC2EX POINT FPACC2. CHCK0 DIVISOR FLTDIV1 DIVIDEND ZERO. LDAA #DIV0ERR YES. RETURN DIVIDE ZERO ERROR. FLAG ERROR. RETURN. FLTDIV1 #FPACC1EX POINT FPACC1. CHCK0 DIVIDEND FLTDIV2 PERFORM DIVIDE. YES. ANSWER ZERO. ERRORS. RETURN. LDAA #OVFERR FLTADD10 RESULT LARGE. OVERFLOW. FLAG ERROR. RETURN.
Freescale Semiconductor, Inc.
C2FE C2FE C300 C303 C305 C307 C309
C30A C30A C30D C310 C312 C314 C315 C316 C319 C31C C31E C31F
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Application Note Floating-Point Conversion Routines
0620 0621 0622 0623 0624 0625 0626 0627 0628 0629 0630 0631 0632 0633 0634 0635 0636 0637 0638 0639 0640 0641 0642 0643 0644 0645 0646 0647 0648 0649 0650 0651 0652 0653 0654 0655 0656 0657 0658 0659 0660 0661 0662 0663 0664 0665 0666 0667 0668 0669 0670 0671 0672 0673 0674 0675 0676 0677 0678 0679 0680 0681 0682 0683
Freescale Semiconductor, Inc.
C320 C323 C325 C327 C329 C32C C32D C32E C32F C331 C332 C333 C335 C338 C33A C33C C33E C340 C343 C345 C347 C348 C349 C34A C34B C34C C34F C350 C352 C354 C356 C358 C35A C35C C35E C361 C364 C367 C369 C368 C36C C36D C36F C371 C373 C375 C377 C379 C37B C37D C37F C381 C383 C385 C387 C389 C38B C38D C38F C391 C393 C395 C397
FLTDIV2
FLTDIV3 FLTDIV8 FLATDIV6
LDAA EORA STAA PSHX PSHX PSHX LDAA PSHA LDAA CMPA LDAA PULX PULX PULX SUBD LDAA SBCA STAA LDAA LDAB NEGB LDAA ADDA STAA LDAA STAA SUBD LDAA SBCA STAA LDAA STAA
PSHFPAC2 MANTSGN2 MANTSGN1 MANTSGN1
SAVE FPACC2. FPACC2 MANTISSA SIGN. SIGN RESULT. SAVE RESULT. WORK SPACE STACK.
LOOP COUNT STACK. POINTER WORK SPACE. COMPARE FPACC1 FPACC2 MANTISSAS. UPPER BITS SAME? YES. COMPARE LOWER BITS. FPACC2 MANTISSA FPACC1 MANTISSA? EXPONENT KEEP NUMBER SAME. OVERFLOW OCCUR? SHIFT MANTISSA RIGHT BIT. YES. ERROR CODE. FLAG ERROR. REMOVE WORKSPACE FROM STACK.
FPACC1MN FPACC2MN FLTDIV3 FPACC1MN+2 FPACC2MN+2 FLTDIV4 FPACC2EX FLTDIV14 #OVFERR
FLTDIV4
PULFPAC2 FPACC1MN+1 FPACC2MN+1 FPACC1MN+1 FPACC1MN FPACC2MN FPACC1MN FPACC2MN FPACC2MN+1 FPACC2MN+2 FPACC1EX FPACC2EX
RESTORE FPACC2. RETURN. INITIAL SUBTRACT DIVIDEND MANTISSA GREATER THAN DIVISOR MANTISSA.
FLTDIV14
SUBTRACT FROM LOOP COUNT. SHIFT DIVISOR RIGHT
FPACC1 EXPONENT. FPACC2 EXPONENT. TWO'S COMPLEMENT FLAGS PROPERLY. RESULT MINUS CHECK CARRY POSS. OVERFLOW. PLUS CARRY NOT, UNDERFLOW ERROR. RETURN WITH ERROR. MINUS CARRY OVERFLOW ERROR. BACK BIAS+1 COMPENSATES ALGOR.) SAVE RESULT. SAVE DIVIDEND CASE SUBTRACTION DOESN'T
FLTDIV5 FLTDIV7 FLTDIV9
FLTDIV5 FLTDIV7 #UNFERR FLTDIV6 FLTDIV8 #$81 FPACC1EX FPACC1MN FPACC1MN+2 FPACC1MN+1 FPACC2MN+1 FPACC1MN+1 FPACC1MN FPACC2MN FPACC1MN FLTDIV10 FPACC1MN FPACC1MN+2
LOWER BITS SUBTRACTION. SAVE RESULT. HIGH BITS.
SUBTRACTION WENT SHIFTS. RESTORE DIVIDEND.
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Freescale Semiconductor, Inc. Application Note
0684 0685 0686 0687 0688 0689 0690 0691 0692 0693 0694 0695 0696 0697 0698 0699 0700 0701 0702 0703 0704 0705 0706 0707 0708 0709 0710 0711 0712 0713 0714 0715 0716 0717 0718 0719 0720 0721 0722 0723 0724 0725 0726 0727 0728 0729 0730 0731 0732 0733 0734 0735 0736 0737 0738 0739 0740 0741 0742 0743 0744 0745 0746 0747 C399 C39B C39D C39F C3A2 C3A5 C3A8 C3AA C3AC C3AE C3B0 C3B2 C3B4 C3B6 C3B8 C3BA C3BC C3BE C3BF C3C1 C3C4 C3C6 C3C8 C3CA C3CC C3C3 C3D1 C3D4 C3D7 C3D8 FLTDIV10 SUBD LDAA SBCA ADDD LDAA ADCA STAA FPACC1MN+2 FPACC1MN+1 FPACC1MN FLTDIV9 FPACC1MN+1 FPACC2MN+1 FPACC1MN FPACC2MN FLTDIV11 FLTDIV13 FPACC1MN+1 FPACC1MN FLTDIV12 FPACC1MN FPACC1MN+1 FPACC1MN+2 FLTDIV6 ROTATE CARRY INTO QUOTIENT.
SHIFT DIVIDEND LEFT NEXT SUBTRACT.
DONE YET? KEEP GOING. RESULT MUST COMPLEMENTED.
MORE SUBTRACT ROUNDING. DON'T NEED SAVE RESULT. NEED SAVE RESULT. BITS. DIDN'T RESULT CLEAR CARRY. SAVE NUMBER. ROUND FPACC1. HIGH BITS. SAVE RESULT. CARRY CLEAR ANSWER OVERFLOW. ROTATE CARRY
Freescale Semiconductor, Inc.
FLTDIV11 FLTDIV13
FLTDIV12
ERRORS. RETURN.
C3DB C3DB C3DC C3DF C3E2 C3E4 C3E5 C3E8 C3EA C3EB C3ED C3EE C3F0 C3F1 C3F3
FLTSUB FLOATING POINT ASCII CONVERSION SUBROUTINE This subroutine performs floating point ASCII conversion number FPACC1. ASCII string placed buffer pointed index register. buffer must least bytes long contain ASCII conversion. resulting ASCII string terminated zero byte. Upon exit index register will pointing first character string. FPACC1 FPACC2 will remain unchanged. FLTASC PSHX SAVE POINTER STRING BUFFER. #FPACC1EX POINT FPACC1. CHCK0 FPACC1 FLTASC1 CONVERT NUMBER. PULX RESTORE POINTER. #$3000 ASCII CHARACTER TERMINATING BYTE. BUFFER. RETURN. FLTASC1 FPACC1EX SAVE FPACC1. PSHX FPACC1MN+1 PSHX LDAA MANTSGN1 PSHA
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Application Note Floating-Point Conversion Routines
0748 0749 0750 0751 0752 0753 0754 0755 0756 0757 0758 0759 0760 0761 0762 0763 0764 0765 0766 0767 0768 0769 0770 0771 0772 0773 0774 0775 0776 0777 0778 0779 0780 0781 0782 0783 0784 0785 0786 0787 0788 0789 0790 0791 0792 0793 0794 0795 0796 0797 0798 0799 0800 0801 0802 0803 0804 0805 0806 0807 0808 0809 0810 0811
Freescale Semiconductor, Inc.
C3F4 C3F7 C3FA C3FB C3FC C3FD C3FF C402 C404 C407 C409 C40C C40E C410 C411 C414 C417 C41A C41D C41F C422 C425 C428 C42A C42D C430 C433 C436 C438 C43B C43E C440 C443 C446 C449 C44B C44D C44E C450 C452 C455 C458 C45B C45C C45E C460 C463 C466 C468 C46A C46C C46E C46F C472 C474 C476 C479 C47C C47E C480 C483 C485
FLTASC2
FLTASC5
FLTASC6
FLTASC3
FLTASC4
FLTASC7
FLTASC17
PSHX PSHX PSHX LDAA LDAA STAA LDAB SUBB NEGB ADDB DECB LDAA STAA LDAA ADDA CMPA DECA STAA
PSHFPAC2
SAVE FPACC2. ALLOCATE LOCALS. SAVE SPACE STRING BUFFER POINTER. POINT LOCALS. POINTER FROM STACK. SPACE BUFFER NUMBER NEGATIVE. NEGATIVE? SPACE. MAKE NUMBER POSITIVE REST CONVERSION. YES. MINUS SIGN BUFFER. POINT NEXT LOCATION. SAVE POINTER. POINT CONSTANT 9999999. INTO FPACC2. COMPARE NUMBERS. FPACC1 9999999? YES. DIVIDE FPACC1 POINT CONTACT 999999.9 MOVE INTO FPACC2. COMPARE NUMBERS. FPACC1 999999.9? YES. CONTINUE CONVERSION. DECREMENT MULT./DIV. COUNT. MULTIPLY POINT CONSTANT. MOVE INTO FPACC2. COMPARE AGAIN. INCREMENT MULT./DIV. COUNT. POINT CONSTANT ".1". DIVIDE FPACC1 POINT CONSTANT ".5". MOVE INTO FPACC2. NUMBER FPACC1 ROUND FPACC1 EXPONENT. TAKE BIAS MAKE NEGATIVE. NUMBER MANTISSA BITS CHECK NEED SHIFT ALL. SHIFT MANTISSA RIGHT RESULT (MAKE NUMBER INTEGER). DONE SHIFTING? KEEP GOING. INITIAL VALUE "DIGITS AFTER D.P." COUNT. INITIALIZE DECIMAL EXPONENT. NUMBER DECIMAL EXPONENT. ORIGINAL NUMBER 9999999? YES. MUST REPRESENTED SCIENTIFIC NOTATION. original number YES. MUST REPRESENTED SCIENTIFIC NOTATION. NUMBER REPRESENTED DIGITS. MAKE DECIMAL EXPONENT DIGIT COUNT BEFORE DECIMAL POINT. SETUP ZERO DECIMAL EXPONENT. SUBTRACT FROM DECIMAL EXPONENT. SAVE DECIMAL EXPONENT. DOES NUMBER HAVE ITNEGER PART? (EXP. YES. OUT.9 DECIMAL POINT. POINTER BUFFER. DECIMAL POINT BUFFER. POINT NEXT BUFFER LOCATION.
15,Y #$20 MANTSGN1 FLTASC2 MANTSGN1 #'0,X #N9999999 GETFPAC2 FLTCMP FLTASC3 #P9999999 GETFPAC2 FLTCMP FLTASC4 #CONST10 GETFPAC2 FLTMUL FLATASC5 #CONSTP1 FLTASC6 #CONSTP5 GETFPAC2 FLTADD FPACC1EX #$81 FLTASC17 FPACC1MN FPACC1MN+1 FPACC1MN+2 FLTASC7 FLTASC8 FLTASC8 FLTASC9
FLATASC8 LDAA SUBA STAA LDAA STAA
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Freescale Semiconductor, Inc. Application Note
0812 0813 0814 0815 0816 0817 0818 0819 0820 0821 0822 0823 0824 0825 0826 0827 0828 0829 0830 0831 0832 0833 0834 0835 0836 0837 0838 0839 0840 0841 0842 0843 0844 0845 0846 0847 0848 0849 0850 0851 0852 0853 0854 0855 0856 0857 0858 0859 0860 0861 0862 0863 0864 0865 0866 0867 0868 0869 0870 0871 0872 C486 C489 C48B C48D C48F C490 C493 C496 C498 C49B C49E C4A0 C4A2 C4A4 C4A6 C4A8 C4AA C4AC C4AF C4B1 C4B3 C4B5 C4B7 C4B9 C4BB C4BD C4C0 C4C2 C4C3 C4C6 C4C8 C4C9 C4CC C4CE C4D0 C4D2 C4D3 C4D6 C4D7 C4D8 C4D9 C4DA C4DD C4DF C4E2 C4E3 C4E5 C4E7 C4E9 C4EA C4ED C4EF C4F1 C4F3 C4F4 C4F6 C4F8 C4F9 C4FB C4FC C4FE FLTASC18 FLTASC9 LDAA STAA LDAA STAA SUBD LDAA SBCA STAA ADDD LDAA ADCA STAA LDAA ADDA PSHX STAA LDAA STAA PULX LDAA CMPA LDAB LDAA STAA LDAA STAA TSTB NEGB LDAA STAA FLTASC18 #DECDIG FPACC1MN+1 FPACC1MN+1 FPACC1MN FPACC1MN FLTASC12 FLTASC11 FPACC1MN+1 FPACC1MN+1 FPACC1MN FPACC1MN #$30 FLTASC16 DIGIT COUNT TILL EXPONENT NUMBER YES. FORMAT NUMBER .0XXXXXX BUFFER. POINT NEXT LOCATION. SAVE POINTER VALUE. POINT TABLE DECIMAL DIGITS. INITIALIZE NUMBER DIGITS COUNT. CLEAR DECIMAL DIGIT ACCUMULATOR. LOWER BITS MANTISSA. SUBTRACT LOWER BITS CONSTANT. SAVE RESULT. UPPER BITS. SUBTRACT UPPER BITS. SAVE RESULT. UNDERFLOW? YES. DECIMAL NUMBER BACK DECIMAL NUMBER. ANOTHER SUBTRACTION. FPACC1 MANTISSA BITS. BITS BACK SAVE RESULT. HIGH BITS. HIGH BITS CONTSANT. SAVE RESULT. DIGIT. MAKE ASCII. SAVE POINTER CONSTANTS. POINTER BUFFER. DIGIT BUFFER. POINT NEXT BUFFER LOCATION. SHOULD DECIMAL POINT BUFFER YET? CONTINUE CONVERSION. YES. DECIMAL POINT. BUFFER. POINT NEXT BUFFER LOCATION. SAVE UPDATED POINTER. RESTORE POINTER CONSTANTS. POINT NEXT CONSTANT.
FLTASC10 FLTASC11
Freescale Semiconductor, Inc.
FLTASC12
FLTASC16
FLTASC13
FLTASC10 #$30 FLTASC13 FLTASC15 FLTASC14 #'0,X
DONE YET? CONTINUE CONVGERSION "MANTISSA". YES. POINT BUFFER STRING BUFFER. POINT LAST CHARACTER BUFFER. ASCII YES. REMOVE TRAILING ZEROS. POINT NEXT AVAILABLE LOCATION BUFFER. NEED EXPONENT? WE'RE DONE. YES. BUFFER. POINT NEXT BUFFER LOCATION. ASSUME EXPONENT POSITIVE. PLUS SIGN BUFFER. REALLY MINUS? IT'S YES. MAKE POSITIVE. MINUS SIGN BUFFER.
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Application Note Floating-Point Conversion Routines
0873 0874 0875 0876 0877 0878 0879 0880 0881 0882 0883 0884 0885 0886 0887 0888 0889 0890 0891 0892 0893 0894 0895 0896 0897 0898 0899 0900 0901 0902 0903 0904 0905 0906 0907 0908 0909 0910 0911 0912 0913 0914 0915 0916 0917 0918 0919 0920 0921 0922 0923 0924 0925 0926 0927 0928 0929 0930 0931 0932 0933
Freescale Semiconductor, Inc.
C500 C501 C504 C505 C508 C509 C50A C50B C50D C510 C512 C513 C514 C516 C518 C519 C51B C51C C51D C51E C521 C522 C524 C525 C527 C528 C52A C52B
FLTASC14
FLTASC15
CLRA IDIV PSHB XGDX ADDB STAB PULB ADDB STAB PULX PULX PULX PULA STAA PULX PULX PULX
POINT NEXT BUFFER LOCATION. SAVE POINTER STRING BUFFER. DIVIDE. DIVIDE DECIMAL EXPONENT SAVE REMAINDER. QUOTIENT MAKE ASCII. POINTER. NUMBER BUFFER. POINT NEXT LOCATION. SECOND DIGIT. MAKE ASCII. BUFFER. POINT NEXT LOCATION. TERMINATE STRING WITH ZERO BYTE. CLEAR LOCALS FROM STACK.
#$30
#$30
PULFPAC2 MANTSGN1
RESTORE FPACC2.
RESTORE FPACC1. FPACC1MN+1 FPACC1EX POINT START ASCII STRING. RETURN.
C52C C52C C52F C532 C535 C538 C53B C53E
DECDIG P9999999
$0F,$42,$40 $01,$86,$A0 $00,$27,$10 $00,$03,$E8 $00,$00,$64 $00,$00,$0A $00,$00,$01
DECIMAL 1,000,000 DECIMAL 100,000 DECIMAL 10,000 DECIMAL 1,000 DECIMAL DECIMAL DECIMAL
C541 C541
$94,$74,$23,$FE $98,$18,$96,$7F $80,$00,$00,$00
CONSTANT 999999.9
C545 N9999999 C545 C549 CONSTP5 C549 C54D FLTCMP C54D C550 C552 C555 C557 C559 C55C C55E C560 C563 FLTCMP1
CONSTANT 9999999.
CONSTANT
MANTSGN1 FLTCMP2 MANTSGN2 FLTCMP2 FPACC2EX FPACC1EX FLTCMP1 FPACC2MN+1 FPACC1MN+1
FPACC1 NEGATIVE? CONTINUE WITH COMPARE. FPACC2 NEGATIVE? CONTINUE WITH COMPARE. YES. BOTH NEGATIVE COMPARE MUST DONE. BACKWARDS. THEY EQUAL FAR? RETURN WITH CONDITION CODES SET. YES. COMPARE LOWER BITS MANTISSAS. RETURN WITH CONDITION CODES SET.
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Freescale Semiconductor, Inc. Application Note
0934 0935 0936 0937 0938 0939 0940 0941 0942 0943 0944 0945 0946 0947 0948 0949 0950 0951 0952 0953 0954 0955 0956 0957 0958 0959 0960 0961 0962 0963 0964 0965 0966 0967 0968 0969 0970 0971 0972 0973 0974 0975 0976 0977 0978 0979 0980 0981 0982 0983 0984 0985 0986 0987 0988 0989 0990 0991 0992 0993 0994 0995 0996 0997 C564 C556 C568 C56A C56C C56F C571 C573 C576 FLTCMP2 LDAA CMPA MANTSGN1 MANTSGN2 FLTCMP1 FPACC1EX FPACC2EX FLTCMP1 FPACC1MN+1 FPACC2MN+1 FPACC1 MANTISSA SIGN. BOTH POSITIVE? RETURN WITH CONDITION CODES SET. FPACC1 EXPONENT UPPER BITS MANTISSA. SAME FPACC2? RETURN WITH CONDITION CODES SET. FPACC1 LOWER BITS MANTISSA. COMPARE WITH FPACC2 LOWER BITS MANTISSA. RETURN WITH CONDITION CODES SET.
FLTSUB UNSIGNED INTEGER FLOATING POINT This subroutine performs "unsigned" integer floating point conversion word. integer must lower bits FPACC1 mantissa. resulting floating point number returned FPACC1. UINT2FLT #FPACC1EX POINT FPACC1. CHCK0 ALREADY UINTFLT1 CONVERT. YES. JUST RETURN. UINTFLT1 LDAA #$98 BIAS NUMBER BITS MANTISSA. STAA FPACC1EX INITIALIZE EXPONENT. FPNORM MAKE NORMALIZED FLOATING POINT VALUE. ERRORS. RETURN. SIGNED INTEGER FLOATING POINT This routine works just like unsigned integer floating point routine except that itneger FPACC1 mantissa considered two's complement format. This will return floating point number range -32768 +32767. SINT2FLT FPACC1MN+1 LOWER BITS FPACC1 MANTISSA. PSHA SAVE SIGN NUMBER. SINTFLT1 POSITIVE JUST CONVERT. COMA MAKE POSITIVE. COMB ADDD TWO'S COMPLEMENT. FPACC1MN+1 BACK FPACC1 MANTISSA. SINTFLT1 UINT2FLT CONVERT. PULA SIGN ORIGINAL INTEGER. LDAB #$FF "MINUS SIGN". TSTA NUMBER NEGATIVE? SINTFLT2 RETURN. STAB MANTSGN1 YES. FPACC1 SIGN BYTE.
Freescale Semiconductor, Inc.
C577 C577 C57A C57D C57F C580 C582 C584 C587 C588
C589 C589 C58B C58C C58E C58F C590 C593 C595 C597 C598 C59A C59B C59D
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Application Note Floating-Point Conversion Routines
0998 0999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058
C59F C5A0
SINTFLT2
ERRORS. RETURN.
C5A1 C5A1 C5A4 C5A7 C5A9 C5AB C5AD C5AF C5B2 C5B4 C5B6 C5B8 C5BA C5BD C5C0 C5C3 C5C4 C5C6 C5C9 C5CA C5CC C5CE C5D0 C5D2 C5D4 C5D5 C5D6 C5D9 C5DB C5DE C5DF C5E1 C5E2 C5E3 C5E6 C5E8 C5EA
FLTSUB FLOATING POINT INTEGER CONVERSION This subroutine will perform "unsigned" floating point interger conversion. floating point number positive, will converted unsigned integer 65535 number negative will converted twos complement integer. This type conversion will allow addresses represented positive numbers when floating point format. fractional number part disguarded. FLT2INT #FPACC1EX POINT FPACC1. CHCK0 FLT2INT3 YES. JUST RETURN. LDAB FPACC1EX FPACC1 EXPONENT. CMPB #$81 THERE INTEGER PART? FLT2INT2 FPACC1. MANTSGN1 NUMBER NEGATIVE? FLT2INT1 YES. CONVERT NEGATIVE NUMBER. CMPB #$90 NUMBER LARGE MADE INTEGER? FLT2INT4 YES. RETURN WITH ERROR. SUBB #$98 SUBTRACT BIAS PLUS NUMBER BITS. FLT2INT5 FPACC1MN MAKE NUMBER INTEGER. FPACC1MN+1 FPACC1MN+2 INCB DONE SHIFTING? FLT2INT5 KEEP GOING. FPACC1EX ZERO EXPONENT (ALSO CLEARS CARRY). FLT2INT1 CMPB #$8F NUMBER SMALL MADE INTEGER? FLT2INT4 YES. RETURN ERROR. SUBB #$98 SUBTRACT BIAS PLUS NUMBER BITS. FLT2INT5 SHIFT. FPACC1MN+1 RESULTING INTEGER. COMA MAKE NEGATIVE. COMB ADDD TWO'S COMPLEMENT. FPACC1MN+1 SAVE RESULT. MANTSGN1 CLEAR MANTISSA SIGN. (ALSO CLEARS CARRY) RETURN. FLT2INT4 LDAA #TOLGSMER NUMBER LARGE SMALL CONVERT INT. FLAG ERROR. RETURN. FLT2INT2 FPACC1EX ZERO FPACC1. FPACC1MN+1 (ALSO CLEARS CARRY) FLT2INT3 RETURN.
Freescale Semiconductor, Inc.
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Freescale Semiconductor, Inc. Application Note
1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 FLTSUB SQUARE ROOT SUBROUTINE This routine used calculate square root floating point number FPACC1. number FPACC1 negative error returned. WORSE CASE 16354 CYCLES 8177 FLTSQR #FPACC1EX POINT FPACC1. CHCK0 ZERO? FLTSQR1 CHECK NEGATIVE. YES. RETURN. FLTSQR1 MANTSGN1 NUMBER NEGATIVE? FLTSQR TAKE SQUARE ROOT. LDAA #NSQRTERR YES. ERROR. FLAG ERROR. RETURN. FLTSQR2 PSHFPAC2 SAVE FPACC2. LDAA ITERATION LOOP COUNT. PSHA SAVE STACK. FPACC1MN+1 SAVE INITIAL NUMBER. PSHX FPACC1EX PSHX POINT TFR1TO2 TRANSFER FPACC1 FPACC2. LDAa FPACC2EX FPACC1 EXPONENT. SUBA #$80 REMOVE BIAS FROM EXPONENT. INCA COMPENSATE EXPONENTS (GIVES CLOSER GUESS) FLTSQR3 NUMBER DIVIDE EXPONENT BIAS. LSRA JUST DIVIDE FLTSQR4 CALCULATE SQUARE ROOT. FLTSQR3 LSRA DIVIDE EXPONENT ADDA #$80 BIAS BACK FLTSQR4 STAA FPACC2EX SAVE EXPONENT FLTSQR5 FLTDIV DIVIDE ORIGINAL NUMBER GUESS. FLTADD "GUESS" QUOTIENT. FPACC1EX DIVIDE RESULT PRODUCE GUESS. TFR1TO2 GUESS INTO FPACC2. ORIGINAL NUMBER. FPACC1EX BACK FPACC1. MANTISSA LOWER BITS. FPACC1MN+1 BEEN THROUGH LOOP TIMES? FLTSQR5 KEEP GOING. FPACC2EX FINAL GUESS ANSWER. FPACC1EX FPACC1. FPACC2MN+1 FPACC1MN+1 PULX ORIGINAL NUMBER. PULX LOOP COUNT VARIABLE. PULFPAC2 RESTORE FPACC2. ERRORS.
C5EB C5EB C5EE C5F1 C5F3 C5F4 C5F7 C5F9 C5FB C5FC C5FD C600 C602 C603 C605 C606 C608 C609 C608 C60D C60F C611 C612 C614 C615 C617 C618 C61A C61C C61F C622 C625 C627 C62A C62C C62F C631 C634 C636 C638 C63A C63C C63E C63F C640 C641 C644 C645
Freescale Semiconductor, Inc.
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Application Note Floating-Point Conversion Routines
1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186
C646 C646 C648 C64A C64C C64E C650 C652
TFR1TO2
LDAA STAA
FPACC1EX FPACC2EX FPACC1MN+1 FPACC2MN+1 MANTSGN1 MANTSGN2
FPACC1 EXPONENT HIGH MANTISSA. FPACC2. FPACC1 BITS MANTISSA. FPACC2. TRANSFER SIGN. RETURN.
C653 C653 C653 C659 C65A C65B C65E C65F C662 C663 C665 C667 C66A C66B C66E
C66F C66F C672 C675 C676 C667 C67A C67B C67D C680 C681 C683 C685 C687 C689 C68C
FLTSIN FLOATING POINT SINE FLTSIN PSHFPAC2 SAVE FPACC2 STACK. ANGRED REDUCE ANGLE BETWEEN +/-PI. PSHB SAVE QUAD COUNT. PSHA SAVE SINE/COSINE FLAG. DEB2RAD CONVERT DEGREES RADIANS. PULA RESTORE SINE/COSINE FLAG. FLTSIN1 SINCOS SINE ANGLE. PULA RESTORE QUAD COUNT. CMPA ANGLE QUADS FLTSIN2 YES. SIGN ANSWER MANTSGN1 SINE QUADS NEGATIVE. FLTSIN2 SHOW ERRORS. PULFPAC2 RESTORE FPACC2 RETURN. FLTCOS FLOATING POINT COSINE FLTCOS PSHFPAC2 SAVE FPACC2 STACK. ANGRED REDUCE ANGLE BETWEEN +/-P1. PSHB SAVE QUAD COUNT. PSHA SAVE SINE/COSINE FLAG. DEG2RAD CONVERT RADIANS. PULA RESTORE SINE/COSINE FLAG. EORA #$01 COMPLIMENT 90'S COMPLIMENT FLAG COSINE. SINCOS COSINE ANGLE. PULA RESTORE QUAD COUNT. CMPA ORIGINAL ANGLE QUAD FLTCOS1 YES. SIGN CMPA QUAD FLTCOS1 YES. SIGN MANTSGN1 COSINE NEGATIVE QUADS FLTCOS1 FLTSIN2 FLAG ERRORS, RESTORE FPACC2, RETURN.
Freescale Semiconductor, Inc.
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Freescale Semiconductor, Inc. Application Note
1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 SINCOS FLOATING POINT SINE COSINE SUBROUTINE SINCOS PSHA SAVE SINE/COSINE FLAG STACK. FPACC1MN+1 SAVE VALUE ANGLE. PSHX FPACC1EX PSHX LDAA MANTSGN1 PSHA #SINFACT POINT FACTORIAL TABLE. PSHX SAVE POINTER SINE FACTORIAL TABLE. PSHX JUST ALLOCATE ANOTHER LOCAL (VALUE IMPORTANT) LDAA INITIAL LOOP COUNT. PSHA SAVE LOCAL STACK. POINT LOCALS. TFR1TO2 TRANSFER FPACC1 FPACC2. FLTMUL FPACC1. 10,Y DOING SINE? SINCOS7 YES. #COSFACT POINTER COSINE FACTORIAL TABLE. SAVE TFR1TO2 COPY INTO FPACC2. SINCOS4 GENERATE EVEN POWERS COSINE. SINCOS7 EXG1AND2 FPACC2 FPACC1. SINCOS1 FLTMUL CREATE X^3,5,7,9 X^2,4,6,8. SINCOS4 FPACC1MN+1 SAVE EACH STACK. PSHX FPACC1EX PSHX LDAA MANTSGN1 PSHA SAVE MANTISSA SIGN. HAVE GENERATED POWERS YET? SINCOS1 SOME MORE. LDAA LOOP COUNT. STAA POINT POWERS STACK. SINCOS2 SAVE POINTER. POINTER FACTORIAL CONSTANTS. GETFPAC2 NUMBER FPACC2. POINT NEXT CONSTANT. SAVE POINTER. POINTER POWERS. LDAA NUMBER SIGN. STAA MANTSGN1 FPACC1 MANTISSA SIGN. LOWER 16-BITS MANTISSA. FPACC1EX FPACC1 MANTISSA. HIGH BITS MANTISSA EXPONENT. FPACC1MN+1 FPACC1 EXPONENT MANTISSA. FLTMUL MULTIPLY TWO. POINTER POWERS BACK. FPACC1MN+1 SAVE RESULT WHERE POWER WAS. FPACC1EX
C68F C68F C690 C692 C693 C695 C696 C698 C699 C69C C69D C69E C6A0 C6A1 C6A3 C6A6 C6A9 C6AC C6AE C6B1 C6B4 C6B7 C6B9 C6BC C6BF C6C1 C6C2 C6C4 C6C5 C6C7 C6C8 C6CB C6CD C6CF C6D2 C6D3 C6D6 C6D9 C6DC C6DD C6DE C6DF C6E0 C6E3 C6E6 C6E8 C6EA C6EC C6EE C6F0 C6F2 C6F5 C6F8 C6FA C6FC C6FE
Freescale Semiconductor, Inc.
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Application Note Floating-Point Conversion Routines
1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314
Freescale Semiconductor, Inc.
C700 C702 C704 C705 C706 C707 C708 C709 C70C C70E C710 C713 C716 C717 C718 C719 C71A C71B C71E C720 C722 C724 C726 C728 C72A C72D C730 C732 C735 C737 C73A C73D C73F C742 C744 C747 C749 C74C C74E C751 C752 C753 C756 C757 C758
SINCOS3
SINCOS6 SINCOS5
LDAA STAA LDAA STAA LDAA STAA LDAA STAA XGDX ADDD XGDX
MANTSGN1
SAVE SIGN POINT NEXT POWER.
SINCOS2
DONE? ANOTHER MULTIPLICATION. LOOP COUNT. SAVE PINT RESULTS STACK. POINT PREVIOUS RESULT.
MANTSGN2 FPACC2EX FPACC2MN+1 FLTADD SINCOS3 10,Y SINCOS5 #ONE GETFPAC2 SINCOS6 MANTSGN2 FPACC2EX FPACC2MN+1 FLTADD
SAVE POINTER. NUMBERS SIGN. FPACC2. BITS MANTISSA FPACC2. HIGH EXPONENT. FPACC2. NUMBERS. DONE? NEXT TERM DOING SINE? YES. ORIGINAL ANGLE INTO FPACC2. COSINE CONSTANT INTO FPACC2. TERMS. VALUE ORIGINAL ANGLE. FPACC2.
CLEAN STACK CLEAR
TERMS. STACK. TERMS TEMPS STACK.
UPDATE STACK POINTER. RETURN.
C759 C759 C75A C75B C75C C75D C75F C762 C765 C768 C76A C76D C770 C773 C776 C778 C77B
ANGRED
ANGRED1 ANGRED2
CLRA PSHA INCA PSHA
INITIALIZE 45'S COMPLIMENT FLAG. STACK. INITIALIZE QUAD COUNT STACK. POINT POINT CONSTANT 360. INTO FPACC. INPUT ANGLE NEGATIVE: SKIP ADD. YEW. MAKE ANGLE POSITIVE ADDING DEG. MAKE CONSTANT FPACC2 DEGREES. ANGLE LESS THAN DEGREES ALREADY? YES. RETURN WITH QUAD COUNT. REDUCE ANGLE DEGREES. INCREMENT QUAD COUNT.
#THREE60 GETFPAC2 MANTSGN1 ANGRED1 FLTADD FPACC2EX FPACC2EX FLTCMP ANGRED3 FLTSUB
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Freescale Semiconductor, Inc. Application Note
1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 C77E C780 C783 C785 C787 C789 C78B C78D C78F C792 C795 C798 C79A C79D C79F C7A1 C7A4 C7A7 C7A8 C7A9 LDAA CMPA CMPA LDAA STAA LDAA STAA PULB PULA ANGRED2 ANGRED4 ANGRED4 #$FF MANTSGN1 FLTADD FPACC2EX FLTCMP ANGRED5 FPACC2EX #$FF MANTSGN1 FLTADD IT'S LESS THAN NOW. QUAD COUNT. ORIGINAL ANGLE QUAD YES. COMPUTE TRIG FUNCTION ORIGINAL ANGLE QUAD YES. COMPUTE TRIG FUNCTION QUAD MUST COMPUTE TRIG FUNCTION 90'S CXOMPLIMENT ANGLE. DEGREES NEGATED ANGLE. MAKE ANGLE FPACC2 DEGREES. ANGLE DEGREES? YES. IT'S MUST 90'S COMPLIMENT. MAKE FPACC1 NEGATIVE. 90'S COMPLIMENT. FLAG. QUAD COUNT. COMPLIMENT FLAG. RETURN WITH QUAD COUNT COMPLIMENT FLAG.
ANGRED3
ANGRED4
Freescale Semiconductor, Inc.
ANGRED
C7AA C7AA C7AC C7AE C7B0 C7B2 C7B4 C7B6 C7B8 C7BA C7BC C7BE C7C0 C7C2
EXG1AND2 SINFACT COSFACT
LDAA LDAB STAA STAB
FPACC1EX FPAAC2EX FPACC2EX FPACC1EX FPACC1MN+1 FPAAC2MN+1 FPACC2MN+1 FPACC1MN+1 MANTSGN1 MANTSGN2 MANTSGN2 MANTSGN1 RETURN.
C7C3 C7C3 C7C7 C7CB C7CF
$6E,$38,$EF,$1D $74,$D0,$0D,$01 $7A,$08,$88,$89 $7E,$AA,$AA,$AB
+(1/9!) -(1/7!) +(1/5!) -(1/3!)
C7D3 C7DE C7D7 C7DB C7DF
$71,$50,$0D,$01 $77,$B6,$08,$61 $7C,$2A,$AA,$AB $80,$80,$00,$00
+(1/8!) -(1/6!) +(1/4!) -(1/2!)
C7E3 C7E7 C7EB THREE60
$81,$00,$00,$00 $82,$49,$0F,$DB $89,$34,$00,$00
3.1415927 360.0
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Application Note Floating-Point Conversion Routines
1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435
FLTTAN FLOATING POINT TANGENT C7EF FLTTAN C7EF PSHFPAC2 SAVE FPACC2 STACK. C7F2 TFR1TO2 COPY ANGLE FPACC2. C7F5 FLTCOS COSINE ANGLE. C7F8 EXG1AND2 RESULT FPACC2 ANGLE FPACC1. C7FB FLTSIN ANGLE. C7FE FLTDIV TANGENT ANGLE DOING SIN/COS. C801 FLTTAN1 CARRY CLEAR, ANSWER C803 #MAXNUM TANGENT ATTEMPTED. LARGEST C806 GETFPAC1 NUMBER FPACC1. C809 LDAA #TAN90ERR ERROR CODE C80B FLTTAN1 PULFPAC2 RESTORE FPACC2. C80E RETURN. C80F MAXNUM C80F $FE,$7F,$FF,$FF LARGEST POSITIVE NUMBER HAVE. TRIGUTIL TRIG UTILITIES routines "DEG2RAD" "RAD2DEG" used convert angles from degrees-to-radians radians-to-degrees respectively. routine "GETPI" will place value into FPACC1. This routine should used value needed calculations since accurate full 24-bits mantissa. C813 DEG2RAD C813 PSHFPAC2 SAVE FPACC2. C816 #PIOV180 POINT CONVERSION CONSTANT PI/180. C819 DEG2RAD1 GETFPAC2 INTO FPACC2. C81C FLTMUL CXONVERT DEGREES RADIANS. C81F PULFPAC2 RESTORE FPACC2. C822 RETURN. (NOTE! DON'T REPLACE "JSR/RTS" WITH "JMP" WILL WORK.) C823 RAD2DEG C823 PSHFPAC2 SAVE FPACC2. C826 #C1800VPI PIONT CONVERSION CONSTANT 180/PI. C829 DEG2RAD1 CONVERSION RETURN. C82B GETPI C82B POINT CONSTANT "PI" C82E GETFPAC1 FPACC1 RETURN.
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Freescale Semiconductor, Inc. Application Note
1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 C831 PIOV180 C831 C835 C1800VPI C835 $7B,$0E,$FA,$35 $86,$65,$2E,$E1
Freescale Semiconductor, Inc.
C839 C839 C83A C83B C83C C83D C83E C83F C840
C843 C843 C844 C845 C846 C849 C84A C84B C84C C84D C84E
PSHPULFPAC2 following subroutines, PSHFPAC2 PULPFAC2, push FPACC2 onto pull FPACC2 hardware stack respectively. number stored "memory format". PSHFPAC2 PULX RETURN ADDRESS STACK. PSHX ALLOCATE FOUR BYTES STACK SPACE. PSHX XGDX RETURN ADDRESS POINT STORAGE AREA. PSHB RETURN ADDRESS BACK STACK. PSHA PUTFPAC2 FPACC2 STACK RETURN. PULFPAC2 POINT RETURN ADDRESS. POINT SAVED NUMBER. GETFPAC2 RESTORE FPACC2. PULX RETURN ADDRESS STACK. REMOVE NUMBER FROM STACK. RETURN.
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Application Note Floating-Point Conversion Routines
1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537
C850 C850 C852 C854 C857 C858 C85A C85D C85F C861 C863 C865
C866 C866 C868 C86A C86D C86E C870 C873 C875 C877 C879 C87B
GETFPAC GETFPACx SUBROUTINE GETFPAC1 GETFPAC2 subroutines floting point number stored memory into either FPACC1 FPACC2 format that expected floating point math routines. These routines easily replaced convert binary floating point format (i.e., IEEE format) format required math routines. "memory" format converted these routines shown below: 31_24 22_0 exponent mantissa exponent biased faiclitate floating point comaprisons. sign positive numbers negative numbers. mantissa stored hidden normalized format that bits precision obtained. Since normalized floating point number always most significant set, 24th hold mantissa sign. This allows bits precision mantissa store entire number just bytes. format required math routines uses seperate byte sign, therefore each floating point accumulator requires five bytes. GETFPAC2 EXPONENT HIGH BYTE MANTISSA, GETFP12 NUMBER ZERO, SKIP SETTING BIT. MANTSGN1 POSITIVE NUMBER. TSTB NUMBER NEGATIVE? GETFP11 LEAVE SIGN ALONE. MANTSGN1 YES. SIGN NEGATIVE. GETFP11 ORAB #$80 RESTORE MOST SIGNIFICANT MANTISSA. GETFP12 FPACC1EX FPACC1. 16-BITS MANTISSA. FPACC1MN+1 FPACC1. RETURN. GETFPAC2 EXPONENT HIGH BYTE MANTISSA GETFP22 NUMBER SKIP SETTING BIT. MATSGN2 POSITIVE NUMBER. TSTB NUMBER NEGATIVE? GETFP21 LEAVE SIGN ALONE. MANTSGN2 YES. SIGN NEGATIVE. GETFP21 ORAB #$80 RESTORE MOST SIGNIFICANT MANTISSA. GETFP22 FPACC2EX FPACC1. 16-BITS MANTISSA FPACC2MN+1 FPACC1. RETURN.
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Freescale Semiconductor, Inc. Application Note
1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 PUTFPAC PUTFPACx SUBROUTINE These subroutines perform opposite function GETFPAC1 GETFPAC2. Again, these routines used convert from internal format used floating point package "memory" format. GETFPAC1 GETFPAC2, documentation description "memory" format. PUTFPAC1 FPACC1EX FPACC1 EXPONENT UPPER BITS MANT. MANTSGN1 NUMBER NEGATIVE? PUTFP11 YES. LEAVE M.S. SET. ANDB #$7F CLEAR M.S. BIT. PUTFP11 SAVE MEMORY. FPACC1MN+1 L.S. BITS MANTISSA. PUTFPAC2 FPACC2EX FPACC1 EXPONENT UPPER BITS MANT. MANTSGN2 NUMBER NEGATIVE? PUTFP21 YES. LEAVE M.S. SET. ANDB #$7F CLEAR M.S. BIT. PUTFP21 SAVE MEMORY. FPACC2MN+1 L.S. BITS MANTISSA.
Freescale Semiconductor, Inc.
C87C C87C C87E C881 C883 C885 C887 C889 C88B
C88C C88C C88E C891 C893 C895 C897 C899 C89B
ADDNXTD ADDNXTD1 ANGRED ANGRED1 ANGRED2 ANGRED3 ANGRED4 ANGRED5 ASCFLT ASCFLT1 ASCFLT10 ASCFLT11 ASCFLT12 ASCFLT13 ASCFLT14 ASCFLT15 ASCFLT16 ASCFLT2 ASCFLT3 ASCFLT4 ASCFLT5 ASCFLT6 ASCFLT7 ASCFLT8 ASCFLT9
C0D2 C10E C759 C76D C773 C780 C792 C7A7 C000 C014 C0BC C0C1 C0B6 C070 C0AD C082 C085 C01B C02A C043 C039 C050 C069 C05F C08D
*0229 *0261 *1298 *1309 *1311 *1316 *1324 *1332 *0095 *0105 *0212 *0218 *0206 *0172 *0202 *0181 *0182 *0111 *0122 *0142 *0132 *0151 *0166 *0161 *0186
0145 0235 1144 1307 1315 1312 1318 1326
0221 0238 0246 0250 0258 1170
1320
0144 0128 0225 0204 0167 0191 0177 0179 0112 0107 0123 0155 0157 0165 0175
0117 0147 0127 0180 0185 0201 0163 0213 0220 0223
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Application Note Floating-Point Conversion Routines
C180OVPI CHCKO CHCK01 CONST10 CONSTP1 CONSTP5 COSFACT DECDIG DEG2RAD DEG2RAD1 DIVOERR EXG1AND2 EXPSIGN FINISH FINISH1 FINISH2 FINISH3 FLT2INT FLT2INT1 FLT2INT2 FLT2INT3 FLT2INT4 FLT2INT5 FLTADD FLTADD1 FLTADD10 FLTADD11 FLTADD12 FLTADD2 FLTADD3 FLTADD4 FLTADD5 FLTADD6 FLTADD7 FLTADD8 FLTADD9 FLTASC FLTASC1 FLTASC10 FLTASC11 FLTASC12 FLTASC13 FLTASC14 FLTASC15 FLTASC16 FLTASC17 FLTASC18 FLTASC2 FLTASC3 FLTASC4 FLTASC5 FLTASC6 FLTASC7 FLTASC8 FLTASC9 FLTCMP FLTCMP1 FLTCMP2 FLTCOS FLTCOS1 FLTDIV FLTDIV1 FLTDIV10
C835 *1439 1427 C180 *0331 0277 0961 C188 *0337 0335 C18F *0342 0291 C18B *0341 0287 C549 *0919 0779 C7D3 *1360 1213 C52C *0903 0818 C813 *1415 1147 C819 *1418 1428 0004 *0041 0612 C7AA *1337 1217 0000 *0089 0181 C117 *0274 0168 C140 *0291 0286 C146 *0293 0290 C14E *0296 0278 C5A1 *1019 C5CA *1038 1027 C5E3 *1052 1025 C5EA *1055 1022 C5DF *1049 1029 C5BA *1031 1035 C23C *0463 0582 C24C *0471 0467 C248 *0469 0543 C2DC *0546 0504 C2D9 *0544 0540 C262 *0481 0473 C27B *0494 0485 C254 *0474 0488 C282 *0497 0493 C247 *0468 0480 C28B *0502 0483 C2AA *0519 0506 C2CE *0539 0525 C3DB *0733 C3EB *0742 0737 C49B *0821 0854 C49E *0822 0830 C4B1 *0831 0828 C4E2 *0856 0859 C500 *0873 0869 C519 *0888 0862 C4D3 *0848 0844 C45C *0791 0786 C490 *0817 0813 C40E *0760 0757 C438 *0776 0766 C440 *0779 0770 C414 *0763 0775 C430 *0773 0778 C452 *0787 0791 C474 *0804 0797 C493 *0818 0807 C54D *0923 0765 C563 *0933 0930 C564 *0934 0925 C66F *1168 1384 C68C *1183 1179 C30A *0608 1101 C316 *0615 0611 C399 *0684 0679
0315 0361 0364 0466 0472 0610 0616 0736 1021 1075 0772 0777
1173
1385 0203 0208 0295 0285
Freescale Semiconductor, Inc.
1039 1041 0781 1102 1275 1289 1308 1323 1330 0560 0552 0557
0501 0495 0544
0799 0769 1311 1325 0936 0939 0927 1181 1387
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Freescale Semiconductor, Inc. Application Note
FLTDIV11 FLTDIV12 FLTDIV13 FLTDIV14 FLTDIV2 FLTDIV3 FLTDIV4 FLTDIV5 FLTDIV6 FLTDIV7 FLTDIV8 FLTDIV9 FLTFMTER FLTMUL FLTSIN FLTSIN1 FLTSIN2 FLTSQR FLTSQR1 FLTSQR2 FLTSQR3 FLTSQR4 FLTSQR5 FLTSUB FLTSUB1 FLTTAN FLTTAN1 FPACC1EX C3C1 C3D7 C3C4 C35E C320 C33E C350 C375 C348 C377 C345 C37B 0001 C193 C653 C65F C66A C5EB C5F4 C5FD C617 C61A C61C C2FE C303 C7EF C80B 0000 *0703 *0712 *0704 *0655 *0620 *0636 *0648 *0666 *0642 *0667 *0640 *0669 *0038 *0358 *1142 *1149 *1154 *1073 *1078 *1083 *1098 *1100 *1101 *0580 *0583 *1381 *1392 *0300 0700 0708 0702 0639 0617 0633 0636 0662 0665 0713 0663 0666 0691 0136 0293 0774 1210 1218 1245 1419 1386 1152 1183 1076 1079 1095 1097 1110 1313 0581 1388 0100 0314 0481 0929 1106 0229 0255 0408 0522 0554 0675 0707 0827 1032 1244 0363 0928 1327 0230 0416 0547 0696 1569 0376 0377 0362 0365 0389 0380 0283
Freescale Semiconductor, Inc.
FPACC1MN
0001 *0031
FPACC2EX
0005 *0033
FPACC2MN
0006 *0034
0101 0320 0490 0937 1112 0231 0256 0441 0524 0555 0676 0709 0831 1033 1247 0375 0938 1339 0232 0421 0550 0698
0151 0360 0491 0960 1124 0234 0259 0443 0526 0631 0678 0710 0833 1042 1342 0465 1092 1340 0239 0426 0632 0931
0206 0368 0556 0965 1199 0237 0262 0477 0529 0634 0681 0711 0834 1046 1345 0474 1100 1531 0243 0476 0635 0941
0207 0374 0615 1020 1221 0241 0264 0492 0533 0648 0683 0744 0836 1054 1519 0482 1111 1564 0261 0496 0649 1113
0224 0386 0658 1023 1242 0244 0317 0509 0536 0650 0687 0787 0896 1086 1558 0484 1125 0263 0507 0652 1127
0276 0388 0668 1036 1249 0248 0319 0512 0546 0651 0688 0788 0932 1108
0279 0425 0735 1053 1338 0249 0323 0515 0548 0653 0689 0789 0940 1114
0282 0438 0742 1074 1341 0254 0325 0518 0549 0669 0695 0822 0985 1126
0471 0782 1088 1517 0369 0519 0551 0671 0697 0824 0991 1197
0475 0898 1103 1553 0405 0521 0553 0673 0704 0825 1031 1219
0609 0637 0659 1272 1286 1309 1310 1324 0402 0510 0655 1274 0414 0513 0656 1288 0415 0516 0520 0523 0657 0674 0677 1343 1344 1533
FPMULT1 FPMULT2 FPMULT3 FPMULT4 FPMULT5 FPMULT6 FPNORM FPNORM1 FPNORM2 FPNORM3 FPNORM4 GETFP11 GETFP12 GETFP21
C1C1 C1C8 C1CF C1AE C1BC C1D5 C161 C16D C16F C17C C17E C85D C85F C873
*0381 *0385 *0388 *0371 *0378 *0391 *0313 *0319 *0320 *0326 *0328 *1516 *1517 *1530
0381 0370
0384 0539 0966
0324 0316 0318 0321 1514 1511 1528
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Application Note Floating-Point Conversion Routines
GETFP22 GETFPAC1 GETFPAC2 GETPI MANTSGN1
MANTSGN2 MAXNUM N9999999 NSQRTERR NUMERIC
NUMERIC1 OVFERR P9999999 PIOV180 PSHFPAC2 PULFPAC2 PUTFP11 PUTFP21 PUTFPAC1 PUTFPAC2 PWR10EXP RAD2DEG SINCOS SINCOS1 SINCOS2 SINCOS3 SINCOS4 SINCOS5 SINCOS6 SINCOS7 SINFACT SINT2FLT SINTFLT1 SINTFLT2 TAN90ERR TFR1TO2 THREE60 TOLGSMER UINT2FLT UINTFLT1 UMULT UMULT1 UMULT2 UMULT3 UMULT4 UNFERR
C875 *1531 1525 C850 *1509 1390 1433 C866 *1523 0288 0292 1418 1469 C82B *1431 0004 *0032 0102 0113 0623 0746 1128 1153 1349 1512 0009 *0035 0372 0478 1270 1284 C80F *1396 1389 C545 *0916 0763 0006 *0043 1080 C155 *0303 0106 0116 0219 C15F *0310 0305 0307 C7E3 *1367 1280 0002 *0039 0378 0558 C541 *0913 0767 C7E7 *1368 1432 C831 *1436 1417 C839 *1454 0097 0359 1416 1426 C843 *1465 0134 0298 1420 C885 *1557 1555 C895 *1568 1566 C87C *1552 C88C *1563 1462 0001 *0090 0187 0192 C823 *1425 C68F *1195 1149 1176 C6BC *1218 1226 C6D3 *1230 1259 C713 *1262 1277 C6BF *1219 1216 C73F *1283 1279 C74E *1289 1282 C689 *1217 1212 C7C3 *1353 1203 C589 *0984 C595 *0992 0987 C59F *0998 0996 0007 *0044 1391 C646 *1123 1091 1104 C7EB *1369 1304 0005 *0042 1049 C577 *0959 0992 C580 *0964 0962 C1D9 *0395 0387 C1E3 *0402 0418 C1F4 *0411 0404 C217 *0426 0420 C234 *0439 0427 0434 0003 *0040 0382 0541
0764 0768 0773 0780 1232 1281 1305
0371 0756 1182 1515 0503 1347
0373 0758 1201 1554 0583 1348
0479 0502 0505 0538 0622 0894 0924 0934 0997 1026 1047 1078 1223 1240 1251 1306 1322 1329 1346 0585 0621 0926 0935 1129 1526 1529 1565
0126 0143 0154 0162 0184 0190
Freescale Semiconductor, Inc.
0640
0464 0620 0748 1083 1143 1169 1382 0391 0469 0646 0892 1118 1155 1392
0195 0199 0202 0280 0284 0289 0294
1209 1215 1383
0664
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Freescale Semiconductor, Inc. Application Note
Freescale Semiconductor, Inc.
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
reach USA/EUROPE/Locations Listed: Motorola Literature Distribution, P.O. 5405, Denver, Colorado 80217, 1-303-675-2140 1-800-441-2447. Customer Focus Center, 1-800-521-6274 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu, Minato-ku, Tokyo, 106-8573 Japan. 81-3-3440-8573 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, King Street, Industrial Estate, N.T., Hong Kong. 852-26668334 MfaxTM, Motorola Back System: RMFAX0@email.sps.mot.com; http://sps.motorola.com/mfax/; TOUCHTONE, 1-602-244-6609; Canada ONLY, 1-800-774-1848 HOME PAGE: http://motorola.com/sps/ Mfax trademark Motorola, Inc.
Motorola, Inc.,1987, 2000
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AN974 Freescale Semiconductor, Inc. MC68HC11 Floating-Point

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