AN1771 Freescale Semiconductor, Inc. Precision Sine-Wave Ton
|
|
|
Top Searches for this datasheet
Order this document AN1771/D
AN1771
Freescale Semiconductor, Inc.
Precision Sine-Wave Tone Synthesis Using 8-Bit MCUs
Haas Body Electronics Occupant Safety Division Austin, Texas
Introduction
pervasive nature modern microcontroller (MCU) resulted numerous products that contain more MCUs central subsystems. Cell phones, base stations, repeaters, SLICs (subscriber line interface cards), cordless telephones just many products which have MCUs center their functionality. These products also require precision tone generators functions such dual-tone-multi-frequency signaling (DTMF), call progress tones, continuous tone-coded squelch system encode (CTCSS), digital continuous tone-coded squelch system encode (DCTCSS), user interface chimes. While off-the-shelf components generally available these functions, added cost greatly reduced using already present synthesize desired tones. This benefit multiplied systems where many unrelated tone protocols required, since same synthesis firmware/hardware used across wide range frequencies. This application note presents basic tone synthesis techniques illustrates their implementation using HC08, HC05, HC11, HC12 Families MCUs.
Motorola, Inc., 1998
AN1771
More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note Tone Synthesizer Basics
When analog signal stored digital memory, (analog-todigital) converter used provide quantized samples specific data rate (known sample rate stored memory binary values. retrieve stored signal, binary samples extracted from memory sent (digital-to-analog) converter same rate which they were stored. long analog signal frequency components greater than half sample rate Nyquist criteria), reconstructed signal will appear closely follow original waveform. (Quantization effects will introduce some errors.) generate tone specific frequency, simply digitize sample tone reconstructed store sample system memory later recall. However, multi-tone system, each tone requires separate sample thus memory storage. more tone frequencies required, more storage needed hold samples. addition, sample lengths different frequencies will consistent, since each stored sample must continue until signal repeats. This method would tedious maintain, large amounts memory store relatively tones, would limited only those tones which were stored previously. Another reconstruction method would generate single sample vary reconstruction sample rate. This would produce signal with variable frequency with only stored cycle, would yield variable non-linear Fstep (Fstep smallest, non-zero increment frequency). example, consider 8-MHz master clock 256-byte sine sample. 8-MHz master clock applied programmable 16-bit divider which used sample rate. obtain reconstructed tones from near-DC kHz, divider would range from 65535 (8E6 65535 0.477 (8E6 3.125 kHz).
Freescale Semiconductor, Inc.
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Tone Synthesizer Basics
frequency range, Fstep would Fstep Fdiv2 Fdiv1 (8E6 65534 256) (8E6 65535 256) 0.47685 0.47684 0.00001 While high end: Fstep Fdiv2 Fdiv1 (8E6 256) (8E6/11 256) 3125 2841 This illustrates that example would exhibit Fstep variation several orders magnitude across signal passband. only would this complicate real-time frequency calculations target system, Fstep granularity higher frequencies would severely limit utility system. (Typically, Fstep should least across passband most applications.) Filtering this system would also pose some problems. reconstruction filter (for instance, low-pass filter with cutoff frequency, just below Nyquist rate used remove (pulse width modulation) sample frequency higher order harmonics. sample rate varied, user must undertake difficult expensive task designing tunable filter that track sample rate that reconstructed signal have flat response passband. This would require additional hardware, resources, firmware support which would increase cost both development production.
Freescale Semiconductor, Inc.
Direct Look-Up Synthesis
direct-look-up synthesis algorithm described here uses combination aforementioned schemes produce precision waveforms across specific frequency band. look-up table holds replica waveshape which generated. (Typically, this mathematically generated sine table with entries.) every sample point, algorithm uses value phase accumulator extract
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
data from table which sent D/A. phase accumulator software register used keep "running total" current phase valve synthesized signal. algorithm also updates phase accumulator used next sample point adding "delta phase" value, Delta.
NOTE:
Look-up table accesses modulo-N, such that access beyond table will wrap-around beginning.
obtain finer Fstep granularity, Delta phase accumulator represented fractional quantities with integer portion being used index into sine table. frequency resulting tone deduced setting Delta every sample point, integer portion phase accumulator incremented exactly Since this corresponds index into sine table, output simply will follow sine table. Since table holds cycle, frequency output will 1/tgen, where tgen time required full cycle. With table entries sent 1/Fs entry: tgen Delta doubled, table will cycled half samples, which results tgen (2Fs) Thus, tgen inversely proportional value Delta. Since 1/t, frequency generated signal given this equation: Fgen Delta)
Freescale Semiconductor, Inc.
noted, Delta fractional quantity valid this range: Delta microcontroller applications, Delta most easily represented 2-byte quantity (referred here Dreg) with upper byte holding integer portion lower byte holding fractional portion (thus,
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Tone Synthesizer Basics
radix lies between bits decimal value Delta would represented Delta Dreg[15:0] mod(fractional)
Since fractional portion represented here 8-bit value, mod(fractional) which yields: Delta Dreg[15:0]
Freescale Semiconductor, Inc.
Dreg[15:0] Delta 16-bit Dreg value thus added 16-bit phase accumulator each sample period generate table index running phase reference. table index extracted from phase accumulator masking integer portion with (valid 2^x, where positive integer). 8-byte table, mask would (the lower three bits) 256-byte table mask would (all eight bits integer portion Delta). This provides simple efficient method implementing numerical values used represent Delta. Example: Given: kHz, Fgen From equation solve Delta, Delta Fgen) 800) 8000 integer fractional parts (high byte/low byte) represented Integer Fractional 204.8 (round nearest integer) Dreg $00CD
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
pointer mask, noted, would Accum[10:8] [111], which used offset into 8-byte sine table. Table Example 4-Bit, Unsigned Sine Table (D/A int(sin(2*pi*x
Offset, Degrees
Freescale Semiconductor, Inc.
Table Example Phase Accumulator History (Each Line Sample Period)
Accum [15:0] $0000 $00CD $019A $0267 $0334 $0401 $04CE Accum [10:8] Value from Table
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Tone Synthesizer Basics
Reconstructed signal (Delta 0.8)
Volts
Freescale Semiconductor, Inc.
t/Fsamp
Figure Delta (800 Example Using 8-Byte Table Figure illustrates full cycle reconstructed signal, with each horizontal division representing sample period 8000 µs). From this, period waveform calculated counting number sample periods full cycle multiplying sample period this case, samples 1.25 Hz). apparent from plot Figure table length results coarse reconstruction; longer sine table gives more resolution reduces harmonic distortion. Since integer portion Delta eight bits, 256-byte table easily indexed while reserving excessive amount memory. Linear interpolation used increase accuracy with shorter table, this generally feasible most MCUs processor bandwidth limitations. (However, HC12 support this method described later this application note.) interesting result this reconstruction method that relationship between Delta linear, with each unit change Delta resulting same change Fgen across entire pass-band. This value
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
referred earlier Fstep represents smallest possible change Fgen. Fstep found from equations Fstep Choose Dreg 256) (Dreg 256) (256 (Dreg (Dreg Fstep (256
Freescale Semiconductor, Inc.
Fstep ((Fs Dreg 256) (Dreg 256)
Thus, value Dreg, Fstep always equal (256 result worth consideration that given sample rate, only remaining variable determine Fstep table length. From previous example, 8000 which gives Fstep 3.906 Increasing table size results Fstep 0.122 Fstep specifies maximum gross frequency error given tone frequency allowing system accuracy within Fstep/2 desired frequency. After signal purity considerations, Fstep typically next most important design parameter determines accurately generic tone frequencies generated. Generally, designer faced with need generate tones over specific frequency range with some degree accuracy. Typically, this specified terms %error (plus minus) desired frequency, also expressed +/-F(Hz). course, specifying error this manner trivial because Fstep that required design meet specification.)
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Tone Synthesizer Basics
systems that express error terms percent, this equation determine maximum allowed Fstep: Fstep(max) (Fmin %error)
Where Fmin minimum desired frequency generated course, this equation represents design minimum, usually desirable choose small Fstep practical. Actual Fstep should least percent Fstep (max) from equation allow round-off errors normal variations system clock frequency.
Freescale Semiconductor, Inc.
Dual Tone (Chord) Synthesis
Applications such DTMF call progress signaling require dual tone synthesis which simply generation mixed tones unrelated frequencies. term "chord" sometimes used describe this technique, even though tones necessarily related harmonics. direct look-up synthesis, dual tone generation straightforward extension single tone case described earlier. separate tones generated maintaining separate Dreg phase accumulator registers. each sample period, system adds Dreg1 accumulator1 Dreg2 accumulator2. index extracted from each accumulator used separately extract values from same look-up table. Before sending D/A, however, these values added software, with resulting output representing algebraic unrelated tones. When mixing signals same channel this manner, important avoid overflow. Overflow occurs when value calculated that exceeds maximum range. signals same amplitude, range instantaneous amplitude vary from minimum maximum where maximum amplitude individual signals. Thus, maximum allowed value D/A(max) D/A(max) This most easily accomplished "pre-dividing" sine table values that when values summed, result won't overflow D/A. While pre-division minimizes real-time effort required firmware, also increases round-off error (because
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
(least significant bit) original sine table values lost). better method original table perform division real time (post-division). While this adds some overhead system, reduces round-off error which results improved dynamic range. With 8-bit implementation 8-bit MCU, most efficient implement post-division simply byte values perform instruction result (divide When 8-bit values added, carry becomes ninth bit. effect instruction divide this 9-bit value with 8-bit result being desired value. While final result lost, should noted that this represents only round-off error instead errors introduced pre-division method.
Freescale Semiconductor, Inc.
Look-Up Table Requirements
length look-up table primary design variable determined available memory desired Fstep resolution. dynamic range also contributes length table some systems accommodate 10-, 12-, 16-bit sub-systems. This mandates more memory hold longer values look-up table. Another factor determining table length derives from nature accumulator/pointer system employed. reduce firmware overhead, look-up table length should exponential multiple (given earlier 2^x). This simplifies modulo mask extract pointers which save several execution cycles code that typically very time sensitive. Optimally, 8-bit mask chosen because this requires extra cycles extract pointer which results codeoptimal table length bytes. While this result Fstep which much smaller than required some applications increase table memory required, reduction execution cycles overshadow memory availability concerns systems where ancillary firmware load high.
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Methods
Methods
most popular methods direct conversion pulse width modulation (PWM, also referred pulse length modulation, PLM). While direct easier implement terms firmware support) result less distortion noise than methods, typically, more expensive therefore desirable costsensitive systems.
Freescale Semiconductor, Inc.
this reason, bulk following discussion focuses methods some 16-bit Motorola microcontrollers. general, buffered preferred over non-buffered because signal-to-noise ratio output adversely affected even slight timing variations signal.
Filtering
sample frequency should high possible (relative reconstructed signal) relax filtering requirements. lower sample frequency, sharper filtering required effectively eliminate stop-band frequency components. Some methods described here limited carrier frequencies around less (due timer and/or clock speed limits), which require very sharp filtering sufficiently remove carrier signal aliases from output some applications. Sample rate filter order prime cost factors synthesis system. sample rate increased, more performance required which typically increases costs forcing designer exercise more these choices: higher frequency crystal module only available more expensive external
filter costs also related sample rate, inversely proportional, which effect countering cost issues. Thus, usually possible designer reach cost compromise which allows system performance specifications met.
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
approach issue filtering, user first must consider spectral content signal that filtered. Sampling theory dictates that when continuous time signal sampled regular rate (for example, sine table), spectrum reconstructed signal will comprised spectrum original signal plus original spectrum translated harmonics sample frequency illustrated Figure recover original signal, minus translated spectra, reconstruction filter needed indicated figure.
Freescale Semiconductor, Inc.
Filter
-2Fs
Figure Reconstructed Signal Spectra Filter Response Fs/2) ideal filter described Figure would pass signals below reject signals above Unfortunately, impossible construct ideal filter, which forces designer consider real filter performance when designing synthesis system. impact this seen Figure which shows synthesized signal, Fgen (Fgen inside real filter passband. real filter cutoff frequency (Fc) that less than Nyquist rate, Fs/2. stop-band aliases Fgen sample clock also shown. intersection filter curve with that stop-band alias determines degree attenuation alias component.
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Methods
Filter
Amplitude (db)
Freescale Semiconductor, Inc.
Fgen Fs/2 Frequency
Figure Example Signal Real Filter Response Order Filter (1st, 2nd, Shown) Filters signal reconstruction have three important design rules: passband response should reasonably flat. filter cutoff must somewhat less than Nyquist rate, greater than Fgen(max). required filter order determined separation between Fgen(max) Fgen(max). flat passband requirement dictated application. Most applications require that signal amplitudes only vary small amount across passband. Typically, Butterworth response preferred essentially amplitude ripple passband. cutoff frequency chosen inside desired passband (for example, increase stop-band attenuation), amplitude distortion (known twist) also result which disrupt function tone receivers detectors (particularly important dual tone systems). Once cutoff frequency chosen minimize pass-band distortion, filter order (for example, slope stop-band attenuation) determined amount stop-band alias attenuation required system parameters. Better than 40db
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
attenuation stop-band generally safe figure, although more less attenuation appropriate particular system design. Each order filtering results attenuation slope approximately 6db/octave filter stop-band. Given filter cutoff, target frequency, following equation relates terms octaves: F/Fc where number octaves separation.
Freescale Semiconductor, Inc.
solve function used: log(2)
given filter order, cut-off frequency, attenuation particular frequency, A(F), calculated from this formula: A(F) octave) octaves (log log(2)) Which quickly re-arranged solve (10) A(F) log(2) Fc))
unitless quantity rounded nearest integer. user assumes that alias components approximately equal amplitude fundamental signal (This generally true systems.), A(F) taken absolute desired attenuation floor equation used determine required filter order based fundamental stop-band alias, Fs-Fgen(max) (which typically most important component eliminate). Simple stages used applications where order calculated less. However, higher order filters usually require active design (such switched capacitor op-amp based filters) reduce passband attenuation inherent passive filters. most firmware examples presented here, these parameters were used:
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Methods
7.812
Fgmax A(Fmas) from equation A(Fmax) log(2) log((Fs Fgmax) log(2) [(7812 2600) 3000)] 8.36
Freescale Semiconductor, Inc.
Thus, eighth order filter would ensure that stop-band aliases would better than below fundamental. most effective filter method higher order designs switched capacitor filter such MF-4. These devices allow relatively high filter orders with parts. schematic Figure shows eighth order filter with input output filters (needed remove high frequency noise) total filter order about 60db/octave. This reconstruction filter used with following examples.
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
ROSC* COSC*
0.01
CLKIN
CLKR
0.01
AGND
Freescale Semiconductor, Inc.
CLKIN
CLKR
AGND
0.01
ROSC COSC
Figure Example Filter Based MF-4 Switched Capacitor Building Clock
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Methods
results equation (with respect primary stop-band alias, Fgen) that filter order reduced increasing from previous example increased 31.2 kHz: Fgmax 31.2 A(Fmax) log(2) ((Fs-Fgmax) log(2) log((31200 2600) 3000)) 2.05 Thus, simply increasing sample rate factor MF-4s example filter eliminated. This greatly reduces filter cost.
A(Fmax)
Freescale Semiconductor, Inc.
Sine Table
Each following examples uses unique sine table. While some effort made keep examples consistent, subtle variations from implementation next impact data contained sine table. Most this variation latencies some implementations. code used also have drastic impact composition sine table codec versus linear D/A, example). general, examples presented here follow same basic format: sine table varies between binary value with mid-point reference that lies D/A(0) ((max min) Thus, tones generated will have offset. Since typically close 255, respectively, reference will generally close (255) Since buffered direct systems generally don't exhibit latency problems, examples here sine table that varies from HC12 PWM) with reference 128.
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
However, unbuffered systems have min/max values that straightforward require different sine table. program Sine Table Generator Program illustrates simple method generating generic sine table given minimum, maximum, number entries formats assembly include file.
Tone Generator Algorithm
Freescale Semiconductor, Inc.
Each examples follow shaped subtleties particular MCUs chosen this application note. However, central tone generator algorithm substantially similar cases. Some MCUs require more memory and/or execution time code execute, they perform same tasks same fashion generate sine wave signal. Figure illustrates flowchart this algorithm which basis following examples. flow chart basic variations. Figure non-buffered systems uses temporary holding register value. previously calculated loaded from temporary register start interrupt immediately transferred duty cycle register. Figure buffered systems, this value stored soon calculated.
HC05 Family
different modules available HC05 Family. HC05B16, HC05B32, HC05X32 variants have simple module that provide 8-bit output rates, fast slow. maximum clock rates, fast mode allows only 1.95-kHz rate, which limits utility tone synthesis since maximum allowed tone frequency would only Still, this might prove useful several applications, especially generation CTCSS tones. (The highest CTCSS tone approximately Hz.) Another HC05 variant, MC4, more flexible module which generate buffered rates about buffered.
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Methods
Interrupt
Interrupt Move Temporary Value Register Dreg1 (DX) Accumulator (ACFX)
Dreg1 (DX) Accumulator (ACFX)
Freescale Semiconductor, Inc.
Dreg2 (DY) Accumulator (ACFY)
Dreg2 (DY) Accumulator (ACFY)
Index SIN_TAB ACFX[15:8] Sine Value Index SIN_TAB ACFY[15:8] Sine Value
Index SIN_TAB ACFX[15:8] Sine Value Index SIN_TAB ACFY[15:8] Sine Value
RORA (Divide Store Temperature Register
RORA (Divide Store Register
Timer
Timer
Decrement Timer Decrement Timer
Clear Interrupt Flags Clear Interrupt Flags
Non-Buffered
Buffered
Figure Tone Generator Interrupt Service Flowchart
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
HC05 Since system buffered, crude effective technique used provide synchronous interrupt service tone generator algorithm. output simply connected input captures which then configured falling edge operation. This configuration effective, care must taken ensure that avoid percent percent duty cycles. does allow percent duty cycle, percent achievable must avoided. percent generated PLM, output steady logic which effectively disables tone interrupt. easiest method address this situation code sine table that value least
Freescale Semiconductor, Inc.
NOTE:
should noted that, interrupt latency, full 8-bit dynamic range available.
amount degradation determined interrupt latency, amount time takes interrupt routine write value duty cycle register. Because this requirement, flowchart Figure used this example. Since rate low, latency does significantly impact sine table value. interrupt latency cycles, plus maximum instruction latency cycles, plus seven cycles transfer latency equals cycles latency. However, 1.95-kHz rate, takes four cycles every counter tick, minimum duty cycle latency
HC05MC4
implementation similar that version that input capture used source tone generator interrupt service routine. setup somewhat more complicated that offers several features that targeted motor applications. this application, however, simply want buffered single port pin, which easily configured shown PWM. Since buffered, temp register that used version eliminated value written directly duty cycle register (PWMAD).
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Methods
HC08 Buffered
HC08 module offers buffered mode linking duty cycle registers. Application firmware must track which register last written maintain buffered operation, this easily accomplished with simple counter which incremented each time duty cycle register written. this counter used select which duty cycle register written during particular interrupt cycle. Since HC08 uses timer overflow operate PWM, serves obvious choice source interrupt which drives tone generator service routine.
Freescale Semiconductor, Inc.
HC11 Synchronous
While there HC11 variants with modules, this example uses output compares generate signal thus applicable HC11 variants. synchronous because update operation integrated into interrupt which forces update synchronized with start cycle. However, since operation buffered, dynamic range affected response latency (Figure applies). HC11, only output compare, OC1, affect port pins. other output compares tied dedicated that selection second tied port selection vice versa. this example, generates main interrupt sets port (PA6) while clears port pin. illustrated Figure interrupt routine sets both time-outs updates value used next cycle.
Interrupt Interrupt
tpwm
Figure Timings
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
indicated HC11 Listing, interrupt requires cycles stack registers update timer, which dictates minimum pulse width. Proper instruction (which prestacks registers HC11) save cycles. (WAI takes cycles: cycles stack registers, plus cycles fetch interrupt vector.) Since vector fetch comes after interrupt, gets counted latency this example, which reduces minimum pulse width cycles. only restriction high duty cycle that time-out less than (for instance, occur prior time-out value.
Freescale Semiconductor, Inc.
NOTE:
interrupt latency does account instruction that executing time interrupt.
applications where used guaranteed, wide variation instruction cycles make latency calculation difficult task. Worst case instruction latency would additional cycles (IDIV FDIV) this excessive step these instructions encountered often real applications. IDIV FDIV instructions used, figure reduced cycles which will cover remaining instructions while only adding moderate degree overhead duty cycle. following equations determine critical design constants: TSAMP cycle time (cycles) (XTAL Fsamp Fsamp TMIN minimum pulse width (cycles) Tint_resp Tinstr Toc2_update WAI) (guaranteed WAI) TMAX maximum pulse width (cycles) TSAMP RANGE discrete steps from TMAX TMIN DUTY duty cycle TSAMP
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Methods
this example, 9.83-MHz crystal used which gives following values. 8-MHz case also shown. Table HC11 Design Examples
9.83-MHz Crystal TSAMP (9.8304E6/4) 7.812 314cycles TMIN cycles (worst case) TMAX cycles RANGE 8-MHz Crystal TSAMP (8E6/4) 7.812 cycles TMIN cycles (worst case) TMAX cycles RANGE
Freescale Semiconductor, Inc.
While this example limits maximum "on" time eight bits, timer cycles, above calculations indicate that greater than eight bits dynamic range possible 2.32 (for Fsamp shown). maximum dynamic range importance oscillator design will allow higher crystal frequencies selected, excess RANGE value used absorb latency figure. This done adding latency into updated TOC2 value interrupt routine. This method would nine cycles length interrupt routine, would allow full 8-bit implementation. this case, sine table could calculated swing from 255.
HC12 Buffered
this example (see HC12 Listing), HC12 operated 8-bit buffered mode. original design used output compare interrupt update where period integer multiple period. However, this design exhibited noise problems high values PWDT0 system re-worked follow HC05 case where drives input capture. (PP0 connected falling edge triggered interrupt.) HC12 module, duty cycle ranges from values PWDT0 that range from 255. Since input capture system cannot tolerate duty cycles percent percent, these values must eliminated from sine table, thus HC12 sine table should range from proper operation. difference worthy note HC12 allows reduction length sine table. systems where memory must conserved,
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
addition linear interpolate instruction, TBL, greatly reduce size 256-byte sine table previous examples without seriously impacting signal quality. reduction factor (64- 32-byte sine length) achieved using fractional portion phase accumulators supply interpolation operator used instruction. This direct extension indexing principal defined phase accumulators. integer portion accumulator determines position sine table, fractional portion determines fractional phase distance next entry.
Freescale Semiconductor, Inc.
keep system parameters same 256-byte case (same Fstep, Fsamp, Fgen, etc.), decimal radix Dreg phase accumulators moved rather than reducing range integer portion. Since interpolate operation effect "filling "missing" table entries, position radix chosen yield effective table length (which simply allows same Dreg values used). This accomplished moving radix proportion factor reduction table length. table divided factor 2^x, then radix moved bits. example Interpolated Table Lookup uses 32-byte table, which factor reduction, thus moving radix between bits Shift instructions used byte align radix when extracting table index interpolate values.
Direct
direct interface worthwhile alternative methods those situations where suitable additional cost justified. (See HC12 Listing.) Signal-to-noise improvements achieved over most methods, system clock frequencies reduced some cases reduce power consumption. There several well documented methods that employed direct D/A; this reason, discussion here focuses importance timing writing value sub-system. mentioned earlier regarding systems, buffered operation preferred over non-buffered which changes duty
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Direct
cycle (for instance, values) synchronized sample clock. This also important direct sub-systems because statistical variation even single clock cycle result significant noise output. interrupt-driven systems, instruction latencies introduced interrupt dispatch easily account several cycles variation timing update. simple mechanism precisely controlling update needed. simplest approach WAIT, depending processor source form) instruction ensure that been configured anticipation coming interrupt. Once wait instruction complete, subsequent interrupt response latency will consistent each iteration interrupt. This approach basic difficulties: designer must make sure that wait instruction executed prior each every interrupt. While this relatively straightforward simple systems, feasible maintain more complicated systems, especially interrupt recursion used. Other interrupt sources disrupt update process which dictates, general, that other interrupts must disabled during tone generation. Another approach requires addition latch output compare signal latch value into after interrupt firmware written update. output compare will then synchronized clock with excessive firmware maintenance issues. long tone generator interrupt adequately serviced, latch precisely synchronized clock. external latch approach also allows (input/output) expansion reclaim bits used drive other functions. This method illustrated Figure DAC0832 designed interface processor features built-in double-buffered latch. interface signal (~WR) latches initial write, while another interface signal (~XFER) transfers latched data D/A.
Freescale Semiconductor, Inc.
AN1771 MOTOROLA
More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
output compare signal drives ~XFER signal which assures that data always presented exact sample point relative previous sample period.
DAC0832
Freescale Semiconductor, Inc.
AGND
XFER
LF353 EQUIVALENT
Figure Connections output compare also serves tone generator interrupt source occurs sample rate. Once interrupt processed, code clears XFER signal updates phase accumulators. updated values then used calculate value which then written port which arms transfer mechanism. When next output compare issued, will transfer value previously written repeat procedure.
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note DTMF Call-Progress Tones
DTMF Call-Progress Tones
TELCO wireless applications areas which make wide DTMF call-progress signaling. Both DTMF call-progress signaling systems make dual tones signify unique system state. Tone Definitions Table lists tone formats various signaling states. Table TDMF Call Progress Frequency List
State Description Dial tone Busy Ringback High Tone 1209 1336 1477 1209 1336 1477 1209 1336 1477 1336 1209 1477 1633 1633 1633 1633 Tone (Hz) 0.5% 0.5% 0.5% 7.812 High Tone Dreg (Decimal) 3691 5201 4026 Tone Dreg (Decimal 2936 4026 3691
Freescale Semiconductor, Inc.
Note: DTMFs 0.5% DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF DTMF 10142 11207 12316 10142 11207 12316 10142 11207 12316 11207 10142 12316 13698 13698 13698 13698 5847 5847 5847 6459 6459 6459 7147 7147 7147 7894 7894 7894 5847 6459 7147 7894
Busy tone cycles on/off s/0.5s, ringback tone cycles on/off
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
calculate absolute frequency tolerance must take lowest frequency table, apply equation Fstep(max) Fmin %error 0.005 1.75 examples presented here meet this Fstep specification with difficulty (although HC05 example would able generate DTMF tones limitation Fs).
Freescale Semiconductor, Inc.
1209
1336
1477
Figure Standard DTMF Keypad Layout Frequency Matrix legacy original Bell Telephone DTMF keypad layout, still common depict DTMF row/column format shown Figure This layout helpful that intersecting rows columns correspond frequencies each signal. binary code often used represent DTMF digits column frequencies easily extracted. code, four bits used represent DTMF signals. upper bits specify frequency,
1633
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Sample TELCO Routines
while lower bits specify column frequency illustrated Table
Table ASCII Conversion Matrix
0000 0001 0010 ASCII
Freescale Semiconductor, Inc.
0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
Sample TELCO Routines
TELCO Subroutines shows HC11/HC12 routines that used demonstrate DTMF call-progress tones. main subroutine DTMFstr which takes ($0D) terminated ASCII string converts DTMF equivalents each tone using ASCdtmf. constants "toneon" "toneoff" specify timings DTMF signals shown their typical values this listing on/off).
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
ASCdtmf converts ASCII character code using ordered ASC_T look-up table. code then used access DTMFlo DTMFhi look-up tables extract desired Dreg values which copied registers. Lastly, ASCdtmf uses tontimer time portions tone before exiting. Since most execution time spent waiting tontimer count down these loops contain system polling subroutine perform non-critical real-time system functions. long polling routine takes less than Tinterrupt, system throughput will impacted inversely. call-progress tones generated CPsub. tone generated determined contents register upon entry into routine. generates dial tone, generates busy tone, while generates ringback tone. call progress tones continue until character detected. real-world application, signal and/or timer combination likely would used terminate these tones.
Freescale Semiconductor, Inc.
Conclusion
techniques described herein demonstrate feasibility implementing sine-wave-based tone generation system variety Motorola microcontroller families. using interrupts synchronize tone generation algorithm, system integrated easily system without having re-calibrate machine cycles timing loops. interrupt nature system also allows real-time service application specific functions. This allows wide variety tone signaling protocols supported easily with minimum code data overhead.
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Listings
Listings
HC05 Listings HC05
Setup: init (PLMA) NOTE: must select clock prescale MISC #$FF^(SFA|SM) MISC #$80 PLMA
Freescale Semiconductor, Inc.
0401 0403 0405 0407 0409
B60C A4F5 B70C A680 B70A
period fast 1.92 preset @50% duty
init #ICIE|IEDG1
040B 040D 040F 0411
B612 AA82 B712
Interrupt service: icii traps edges synch update fsamp rate determined period SIN_TAB pointers calculated next sample period. bits response latency interrupt. PLMA TIC1L TIC2L DX+1 ACFX+1 ACFX+1 ACFX ACFX DY+1 ACFY+1 ACFY+1 ACFY
0430 0432 0434 0436 0438 043A 043C 043E 0440 0442 0444 0446 0448 044A 044C 044E
B65A B70A B613 B615 B61D B651 BB57 B757 B650 B956 B756 B653 BB59 B759 B652 B958
icii
update clear interrupt flags
accum tone
accum tone
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
0450 0452 0454 0457 0459 045C 045D 045F 0461 0463 0465 0467 0469 046B 046D 046F 0471 0473 B758 BE56 D60474 BE58 DB0474 B75A B654 2604 B655 270C B655 A001 B755 B654 A200 B754 RORA loop4 icix ACFY ACFX SIN_TAB,X ACFY SIN_TAB,X tontimer loop4 tontimer+1 icix tontimer+1 #$01 tontimer+1 tontimer #$00 tontimer
lookup tone lookup tone bits store next update update duration count done,
done, tontimer-
Freescale Semiconductor, Inc.
Setup: init #CSA1+POLA CTLA #9*10 RATE #$80 PWMAD enable pwm1 rate preset zero
0101 0103 0105 0107 0109 010B
A641 B714 A690 B716 A680 B710
init #ICIE2|IEDG2 rising edge
010D 0111
A682 B717
Interrupt service: ic1ii traps edges synch update fsamp rate determined period SIN_TAB pointers calculated next sample period. ic1ii TIC1L TIC2L DX+1 ACFX+1 ACFX+1 ACFX clear flags
0132 0134 0136 0138 013A 013C 013E 0140
B618 B61C B61A B651 BB57 B757 B650 B956
accum tone
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Listings
Freescale Semiconductor, Inc.
0142 0144 0146 0148 014A 014C 014E 0150 0152 0155 0157 015A 015B 015D 015F 0161 0163 0165 0167 0169 016B 016D 016F 0171
B756 B653 BB59 B759 B652 B958 B758 BE56 D60172 BE58 DB0172 B710 B654 2604 B655 270C B655 A001 B755 B654 A200 B754
RORA loop4 icix
ACFX DY+1 ACFY+1 ACFY+1 ACFY ACFY ACFX SIN_TAB,X ACFY SIN_TAB,X PWMAD tontimer loop4 tontimer+1 icix tontimer+1 #$01 tontimer+1 tontimer #$00 tontimer
accum tone
lookup tone lookup tone bits store update duration count done,
done tontimer-
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
HC08 Listing
Setup: 6E07 6E09 6E0B 6E0D 6E10 6E12 6E15 6E17 6E19 6E1B 6E1D 6E1F 6E21 6E23 6E25 6E27 B620 AA30 B720 4500FF 3524 450080 3527 A601 B75A A62A B726 B620 A4DF AA40 B720 init LDHX STHX LDHX STHX #TSTOP|TRST #pwper TMOD #$0080 TCH0 track #MS0B|TOV0|ELS0B TSC0 #$FF^TSTOP #TOIE stop timer period init duty cycle init tracking register init buffered stop timer
Freescale Semiconductor, Inc.
Interrupt service: 6E44 B620 6E46 A47F 6E48 B720 6E4A B651 6E4C BB57 6E4E B757 6E50 B650 6E52 B956 6E54 B756 6E56 B653 6E58 BB59 6E5A B759 6E5C B652 6E5E B958 6E60 B758 6E62 6E63 BE56 6E65 D66E84 6E68 6E69 BE58 6E6B DB6E84 6E6E 6E6F 450028 6E72 015A03 6E75 45002B 6E78 6E79 3C5A 6E7B 5554 6E7D 2704 6E7F AFFF 6E81 3554 6E83
tovi sets fsamp rate calculates SIN_TAB pointers next sample period. bits only! #$FF^TOF DX+1 ACFX+1 ACFX+1 ACFX ACFX DY+1 ACFY+1 ACFY+1 ACFY ACFY ACFX SIN_TAB,X ACFY SIN_TAB,X #TCH0L 0,track,loop3 #TCH1L track tontimer loop4 #-1t tontimer clear flag accum tone
tovi CLRH CLRH RORA LDHX BRCLR LDHX loop3 LDHX STHX loop4
accum tone
lookup tone lookup tone bits test which write ch0, switch next cycle update tracking update duration count done,
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Listings
HC11 Listing
Setup: enables tone generator 8064 8066 8069 806B 806E 8071 8073 8075 8078 807B 807E 8081 8083 8085 8088 808A 808C 808F 8091 8094 8097 8099 809C 8640TON LDAA #OC1M6 B7100C STAA OC1M 8640 LDAA #OC1D6 B7100D STAA OC1D B61020 LDAA TCTL1 843F ANDA #~(OM2|OL2) 8A80 ORAA #OM2 B71020 STAA TCTL1 FC100E TCNT C30133 ADDD #TSAMP FD1016 TOC1 961E LDAA TMIN 9708 STAA FC100E TCNT D31E ADDD TMIN D31E ADDD TMIN FD1018 TOC2 86C0 LDAA #OC1F|OC2F B71023 STAA TFLG1 B61022 LDAA TMSK1 8A80 ORAA #OC1F B71022 STAA TMSK1 TOFF disables tone generator B61022 847F B71022 7F100C B61020 843F B71020 TOFF ANDA STAA LDAA ANDA STAA LDAA TMSK1 #~OC1F TMSK1 OC1M TCTL1 #~(OM2|OL2) TCTL1 sets
clears
Freescale Semiconductor, Inc.
init rate
init preset near bottom
pre-clear flags enable interrupt
809D 80A0 80A2 80A5 80A8 80AB 80AD 80B0
disable interrupt
disconnect timer pins
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
Interrupt service: OC1II handles interrupts setting fsamp pace calculating SIN_TAB pointers next sample period. 8bits only! Cycle times assume addressing non-MCU locs, addressing other locs. ;~14 interrupt from last rate
80B1 80B3 80B6
DC08 OC1I F31016 ADDD FD1018
TOC1 TOC2
Freescale Semiconductor, Inc.
80B9 80BC 80BF 80C2 80C4 80C6 80C8 80CA 80CC 80CE 80D1 80D3 80D4 80D6 80D9 80DB 80DC 80DE
FC1016 C30133 FD1016 DC00 D304 DD04 DC02 D306 DD06 CE80F3 D604 A600 CE80F3 D606 AB00
ADDD ADDD ADDD LDAB LDAA LDAB ADDA RORA CLRA ADDD ELSE ENDIF
TOC1 #TSAMP TOC1 ACFX ACFX ACFY ACFY #SIN_TAB ACFX #SIN_TAB ACFY
accum tone
accum tone
lookup tone
lookup tone
tone bits
BIT8
80DF 80E0 80E1 80E4
C3001E DD08
#TMIN
slower method d/a) TMIN save next sample quick method( d/a)
80E6 80E8 80EA 80EB 80ED 80EF 80F2
DE0A 2703 DF0A 86C0:03 LDAA B71023 STAA
tontimer tontimer #OC1F|OC2F TFLG1
update tone duration done, ;~12 (BIT8 false) (BIT8 true) AN1771
More Information This Product, www.freescale.com
MOTOROLA
Application Note Listings
HC12 Listing
Setup: 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 timer inits 0820 0822 0824 0826 0828 082A 082C 082E 0830 0832 0834 0837 8600 5A80 8680 5A8A 8680 5A86 8608 5A8D 8680 5A8C CC0871 7C0B20 LDAA STAA LDAA STAA LDAA STAA LDAA STAA LDAA STAA TIOS #EDG7B TCTL3 #TEN TSCR #TCRE TMSK2 #C7I TMSK1 #tc7ii tc7vec falling edge enable timer
Freescale Semiconductor, Inc.
init interrupt vector
init channel 083A 8600 083C 5A40 083E 790041 0841 790054 0844 86FF 0846 5A4C LDAA STAA LDAA STAA PWCLK PWPOL PWCTL #255 PWPER0 sample rate ;PCKA1 separate PWMs, prescale clock PWM0 ;non-center,PWM runs wait pulse period (chA period) (255 (31.25 kHz) this exactly Fsamp enable PWM0
0848 084A 084C 084F 0851 0853
8601 5A42 CC0000 8680 5A50 10EF
LDAA STAA LDAA STAA
#PWEN0 PWEN #$80 PWDTY0
init register
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
Normal Table Lookup
Interrupt service: 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 tc7ii sets fsamp rate calculates SIN_TAB pointers next sample period. interrupt accum tone accum tone lookup tone lookup tone tone bits save update tone duration? done, decrement tone timer
Freescale Semiconductor, Inc.
0871 0873 0875 0878 087B 087E 0881 0884 0887 088A 088D 088F 0891 0894 0897 0899 089B 089C 089E 08A1 08A3 08A4 08A7
8680 tc7iiLDAA 5A8E STAA FC0800 F30806 ADDD 7C0806 FC0802 F30808 ADDD 7C0808 CE0D00 F60806 LDAB 1AE5 A600 LDAA CE0D00 F60808 LDAB 1AE5 AB00 ADDA RORA 5A50 STAA FE0804 2704 7E0804
#C7F TFLG1 ACFX ACFX ACFY ACFY #SIN_TAB ACFX #SIN_TAB ACFY PWDTY0 tontimer tontimer
Interpolated Table Lookup
Interrupt service: 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 tc7ii sets fsamp rate calculates SIN_TAB pointers next sample period. interrupt accum tone accum tone
0D4E 0D50 0D52 0D55 0D58 0D5B 0D5E 0D61
8680 tc7ii LDAA 5A8E STAA FC0800 F30806 ADDD 7C0806 FC0802 F30808 ADDD 7C0808
#C7F TFLG1 ACFX ACFX ACFY ACFY
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Listings
1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393
interpolate lookup goes here INCLUDE "LOOKUP.ASM" ;~20 INCLUDE "INTERP.ASM" ;~45 interpolate table lookup code Adds cycles over standard version uses byte sine table. 0D64 0D67 0D68 0D69 0D6A 0D6C 0D6F 0D71 0D73 0D76 0D79 0D7C 0D7D 0D7E 0D7F 0D81 0D84 0D86 0D88 0D8B FC0806 B781 CE0D9B 1AE5 B781 183D00 7A080A FC0808 B781 CE0D9B 1AE5 B781 183D00 BB080A LSRD LSRD LSRD STAA LSRD LSRD LSRD ADDA ACFX move radix (tone calculate table address fractional phase interpolate move radix (tone calculate table address fractional phase interpolate tone
Freescale Semiconductor, Inc.
#SIN_TAB temp ACFY
#SIN_TAB temp
lookup, value 0D8E 0D8F 0D91 0D94 0D96 0D97 0D9A 5A50 FE0804 2704 7E0804 RORA STAA bits save update tone duration? done, decrement tone timer tontimer (~95 interpolate version) PWDTY0 tontimer
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
HC12 Listing
Setup: 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 timer inits 0820 0822 0824 0826 0828 082A 082C 082E 0830 0832 0834 0837 0839 083C 8680 5A80 8680 5A86 8608 5A8D 8680 5A88 8680 5A8C CC0400 5C9E CC0870 7C0B20 LDAA STAA LDAA STAA LDAA STAA LDAA STAA LDAA STAA #IOS7 TIOS #TEN TSCR #TCRE TMSK2 #OM7 TCTL1 #C7I TMSK1 #1024 #tc7ii tc7vec
Freescale Semiconductor, Inc.
7.8125 fsamp
init port 083F 0841 0843 0845 0847 0849 084B 084D 084F 0851 86FF 5AAF 86FF 5A03 86FF 5A02 8606 5A00 8680 5AAE LDAA STAA LDAA STAA LDAA STAA LDAA STAA LDAA STAA #$FF DDRT #$FF DDRB #$FF DDRA #$06 PORTA #DACXFR PORTT
0853 10EF
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Listings
Interrupt service: 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 086C 086E 0870 0872 0874 0876 0878 0879 087B 087D 0880 0883 0886 0889 088C 088F 0892 0895 0897 0899 089C 089F 08A1 08A3 08A4 08A6 08A8 08AA 08AB 08AC 08AE 08B0 08B3 08B5 08B6 08B9 tc7ii sets fsamp rate calculates SIN_TAB pointers next sample period. bits only! #C7F TFLG1 #OM7+OL7 TCTL1 #FOC7 CFORC #OM7 TCTL1 ACFX ACFX ACFY ACFY #SIN_TAB ACFX #SIN_TAB ACFY PORTB #$FD PORTA bits write data port strobe write
8680 tc7iiLDAA 5A8E STAA 86C0 LDAA 5A88 STAA 8680 LDAA 5A81 STAA 8680 LDAA 5A88 STAA FC0800 F30806 ADDD 7C0806 FC0802 F30808 ADDD 7C0808 CE0D00 F60806 LDAB 1AE5 A600 LDAA CE0D00 F60808 LDAB 1AE5 AB00 ADDA RORA 5A01 STAA 84FD ANDA 5A00 STAA 8A02 ORAA 5A00 STAA FE0804 2704 7E0804
reset XFER
Freescale Semiconductor, Inc.
accum tone
accum tone
lookup tone
lookup tone
#DACS PORTA tontimer tontimer
update tone duration done,
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
TELCO Subroutines
1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 0F42 04B0 0258 000D 0B78 0E6B 0032 0E6B 0FBA 3D09 7A12 0032 0FBA 1451 0F42 0F42 halfsec toneon toneoff dialow dialhi ringcount ringlow ringhi ringon ringoff busycount busylow busyhi busyon busyoff doapp following demonstration code sends test_str string DTMF signals. Tone on/off times 40ms/40ms. character received aborts 0823 0823 0826 0829 082C 082F 0832 TESTDTMF CC0000 7C0806 7C0808 7C0804 7C0800 7C0802 3906 1200 2936 3691 3691 4026 15625 31250 4026 5201 3906 3906 time Fsamp time Fsamp time Fsamp line dial tone dial high tone ring cycles ring tone ring high tone ring ring toff busy cycles busy tone busy high tone busy busy toff
Freescale Semiconductor, Inc.
0823
ACFX ACFY tontimer
clear phase accumulator clear phase accumulator clear tone timer init tone (off) init tone (off)
send dial tone 0835 0837 8644 LDAA 1608E9 #'D' CPsub send some DTMFs 083A 083D CE085C 072B #test_str DTMFstr test string send send ring back 083F 0841 8652 LDAA 1608E9 #'R' CPsub
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Listings
1084 send busy 1085 1086 0844 8642 LDAA #'B' 1087 0846 1608E9 CPsub 1088 1089 0849 CC0000 1090 084C 7C0800 1091 084F 7C0802 1092 0852 86C0 LDAA #$C0 1093 0854 7A0806 STAA ACFX 1094 0857 7A0808 STAA ACFY 1095 085A 20FE stop execution 1096 1097 1098 085C 392C35353537test_str "9,5557579,,,,",EOL 1099 1100 DTMFstr sends string pointed 1101 DTMF digits until detected. 1102 USES: A,B,X,Y 1103 1104 086A A600 DTMFstr LDAA string character 1105 086C 1106 086D 810D CMPA #EOL string? 1107 086F 2704 yes, 1108 0871 0703 ASCdtmf send tone 1109 0873 24F5 DTMFstr interrupt, 1110 0875 1111 1112 1113 ASCdtmf converts ASCII DTMF frequencies 1114 times t-on. NON-DTMF characters result 1115 pause. DTMF characters are: {0-9}, {A-D}, {*}, 1116 USES: A,B,Y 1117 1118 0876 ASCdtmf CLRB 1119 0877 CD08C9 #ASC_T init table index 1120 087A A140 CMPA table? 1121 087C 270B gotASC yes, 1122 087E 1123 087F INCB 1124 0880 C10F CMPB #maxDTMF table? 1125 0882 23F6 1126 0884 CC0F42 #halfsec delay 1127 0887 2034 waitone 1128 1129 0889 gotASC PSHB save later 1130 088A C403 ANDB #$03 mask tone 1131 088C LSLB construct index (*2) 1132 088D CD08E1 #DTMFhi 1133 0890 19ED 1134 0892 ED40 tone AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc. Application Note
1135 0894 7D0800 1136 0897 PULB 1137 0898 C40C ANDB #$0C mask tone 1138 089A LSRB hinyb 1139 089B CD08D9 #DTMFlo 1140 089E 19ED 1141 08A0 ED40 tone 1142 08A2 7D0802 1143 08A5 CC04B0 #toneon time 1144 08A8 7C0804 tontimer 1145 08AB 1146 08AC FC0804 tontimer 1147 08AF 26FA done yet, 1148 08B1 CC0000 tones 1149 08B4 7C0800 1150 08B7 7C0802 1151 08BA CC0258 #toneoff time 1152 08BD 7C0804 waitone tontimer 1153 08C0 1154 08C1 FC0804 tontimer 1155 08C4 26FA done yet, 1156 08C6 10FE 1157 08C8 1158 1159 Table ASCII DTMF digits 1160 1161 08C9 313233413435 ASC_T "123A456B789C*0#D" 1162 000F maxDTMF 1163 1164 table high tones each DTMF character. 1165 Tone values calculated from: 1166 (Fgen 65536) Fsamp Fgen 8.3886 1167 1168 08D9 16D5 DTMFlo 5845 1169 08DB 193B 6459 1170 08DD 1BEB 7147 1171 08DF 1ED6 7894 1172 1173 08E1 279E DTMFhi 10142 1209 1174 08E3 2BC7 11207 1336 1175 08E5 3066 12390 1477 1176 08E7 3583 13699 1633 1177 1179 1180 1181 CPsub uses select following call 1182 progress tone pairs: 1183 Signal state 1184 dial tone max) 1185 ring back tone (100 rings) 1186 Busy tone burst cycles) AN1771 More Information This Product, www.freescale.com MOTOROLA
Freescale Semiconductor, Inc.
Application Note Listings
1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 AN1771
USES: A,B,Y 08E9 08EB 08ED 08EF 08F1 08F4 08F7 08FA 08FD 0900 0903 0904 0906 0908 090A 090C 090F 0911 0913 0915 0918 091B 091E D6C4 CPsub D6C7 8144 262E CC0B78 7C0800 CC0E6B 7C0802 CCFFFF 7C0804 waitall 96C4 8520 1401 2607 FC0804 26F2 10FE 96C7 killall CC0000 7C0800 7C0802 LDAB LDAB CMPA LDAA BITA LDAA SC0SR1 SC0DRL #'D' nodial #dialow #dialhi #$FFFF tontimer SC0SR1 #RDRF killall tontimer waitall SC0DRL turn tones preset detect flag chr, keep goin'. clear detect flag preclear dial tone? tones
maximum duration
Freescale Semiconductor, Inc.
091F 8152 nodial CMPA #'R' 0921 262D noring 0923 8632 LDAA #ringcount 0925 7A080B STAA count 0928 CC0E6B ringlp #ringlow 092B 7C0800 092E CC0FBA #ringhi 0931 7C0802 0934 CC3D09 #ringon 0937 7C0804 tontimer 093A 07C7 waitall 093C 2511 CPexit 093E CC7A12 #ringoff 0941 7C0804 tontimer 0944 07BD waitall 0946 2507 CPexit 0948 73080B count 094B 26DB ringlp 094D 10FE 094F CPexit 0950 0952 0954 0956 10FE 8142 26F9 8632 noring CMPA LDAA #'B' CPexit #busycount
ring-back tone? ring counter tones
ring time wait. SCI, quit ring time wait again. SCI, quit done yet? detected
preclear detect busy tone? ring counter
MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 0958 7A080B STAA count 095B CC0FBA busylp #busylow 095E 7C0800 0961 CC1451 #busyhi 0964 7C0802 0967 CC0F42 #busyon 096A 7C0804 tontimer 096D 0794 waitall 096F 25DE CPexit 0971 CC0F42 #busyoff 0974 7C0804 tontimer 0977 078A waitall 0979 25D4 CPexit 097B 73080B count 097E 26DB busylp 0980 10FE 0982
tones
ring time wait. SCI, quit ring time wait again. SCI, quit done yet? detected
Freescale Semiconductor, Inc.
Sine Table Generator Program
#include <stdio.h> #include <math.h> This program constructs sine table specified user. min, max, size provided time with output going display file named "SINE.ASM." Table entries defined following: sin,x int(MIDP (swing (360 256))) where table offset
FILE *fi; float 255; float float size 256; const float 3.141592654; float MIDP, SWING, void main(void)
AN1771 More Information This Product, www.freescale.com MOTOROLA
Application Note Listings
printf("Sine table compiler, v1.00\n"); printf("Sending output \"SINE.ASM\".\n"); fopen("SINE.ASM", "w")) NULL) table parameters printf("Enter table scanf("%f", &size); printf("Enter table scanf("%f", &min); printf("Enter table scanf("%f", &max); SWING (max min) MIDP SWING; size (256 max): value (0-255): value (0-255):
Freescale Semiconductor, Inc.
descriptor header .asm file printf("; sine lookup table\n"); fprintf(fi, sine lookup table\n"); printf("; size %5.0f, %5.0f, %5.0f \n", size, min, max); fprintf(fi,";size %5.0f,min %5.0f,max %5.0f \n",size,min, max); printf("; SWING %f\n",MIDP,SWING); fprintf(fi, SWING %f\n",MIDP,SWING); fprintf("SIN_TAB\n");// place table lable table data assembly source. while size) MIDP (SWING (sin size))); printf("\tFCB\t");// display source printf("%5.0f",y); printf("\n"); fprintf(fi, "\tFCB\t");// write source file fprintf(fi, "%5.0f",y);// casm0x "%5.0ft" fprintf(fi, "\n"); x++; fclose(fi); printf("Done.\n"); else printf("File error.\n");
AN1771 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
Freescale Semiconductor, Inc.
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
reach USA/EUROPE/Locations Listed: Motorola Literature Distribution, P.O. 5405, Denver, Colorado 80217, 1-800-441-2447 1-303-675-2140. Customer Focus Center, 1-800-521-6274 JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan. 03-5487-8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd., Ping Industrial Park, Ting Road, N.T., Hong Kong. 852-26629298 MfaxTM, Motorola Back System: RMFAX0@email.sps.mot.com; http://sps.motorola.com/mfax/; TOUCHTONE, 1-602-244-6609; Canada ONLY, 1-800-774-1848 HOME PAGE: http://motorola.com/sps/
Mfax trademark Motorola, Inc. Motorola, Inc., 1998
AN1771/D
More Information This Product, www.freescale.com
Other recent searches
SLK2511 - SLK2511 SLK2511 Datasheet
MX26C1000A - MX26C1000A MX26C1000A Datasheet
LT5528 - LT5528 LT5528 Datasheet
LFCN-3000 - LFCN-3000 LFCN-3000 Datasheet
BUT12 - BUT12 BUT12 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
