AN1757 Freescale Semiconductor, Inc. Unique Silicon Serial N

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AN1757 Freescale Semiconductor, Inc. Unique Silicon Serial N

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AN1757
Freescale Semiconductor, Inc.
Unique Silicon Serial Number HC05
Mark Glenewinkel Field Applications Engineering Consumer Systems Group Austin, Texas
Introduction
Many embedded systems require serial numbers help track printed circuit boards, identify nodes network, register product, provide security access. This application note describes interface between HC05 microcontroller (MCU) DS2401 silicon serial number from Dallas Semiconductor. DS2401 provides factory-lasered, 64-bit number that unique each device. address structure uses 1-Wireinterface that reduces overhead control, data, address, power pins. DS2401 combines these functions. 1-Wire interface also used with DS2502, device similar DS2401. addition 64-bit number, 1024 bits user-programmable EPROM. memory residing DS2502 allows user program device hold information about node system. Typical applications include storage calibration constants, security access codes, system revision status.
1-Wire trademark Dallas Semiconductor.
Motorola, Inc., 1998
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Freescale Semiconductor, Inc. Application Note
Circuitry example code included demonstrate interface between DS2401 HC05. Although example code given DS2502, serial drivers designed 1-Wire make easy (application programming interface) user application-specific functions utilize DS2502's additional features.
DS2401/DS2502 Features
Freescale Semiconductor, Inc.
DS2401 Features
DS2401 provides these features: Unique, factory-lasered tested 64-bit registration number ensures that parts alike. Multiple DS2401s identified Reduces control, address, data, power single data Directly connects single port Communicates 16.3 Kbits second Zero standby power required Low-cost TO-92, SOT-223, 6-pin TSOC packages 1-Wire communicates over wide voltage range volts volts from
DS2502 Features
addition those features DS2401, DS2502 provides these features: 1024 bits user programmable EPROM EPROM partitioned into four 256-bit pages randomly accessing packetized data Each memory page permanently write-protected prevent unwanted tampering device. Device allows user program additional EPROM bits without disturbing existing data.
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Application Note Description
Description
DS2401 64-bit lasered that unique each device. first eight bits signify 1-Wire Family member being addressed. next bits unique each DS2401 device, allowing more than trillion different devices field. last eight bits (cyclic redundancy check) first bits. 64-bit retrieved using 1-Wire bus. 1-Wire allows multiple DS2401s bus. 1-Wire network controller circuitry search algorithm embedded determine identity each device bus.
Freescale Semiconductor, Inc.
DS2401 Hardware Interface
Pinout Descriptions
DS2401
Figure DS2401 TO-92 Pinout bidirectional DATA only interface microcontroller. Parasitic power derived from required pullup resistor DATA pin. other power input needed DS2401. data transceived between master DS2401 read written least significant (LSB) first.
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DATA
Freescale Semiconductor, Inc. Application Note
Block Diagram
PARASITIC POWER
1-WIRE DATA
1-WIRE FUNCTION CONTROL
64-BIT LASERED
Freescale Semiconductor, Inc.
Figure DS2401 Block Diagram 1-Wire Interface Figure shows hardware interface 1-Wire bus. single master more slave devices. cases, DS2401 slave. important that each device able drive appropriate time. Thus, each device must have open drain three-state outputs. maximum rate allowed 16.3 kbits second. idle state high. reason transaction suspended, must left idle state transaction resume later time. held more than more slave devices could reset. pullup resistor required ensure proper idling provide parasitic power DS2401.
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Application Note DS2401 Hardware Interface
MASTER PORT DIRECTION DATA DS2401 1-WIRE PORT
Freescale Semiconductor, Inc.
Figure 1-Wire Interface
1-Wire Timing
1-Wire protocol divided into types transactions. These are: Reset presence pulse Write read data
When device idling high state, master starts communicating DS2401 issuing reset pulse. master must drive least After this time, master turns port into high impedance input allows pullup resistor bring back high. Over next master reads looking low. DS2401 active ready communicate, will drive low. master does receive presence pulse, further communication cannot occur. Figure shows reset presence pulse timing.
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Freescale Semiconductor, Inc. Application Note
MASTER VPullup VPullup tRSTL
RESISTOR
DS2405
RESISTOR tRSTH
tPDL tPDH
Freescale Semiconductor, Inc.
tRSTL tRSTH INFINITE, INCLUDES RECOVERY TIME tPDH tPDL
Figure Reset Presence Pulse Timing After presence pulse received, data communicated between master slave. transceived specific time slots that initiated master sending falling edge sync pulse. sync pulse defines start time slot that least long. After this time slot finished, recovery time least required give DS2401 time respond next being transmitted. time slot recovery time together which defines maximum communication speed 16.3 kbits second. Three different time slots generated. They are: Write-one time slot Write-zero time slot Read data time slot
timing diagrams these time slots shown Figure Figure Figure
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Application Note DS2401 Hardware Interface
MASTER VPullup VPullup tLOW1 tSlot tLOW1 tREC INFINITE
RESISTOR
DS2405 SAMPLING
tSlot
tREC
Freescale Semiconductor, Inc.
Figure Write-One Time Slot
MASTER VPullup tLOW0 tLOW0 tSlot tREC INFINITE tSlot tREC DS2405 SAMPLING VPullup RESISTOR
Figure Write-Zero Time Slot
MASTER VPullup VPullup tLOWR tRDV tSlot tSlot tLOWR tRelease tREC INFINITE tRDV tRelease tREC MASTER SAMPLING RESISTOR DS2405 RESISTOR
Figure Read Data Time Slot
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Freescale Semiconductor, Inc. Application Note
step-by-step example protocol needed read DS2401's 64-bit code master transmits reset pulse. master waits presence pulse from DS2401. Once detected, step master sends read command DS2401. code read %00110011 sent first.
Freescale Semiconductor, Inc.
Write-one times Write-zero times Write-one times
Write-zero times After read function been sent, DS2401 ready transmit 64-bit code contents bus. master sends read data time slots read each store them memory. transaction complete. issue another command, DS2401 must reset again.
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Application Note DS2401 Software Interface
DS2401 Software Interface
transaction sequence access DS2401 over 1-Wire illustrated Figure
1-WIRE INITIALIZATION
Freescale Semiconductor, Inc.
1-WIRE FUNCTION READ SEARCH MATCH SKIP
READ DATA
Figure DS2401 Transaction Sequence Initialization transactions start with device initialization routine. This accomplished master sending reset pulse then reading presence pulse from DS2401.
Function Commands Read
Once master detected presence pulse, commands issued. functions eight bits long. This command allows master read DS2401's unique 64-bit code. This command used only there single DS2401 bus. Otherwise, data collision will occur. 1-Wire devices have this 64-bit lasered ROM. first eight bits signify 1-Wire Family. next bits unique DS2401. last eight bits (cyclic redundancy check) first bits. Consult DS2401 data sheet more detail CRC. When system many devices bus, master know number devices their 64-bit codes. This command useful when reading 64-bit code devices bus. search command uses tedious process
Search
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Freescale Semiconductor, Inc. Application Note
elimination determine identity devices bus. threestep process used each 64-bit code. steps are: master reads position 64-bit code. master reads complement position. With this information, master writes match those devices that have same value. This turn deselects other devices that have matched bit. This process repeated until devices eventually eliminated except device that matches exactly 64-bit code that just transmitted. Match Skip complete protocol 1-Wire includes command bypass 64-bit code command match 64-bit code. Since DS2401 contains only 64-bit with additional data fields functions, these commands applicable DS2401.
Freescale Semiconductor, Inc.
Memory
DS2401 memory other than 64-bit code. code shown Figure
8-BIT CODE
48-BIT SERIAL NUMBER
8-BIT FAMILY CODE ($05)
Figure DS2401 Memory
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Application Note MC68HC705C8A Hardware Interface
MC68HC705C8A Hardware Interface
This application note uses MC68HC705C8A (C8A) member HC05 Family test interface between DS2401 HC05. most popular members HC05 Family. MC68HC705C8A has: 7744 bytes erasable programmable read-only memory (EPROM) bytes (input/output) pins Seven input-only pins Peripherals Serial peripheral (SPI) Serial communications interface (SCI) 16-bit capture/compare timer
Freescale Semiconductor, Inc.
schematic used testing DS2401 interface MMEVS development system shown Figure port used transmit receive data DATA DS2401. further information HC705C8A, consult MC68HC705C8A Technical Data.
DS2401
DATA
MMEVS INTERFACE
Figure DS2401 Interface Test Circuit
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Freescale Semiconductor, Inc. Application Note MC68HC705C8A Software Interface
Input/output driving manipulation process toggling pins with software instructions create certain hardware peripheral. HC05 provides special instructions specifically manipulate single pins. serial transmission driver been into three subroutines:
Freescale Semiconductor, Inc.
RESET_PULSE Sends reset pulse DS2401 waits presence pulse. presence pulse found, routine goes into error loop. Takes byte data creates eight time slots either write-one write-zero, depending being transmitted. Transmits eight read data time slots. Each read shifted into byte RAM.
flowcharts DS2401 serial drivers shown Figure Figure Figure flowchart main test routine Figure step-by-step sequence tests Read ROM. This command asks DS2401 64-bit code bus. loop retrieve total eight bytes. Store each byte into buffer DS2401_ROM. location DS2401_ROM+7 will have contents code. location DS2401_ROM will have contents code. This routine demonstrates interface software needed communicate with DS2401. Although used, HC05 device could utilize this interface code. Minor adjustments port pins memory maps might necessary. assembly code test routine provided Code Listing.
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Application Note Development Tools
Development Tools
interface created tested using these development tools: M68MMPFB0508 Motorola MMEVS platform board M68EM05C8A Motorola series emulation module Version 1.02 Editor, assembler, debugger Microcomputer Systems
Freescale Semiconductor, Inc.
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Freescale Semiconductor, Inc. Application Note Flowcharts Serial Drivers
RESET_PULSE
DATA START RESET PULSE
WAIT LOOP,
Freescale Semiconductor, Inc.
MAKE DATA INPUT
CLEAR TEST AccA LOOP
DATA DELAY LOOP
PRESENCE PULSE DETECTED TEST
DECREMENT AccA
AccA
DS2401 DEAD TEST YES, DS2401 ALIVE DATA MAKE DATA OUTPUT ERROR LOOP
RETURN FROM
Figure RESET_PULSE Subroutine Flowchart
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Application Note Flowcharts Serial Drivers
COUNTER 8-BIT TRANSMIT
DATA START TIME SLOT
SHIFT RIGHT BUS_WRITE CARRY BUS_WRITE
Freescale Semiconductor, Inc.
CARRY DATA
DATA
DRIVE DATA
DATA
DECREMENT
YES, TRANSMISSION DONE RETURN FROM
Figure Subroutine Flowchart
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Freescale Semiconductor, Inc. Application Note
COUNTER 8-BIT TRANSMIT
DATA START TIME SLOT
MAKE DATA INPUT
Freescale Semiconductor, Inc.
WAIT DS2401 DRIVING DATA
DATA CARRY DATA ROTATE RIGHT BUS_READ PUTS CARRY INTO BUS_READ
WAIT COMPLETE TIME SLOT
DATA MAKE DATA OUTPUT
DECREMENT
YES, RECEIVED 8-BIT DATA RETURN FROM
Figure Subroutine Flowchart
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Application Note Flowcharts Serial Drivers
START
INITIALIZE PORTA DATA DIRECTION PORTA
TRANSMIT RESET_PULSE
READ_ROM
Freescale Semiconductor, Inc.
COUNTER
READ BYTE, BUS_READ
STORE BUS_READ DS2401_ROM+COUNTER OFFSET
DECREMENT COUNTER
COUNTER
YES, LOOP DONE CODE BEEN INTO DS2401_ROM BUFFER
INFINITE LOOP
Figure Flowchart Main Test Routine
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Freescale Semiconductor, Inc. Application Note Code Listing
File name: DS2401.ASM Example Code MC68HC705C8A Interface Dallas DS2401 Silicon Serial Number Ver: Date: June 1998 Author: Mark Glenewinkel Motorola Field Applications Consumer Systems Group Assembler: 1.02 code explanation flow charts, please consult Motorola Application Note "Add Unique Silicon Serial Number HC05" Literature AN1757/D NOTE: timing functions based 2MHz internal clock SYSTEM DEFINITIONS EQUATES Internal Register Definitions PORTA ;PortA DDRA ;data direction PortA Application Specific Definitions DATA DATA_DIR Function Commands READ_ROM MATCH_ROM SEARCH_ROM SKIP_ROM Memory Definitions EPROM RESET
Freescale Semiconductor, Inc.
;PortA, data signal ;PortA Data DATA signal
;read ;match ;search ;skip
$160 $1FFE
;start EPROM ;start ;vector reset
VARIABLES BUS_WRITE ;storage byte write BUS_READ ;storage byte read TEST ;test result presence DS2401_ROM ;storage DS2401 64-bit code
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Application Note Code Listing
COUNTER
;DS2401_ROM ;DS2401_ROM+7 ;temporary counter
MAIN ROUTINE EPROM ;start begining EPROM Intialize Ports START #$01 ;init PORTA PORTA #$01 ;config outputs PORTA DDRA
Freescale Semiconductor, Inc.
Issue "READ ROM" command RESET_PULSE #READ_ROM BUS_WRITE ROM_Cycle COUNTER BUS_READ COUNTER DS2401_ROM,x COUNTER ROM_Cycle
;send reset
;send Read
;set counter bytes ;receive data from byte
;store byte read into DS2401_ROM ;loop done?
DUMMY
DUMMY
;test sequence over
SUBROUTINES Routine creates reset pulse then checks presence pulse from DS2401 presence pulse, goto error loop
Create greater then 480usec reset pulse RESET_PULSE bclr DATA,PORTA #160T deca bclr DATA,DDRA
wait 481usec ;DATA input
Wait greater than 480usec, look presence pulse, TEST will equal presence detected TEST #69T ;wait 483usec brset DATA,PORTA,J3 DATA=1? bset 0,TEST DATA=0, presence detected AN1757 MOTOROLA More Information This Product, www.freescale.com
Freescale Semiconductor, Inc. Application Note
deca TEST
branch same time decrement Acca done?
Freescale Semiconductor, Inc.
Check TEST, TEST=$01, then TEST=$00, then goto error routine brset 0,TEST,J5 ERROR3 ERROR3 bset DATA,PORTA bset DATA,DDRA
;TEST ;presence pulse detected, error ;TEST passed, DATA=1 ;DATA output
Routine takes contents BUS_WRITE transmits serially serially bus, first ;set counter Drive DATA=0 9usec WRITE bclr bset bclr
DATA,PORTA BUS_WRITE DATA,PORTA DATA,PORTA
DATA=0, start time slot Carry DQ=1 branch clock_it ;5DQ=0 ;3evens
this point, 10.5usec expired either being transmitted DATA must wait least 49.5usec, routine below 52usec #17T deca Make sure DATA=1, then wait more than 1usec recovery time bset DATA,PORTA DATA=1 decx WRITE bits transmitted? ;return from
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Application Note Code Listing
Routine clocks read data from DATA, first contents BUS_READ ;set counter Drive DATA=0 1µsec, READ bclr bclr
DATA,PORTA DATA,DDRA
DATA=0, start time slot make DATA input
Freescale Semiconductor, Inc.
Wait usec, then sample DATA deca read data wait 50µsec brclr DATA,PORTA,J10 BUS_READ
carry DATA carry into BUS_READ
this point, 15.5µsec expired since time slot started must wait least 44.5µsec, routine below 46µsec #15T deca Make sure DATA=1, then wait more than 1usec recovery time bset DATA,PORTA DATA=1 bset DATA,DDRA make DATA output decx READ bits received? ;return from
VECTOR TABLE RESET START
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Freescale Semiconductor, Inc. Application Note References
MC68HC705C8A Technical Data, Motorola document order number MC68HC705C8A/D, 1996. M68HC05 Applications Guide, Motorola document order number M68HC05AG/AD, 1996. DS2401 Datasheet, Dallas Semiconductor, 1997.
Freescale Semiconductor, Inc.
DS2502 Datasheet, Dallas Semiconductor, 1997.
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Application Note References
Freescale Semiconductor, Inc.
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Freescale Semiconductor, Inc. Application Note
Freescale Semiconductor, Inc.
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
reach USA/EUROPE/Locations Listed: Motorola Literature Distribution, P.O. 5405, Denver, Colorado 80217, 1-800-441-2447 1-303-675-2140. Customer Focus Center, 1-800-521-6274 JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan. 03-5487-8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd., Ping Industrial Park, Ting Road, N.T., Hong Kong. 852-26629298 MfaxTM, Motorola Back System: RMFAX0@email.sps.mot.com; http://sps.motorola.com/mfax/; TOUCHTONE, 1-602-244-6609; Canada ONLY, 1-800-774-1848 HOME PAGE: http://motorola.com/sps/
Mfax trademark Motorola, Inc. Motorola, Inc., 1998
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AN1757 Freescale Semiconductor, Inc. Unique Silicon Serial N

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