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This application note guide help current ATmega128 users convert exist


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AVR096: Migrating from ATmega128 AT90CAN128
This application note guide help current ATmega128 users convert existing designs AT90CAN128. information given will also help users migrating from ATmega microcontroller AT90CAN128. Additionally, electrical characteristics AT90CAN128 different than those ATmega128. Check datasheets both these products detailed information.
main features ATmega128 have been carried over AT90CAN128.
Advance RISC Architecture Flash 2PROM with Software Security internal external Watchdog Timer, 8-bit Timer 8-bit Real Time Timer 16-bit Timers 8-channel 10-bit Analog Comparator Dual USART, External Interrupts POR/PFD Sleep Modes Operating Voltage from 2.7V 5.5V Maximum Frequency range)
8-bit Microcontroller Application Note
more important evolution full-CAN (Controller Area Network) peripheral implementation AT90CAN128. Other features have been added such three General Purpose Registers (one them bit-accessible) Digital Input Disable Registers analog I/Os. compatible with generation 8-bit microcontrollers (i.e. ATmega169), register mapping been re-modelled. This distribution restructures addressing improve coherence thus privilege readability. AT90CAN128 also some improvements Timers, Analog Digital Converter Clocks.
4313B-AVR-03/04
Configuration
AT90CAN128 functionally compatible with ATmega128. Certain pins have been upgraded with regard their associated alternate functions, change timers/counters index voluntary removal ATmega103 compatibility.
Figure Configuration
(ADC5 TMS) (ADC5 TMS) (ADC4 TCK) (ADC6 TDO) (ADC4 TCK) (ADC7 TDI) (ADC6 TDO) (ADC7 TDI) (ADC1) (ADC3) (ADC1) (ADC0) (ADC2) (ADC0) (ADC2) (ADC3)
(AD2)
(AD0)
(AD1)
(AD0)
(AD1)
AREF
AREF
(AD3) (AD4) (AD5) (AD6) (AD7) (ALE) (A15) (A14) (A13) (A12) (A11) (A10) (A9) (A8) (RD) (WR)
(n.c.)
(AD2)
AVCC
AVCC
(AD3) (AD4) (AD5) (AD6) (AD7) (ALE)
(RXD0 PDI) (TXD0 PDO) (XCK0 AIN0) (OC3A AIN1) (OC3B INT4) (OC3C INT5) INT6) (IC3 INT7)
(RXD0 PDI) (TXD0 PDO) (XCK0 AIN0) (OC3A AIN1) (OC3B INT4) (OC3C INT5) INT6) (IC3 INT7)
INDEX CORNER
INDEX CORNER
(A15 CLKO)
ATmega128
(top view)
AT90CAN128
(top view)
(A14) (A13) (A12) (A11) (A10) (A9) (A8) (RD) (WR)
(SS) (SCK) (MOSI) (MISO) (OC0) (OC1A) (OC1B)
(SCL INT0) (TXD1 INT3) XTAL2 XTAL1 (IC1) (OC2 OC1C) (TOSC2) (TOSC1) RESET (XCK1) (T1) (SDA INT1) (RXD1 INT2) (T2)
(SS) (SCK) (MOSI) (MISO) (OC2A) (OC1A) (OC1B)
(RXCAN
(SCL INT0)
(TXD1 INT3)
XTAL2
XTAL1
(SDA INT1)
(RXD1 INT2)
(TOSC2)
(TOSC1)
(IC1)
RESET
Table Changed Pins
(OC0) (OC2/OC1C) (TOSC2) (TOSC1) (XCK1) (T1) (T2) (A15) ATmega128 AT90CAN128 (n.c.) connected (OC2A) (OC0A/OC1C) (TOSC2) (TOSC1) (XCK1/TXCAN) (T1/RXCAN) (T0) (A15/CLKO) Comments AT90CAN128 Removal ATmega103 compatibility mode. asynchronous-Real Time Timer/Counter index becomes instead synchronous 8-bit Timer/Counter index becomes instead name changes, TOSC crystal always connected Asynchronous-Real Time Timer/Counter index this timer/counter becomes instead Addition I/O's alternate functions. These alternate functions enabled once peripheral switched "ON". synchronous 8-bit Timer index becomes instead Addition Clock output (CLKO) alternate function. This alternate function enabled/disabled CKOUT fuse Fuse Byte.
AVR096
4313B-AVR-03/04
(TXCAN XCK1)
(OC0A OC1C)
(T0)
AVR096
CORE
System Clock
Sources Four sources system clock available AT90CAN128: On-chip oscillator external crystal ceramic resonator On-chip oscillator external low-frequency crystal Calibrated internal oscillator External clock
Unlike ATmega128, external network connected XTAL1 pin. Amplifier Mode XTAL1 XTAL2 input output, respectively, from inverting amplifier on-chip oscillators. ATmega128, CKOPT fuse selects between oscillator amplifier modes. CKOPT programmed, oscillator output oscillates with full rail-to-rail swing output. CKOPT unprogrammed, oscillator smaller output swing. This mode present ATmega128CAN11. Prescaler Clock Prescaler Register CLKPR ATmega128CAN11, replaces XTAL Divide Control Register XDIV. clock division factor (CLKPS[3.0] field CLKPR) number from 256. Table Clock Prescaler Select
ATmega128 XDIV[6.0] Frequency CLKPS[3.0] fCLK fSource Clock (129-d) AT90CAN128 Frequency fCLK fSource Clock fCLK fSource Clock fCLK fSource Clock fCLK fSource Clock fCLK fSource Clock fCLK fSource Clock fCLK fSource Clock fCLK Source Clock fCLK Source Clock Reserved
CLKDIV8 Fuse
fuse (CKDIV8 Fuse Byte) determines initial value clock prescaler AT90CAN128. CKDIV8 unprogrammed, prescaler initialized with "0x0". Programmed, prescaler initialized with "0x3", giving division factor start-up.
4313B-AVR-03/04
Table Clock Prescaler Initialization
ATmega128 XDIV[6.0] 0x00 Frequency fCLK fSource Clock CKDIV8 AT90CAN128 CLKPS[3.0] Frequency fCLK fSource Clock fCLK fSource Clock
Oscillator Calibration
During reset, hardware loads calibration byte into OSCCAL Register thereby automatically calibrates internal Oscillator. OSCCAL Register accessible software. ATmega128, bits OSCCAL Register used, AT90CAN128, only significant bits used. Extended Standby sleep mode ATmega128 disappears sleep mode list AT90CAN128. active clock domains wake-up sources different sleep modes does change. Table Sleep Modes
ATmega128 Sleep Mode Select SM[2.0] Idle Noise Reduction Power-down Power-save "reserved" "reserved" Standby Extended Standby "reserved"
Idem Idem Idem Idem Idem Idem Idem
Sleep Modes
AT90CAN128
Reset Logic
AT90CAN128 reset logic differs from ATmega128 Brown-Out Detection (BOD). This fuse bits (See "Fuse Bits" page 7.).
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AVR096
Table Brown-Out Detection
ATmega128 Detected level Typ. VBOT Disable Detected level Typ. VBOT Disable BODEN(1)="0" BODLEVEL(2)="0" BODEN ="0" BODLEVEL(2)="1"
AT90CAN128
Setting BODEN(1)="1"
Setting BODLEVEL[2.0](3)="111" BODLEVEL[2.0](3)="110" BODLEVEL[2.0](3) ="101" BODLEVEL[2.0](3) ="100" BODLEVEL[2.0](3)="011" BODLEVEL[2.0](3) ="010" BODLEVEL[2.0](3) ="001" BODLEVEL[2.0](3) ="000"
Notes:
BODEN: Fuse Fuse Byte ATmega128. BODLEVEL: Fuse Fuse Byte ATmega128. BODLEVEL[2.0]: Fuse Bits Extended Fuse Byte AT90CAN128. Theorical values, refer AT90CAN128 data sheet.
Interrupt Table
There additional interrupts AT90CAN128, interrupts. Timer/Counter1 interrupts have been clustered (c.f. TIMER1 COMPC interrupt). interrupts compatible 14th vector. Table Interrupt Table
Vector Program Address(2) 0x0000(1) 0x0002 0x0004 0x0006 0x0008 0x000A 0x000C 0x000E 0x0010 0x0012 0x0014 0x0016 0x0018 ATmega128 Interrupt Source External Reset pin, POR, BOR, Reset JTAG Reset External Interrupt Request External Interrupt Request External Interrupt Request External Interrupt Request External Interrupt Request External Interrupt Request External Interrupt Request External Interrupt Request T/C2 Compare Match T/C2 Timer Overflow T/C1 Capture Event T/C1 Compare Match AT90CAN128 Interrupt Source Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem
4313B-AVR-03/04
Table Interrupt Table (Continued)
Vector Notes: Program Address(2) 0x001A 0x001C 0x001E 0x0020 0x0022 0x0024 0x0026 0x0028 0x002A 0x002C 0x002E 0x0030 0x0032 0x0034 0x0036 0x0038 0x003A 0x003C 0x003E 0x0040 0x0042 0x0044 0x0046 0x0048 ATmega128 Interrupt Source T/C1 Compare Match T/C1 Timer Overflow T/C0 Compare Match T/C0 Timer Overflow Transfer Complete USART0, Complete USART0 Data Register Empty USART0, Complete Conversion Complete EEPROM Ready Analog Comparator T/C1 Compare Match T/C3 Capture Event T/C3 Compare Match T/C3 Compare Match T/C3 Compare Match T/C3 Timer Overflow USART1, Complete USART1 Data Register Empty USART1, Complete Interface Store Program Memory Ready AT90CAN128 Interrupt Source Idem T/C1 Compare Match T/C1 Timer Overflow T/C0 Compare Match T/C0 Timer Overflow Transfer Complete Error Timer Overrun Transfer Complete USART0, Complete USART0 Data Register Empty USART0, Complete Analog Comparator Conversion Complete EEPROM Ready T/C3 Capture Event T/C3 Compare Match T/C3 Compare Match T/C3 Compare Match T/C3 Timer Overflow USART1, Complete USART1 Data Register Empty USART1, Complete Interface Store Program Memory Ready
When BOOTRST Fuse programmed, device will jump Boot Loader address reset. When IVSEL MCUCR set, Interrupt Vectors will moved start Boot Flash Section. address each Interrupt Vector will then address this table added start address Boot Flash Section.
ATmega103 Compatibility
ATmega103 compatibility mode ATmega128 does exist AT90CAN128. further information, please refer "ATmega103 ATmega128 Compatibility" section ATmega128 datasheet.
AVR096
4313B-AVR-03/04
AVR096
Memory
Fuse Bits
Extended Fuse Byte valid bits Extended Fuse Byte AT90CAN128 different from those ATmega128. Table Extended Fuse Byte
ATmega128 Name M103C WDTON Description ATmega103 compatibility mode Watchdog Timer always "on" Name BODLEVEL2 BODLEVEL1 BODLEVEL0 TA0SEL (Reserved factory tests) Brown-out detector trigger level Description AT90CAN128
Fuse High Byte
Only number Fuse High Byte AT90CAN128 different from ATmega128. Table Fuse High Byte
ATmega128 Name OCDEN JTAGEN SPIEN CKOPT EESAVE BOOTSZ1 Select boot size BOOTSZ0 BOOTRST Select reset vector Idem Idem
Idem
AT90CAN128 Name Idem Idem Idem WDTON Idem Idem Idem Description Idem Idem Idem Watchdog Timer always "on" Idem
Description Enable Enable JTAG Enable serial program data downloading Oscillator option E2PROM preserved through chip erase
4313B-AVR-03/04
Fuse Byte
Bits number Fuse Byte AT90CAN128 different from those ATmega128. Table Fuse Byte
ATmega128 Name BODLEVEL BODEN SUT1 Select start-up time SUT0 CLKSEL3 CLKSEL2 Select clock source CLKSEL1 CLKSEL0 Idem Idem Idem Idem Idem Idem Description Brown-out detector trigger level Brown-out detector enable Name CKDIV8 CKOUT Idem Idem Description Divide clock start-up Clock output enable AT90CAN128
Signature Bytes
Because AT90CAN128 ATmega128 mainly differ their modules, only third byte changes. Table Signature Bytes
ATmega128 Byte Description Value Manufacturer Flash Memory Size Device 0x1E (ATMEL) 0x97 (128 0x02 Value Idem Idem 0x81 AT90CAN128
JTAG Identification Register
same reason signature bytes, only part number field changes (revision field included). Table JTAG Identification Register
ATmega128 Field Field Value Device Revision Part Number Manufacturer lsb=0) Notes: 0x0(1) 0x9702 0x0970201F 0x01E Idem Idem Register Value Field Value 0x0(1) 0x9781 0x0978101F Register Value AT90CAN128
Refer data sheets last revision field value.
AVR096
4313B-AVR-03/04
AVR096
Modules
External Memory Interface
AT90CAN128, CLKO (Clock output) been added alternate function (Port Another alternate function (external memory interface address 15). Because CLKO enabled/disabled CKOUT fuse, priority over external memory interface setting. CLKO enabled, minimum setting field External Memory Control Register XMCRB must "001" agreement with configuration.
Synchronous 8-bit Timer/Counter
Index/Name Timer/Counter2 ATmega128 becomes Timer/Counter0 AT90CAN128. features Timer/Counter maintained. locations remain unchanged (See "Pin Configuration" page
Asynchronous 8-bit Timer/Counter
Index/Name Timer/Counter0 ATmega128 becomes Timer/Counter2 AT90CAN128. features Timer/Counter maintained, especially asynchronous mode. locations remain unchanged (See "Pin Configuration" page 2.). external clock source applied (TOSC1) asynchronous operation Timer/Counter2 AT90CAN128. this configuration, (TOSC2) available standard I/O. Table Asynchronous Timer Sources
ATmega128 Source Setting Default start-up AS0(1)="0" CLKIO TOSC oscillator ext. watch crystal External clock TOSC1 Source AT90CAN128 Setting Default start-up AS2(2)="0" AS2(2)="1" AS2(2)="1" EXCLK(3)="0" EXCLK(3)="0" EXCLK(3)="1"
Asynchronous Clock
TOSC oscillator external watch crystal Notes:
AS0(1)="1"
AS0: Timer/Counter0 ASSR (ATmega128). AS2: Timer/Counter2 ASSR (AT90CAN128). EXCLK: Timer/Counter2 ASSR (AT90CAN128).
Synchronous Timer/Counter Prescaler
prescaler reset synchronous timers/counters ATmega128 named PRS321 index three timers/counters driven this prescaler. AT90CAN128, automatically name becomes PRS310.
Asynchronous Timer/Counter Prescaler
prescaler reset asynchronous timers/counter ATmega128 named PRS0 index timer/counter driven this prescaler. AT90CAN128, automatically name becomes PRS2.
4313B-AVR-03/04
feature been added AT90CAN128: auto triggering. conversion triggered automatically various sources. Auto Triggering enabled setting Auto Trigger Enable bit, ADATE ADCSRA. trigger source selected setting Trigger Select bits, ADTS ADCSRB. When positive edge occurs selected trigger signal, prescaler reset conversion started. Table Conversions
ATmega128 Mode Single conversion start Free running mode start Setting ADCS ="1" ADFR(2)="0" ADCS(1)="1" ADFR(2)="1"
AT90CAN128 Mode Single conversion start Starting with trigger source: Free running mode Starting with trigger source: Analog comparator Starting with trigger source: Ext. Int. Request Starting with trigger source: T/C0 compare match Starting with trigger source: T/C0 overflow Starting with trigger source: T/C1 compare match Starting with trigger source: T/C1 overflow Starting with trigger source: T/C1 capture event Free running mode stop Setting ADCS(1)="1" ADATE(3)="0" ADCS(1)="1" ADATE(3)="1" ADST[2.0] (4)="000" ADCS(1)="1" ADATE(3)="1" ADST[2.0] (4)="001" ADCS(1)="1" ADATE(3)="1" ADST[2.0] (4)="010" ADCS(1)="1" ADATE(3)="1" ADST[2.0](4)="011" ADCS(1)="1" ADATE(3)="1" ADST[2.0] (4)="100" ADCS(1)="1" ADATE(3)="1" ADST[2.0] (4)="101" ADCS(1)="1" ADATE(3)="1" ADST[2.0](4)="110" ADCS(1)="1" ADATE(3)="1" ADST[2.0](4)="111" ADATE(3)="0"
Free running mode stop Notes:
ADFR(2)="0"
ADCS: ADCSRA (ATmega128 AT90CAN128). ADFR: ADCSRA (ATmega128). ADATE: ADCSRA (AT90CAN128). ADST[2.0]: Bits ADCSRB (AT90CAN128).
AVR096
4313B-AVR-03/04
AVR096
Registers
space definition ATmega128 AT90CAN128 shown "Register Summary" section datasheets respectively. registers placed space from address 0x20 0xFF. locations accessed LD/LDS/LDD ST/STS/STD instructions. registers from 0x20 0x5F also accessed specific instructions 0x20 must subtracted these addresses. registers within address range 0x20 0x3F also directly bit-accessible using SBI/CBI/SBIS/SBIC instructions 0x20 must subtracted these addresses. Some status flags cleared writing logical one. Note that instructions operates such status flags this address range. Extended space from 0x60 0xFF SRAM, only instructions used.
Migrating assembler source code from ATmega128 AT90CAN128 force change assembler line register access.
Note:
Table Registers
ATmega128 Register Content
UMSEL1 USBS1 UCPOL1
AT90CAN128 Register Content
Add.
(0x9D) (0x9C) (0x9B)
Name
UCSR1C UDR1
Add.
(0xCA) (0xCE)
Name
Idem Idem Idem
UPM1 [1,0]
UCSZ1 [1,0]
Idem Idem Idem
USART1 Data Register UDRIE1 UDRE1 MPCM1 DOR1 RXC1 UPE1 TXC1 U2X1
UCSR1A
(0xC8)
UCSZ12
RXCIE1
TXCIE1
RXEN1
TCEN1
RXB81
(0x9A) (0x99) (0x98)
UCSR1B UBRR1L UBRR1H
TXB81
(0xC9) (0xCC) (0xCD)
Idem Idem Idem
Idem Idem Idem
USART1 Baud Rate Register Byte UMSEL0 USART1 Baud Rate Register High UPM0 [1,0] UCSZ0 [1,0] UCPOL0 USBS0
(0x95)
UCSR0C
(0xC2)
Idem
Idem
(0x90)
UBRR0H FOC3A FOC3B
FOC3C
USART0 Baud Rate Register High COM3C [1,0] WGM3 [1,0]
(0xC5)
Idem
Idem
(0x8C)
TCCR3C
(0x92)
Idem
Idem
(0x8B) (0x8A) (0x89) (0x88)
TCCR3A TCCR3B TCNT3H TCNT3L
COM3A [1,0] ICNC3 ICES3
COM3B [1,0]
(0x90) (0x91) (0x95) (0x94)
Idem Idem Idem Idem
Idem Idem Idem Idem
WGM3 [3,2]
CS3[2.0]
T/C3 Counter Register High Byte T/C3 Counter Register Byte
4313B-AVR-03/04
Table Registers (Continued)
ATmega128 Register Content
AT90CAN128 Register Content
OCF3A OCF1A OCIE3A OCIE1A
Add.
(0x87) (0x86) (0x85) (0x84) (0x83) (0x82) (0x81) (0x80)
Name
OCR3AH OCR3AL OCR3BH OCR3BL OCR3CH OCR3CL ICR3H ICR3L
Add.
(0x99) (0x98) (0x9B) (0x9A) (0x9D) (0x9C) (0x97) (0x96) (0x6F)
Name
Idem Idem Idem Idem Idem Idem Idem Idem TIMSK1
T/C3 Output Compare Register High Byte T/C3 Output Compare Register Byte T/C3 Output Compare Register High Byte T/C3 Output Compare Register Byte T/C3 Output Compare Register High Byte T/C3 Output Compare Register Byte T/C3 Input Capture Register High Byte T/C3 Input Capture Register Byte
Idem Idem Idem Idem Idem Idem Idem Idem OCF3C OCF1C OCIE3C OCIE1C OCF3B OCF1B OCIE3B OCIE1B TOIE1 TOV3 TOV1 TOIE3 ICIE1
OCIE3B
OCIE3C
(0x7D)
ETIMSK
OCIE1C
OCIE3A
TOIE3
ICIE3
(0x71)
TIMSK3
ICIE3
OCF3B
0x16-(0x36) OCF3C OCF1C TOV3
TIFR1
ICF1
(0x7C)
ETIFR
OCF3A
ICF3
0x18-(0x38)
TIFR3
ICF3
(0x7A)
TCCR1C
FOC1C
FOC1A
FOC1B
(0x82)
Idem
Idem
(0x79) (0x78)
OCR1CH OCR1CL TWINT
T/C1 Output Compare Register High Byte T/C1 Output Compare Register Byte TWSTO TWSTA TWWC TWEN TWEA TWIE
(0x8D) (0x8C)
Idem Idem
Idem Idem
(0x74) (0x73) (0x72)
TWCR TWDR TWAR
(0xBC) (0xBB)
Idem Idem Idem
Idem Idem Idem
Data Register TWA[6.0] TWGCE
(0xBA)
(0x71) (0x70) (0x6F) (0x6D)
TWSR TWBR OSCCAL XMCRA
TWS[7.3]
TWPS [1,0]
(0xB9) (0xB8) (0x66)
Idem Idem Idem XMCRA SRL[2.0]
Idem Idem CAL[6.0] SRW10 SRW11 SRW0 [1,0]
Rate Register CAL[7.0] SRL[2.0] SRW0 [1,0] SRW11
(0x74)
AVR096
4313B-AVR-03/04
AVR096
Table Registers (Continued)
ATmega128 Register Content
XMBK
AT90CAN128 Register Content
OCF2A OCF1A OCF0A OCIE2A OCIE1A OCIE0A
Add.
(0x6C) (0x6A)
Name
XMCRB EICRA
Add.
(0x75) (0x69)
Name
Idem Idem
ISC1 [1,0] BLBSET
XMM[2.0] ISC0 [1,0] SPMEM PGERS
Idem Idem
ISC3 [1,0] RWWSB SPMIE
ISC2 [1,0] SWWSRE
(0x68)
SPMCSR
PGWRT
0x37-(0x57)
Idem
Idem
(0x65) (0x64) (0x63) (0x62) (0x61) 0x3F-(0x5F) 0x3E-(0x5E) 0x3D-(0x5D) 0x3C-(0x5C)
PORTG DDRG PING PORTF DDRF SREG XDIV (see page
PORTG[4.0] DDG[4.0] PING[4.0] PORTF[7.0] DDF[7.0]
0x14-(0x34) 0x13-(0x33) 0x12-(0x32) 0x11-(0x31) 0x10-(0x30)
Idem Idem Idem Idem Idem Idem Idem Idem CLKPR CLKPCE
Idem Idem Idem Idem Idem Idem Idem Idem CLKPS[3.0]
Idem Idem Idem (0x61)
Stack Pointer Register High Byte Stack Pointer Register Byte XDIVEN XDIV[6.0] RAMPZ0
0x3B-(0x5B)
RAMPZ
0x3B-(0x5B)
Idem
Idem
0x3A-(0x5A) 0x39-(0x59) 0x38-(0x58)
EICRB EIMSK EIFR
ISC7 [1,0]
ISC6 [1,0]
ISC5 [1,0]
ISC4 [1,0]
(0x6A) 0x1D-(0x3D) 0x1C-(0x3C) (0x6E)
Idem Idem Idem TIMSK0
Idem Idem Idem OCIE1C OCIE1B TOIE0 TOV2 TOV1 TOV0 TOIE2 TOIE1
INT[7.0] INTF[7.0]
OCIE1A
OCIE1B
OCIE2
OCIE0
TOIE2
TOIE1
TOIE0
ICIE1
0x37-(0x57)
(0x6F)
TIMSK1
ICIE1
TIMSK (see page (see page
(0x70)
TIMSK2
0x15-(0x35) OCF1A TIFR (see page (see page OCF1B OCF2 OCF0 TOV2 TOV1 TOV0 ICF1
TIFR0
ICF1
OCF1C
OCF1B
0x36-(0x56)
0x16-(0x36)
TIFR1
0x17-(0x37)
TIFR2
4313B-AVR-03/04
Table Registers (Continued)
ATmega128 Register Content
AT90CAN128 Register Content
SRW11 SRW10 EXTRF IVSEL IVSEL OCR2UB
Add.
Name
Add.
(0x74)
Name
XMCRA SMCR MCUCR
SRL[2.0]
SRW10
SRW0 [1,0] iVCE TCR2UB PORF iVCE
IVSEL
0x35-(0x55)
MCUCR
IVCE
0x33-(0x53) 0x35-(0x55)
SM[2.0]
EXTRF
WDRF
0x35-(0x55) PORF
MCUCR
WGM21 WDRF
BORF
0x34-(0x54)
MCUSR
FOC2A
WGM20
WGM00
0x33-(0x53)
TCCR0 (see page TCNT0 (see page OCR0 (see page ASSR (see page TCCR1A TCCR1B TCNT1H TCNT1L OCR1AH OCR1AL OCR1BH OCR1BL ICR1H ICR1L TCCR2 (see page TCNT2 (see page OCR2 (see page
COM0 [1,0]
WGM01
FOC0
CS0[2.0]
(0xB0)
TCCR2A
COM2A [1,0]
JTRF
0x34-(0x54)
MCUCSR
BORF
JTRF
CS2[2.0]
0x32-(0x52) 0x31-(0x51)
T/C0 Counter Register T/C0 Output Compare Register OCR0UB TCN0UB TCR0UB
(0xB2) (0xB3)
TCNT2 OCR2A
T/C2 Counter Register T/C2 Output Compare Register TCN2UB EXCLK
0x30-(0x50)
(0xB6)
Idem
0x2F-(0x4F) 0x2E-(0x4E) 0x2D-(0x4D) 0x2C-(0x4C) 0x2B-(0x4B) 0x2A-(0x4A) 0x29-(0x49) 0x28-(0x48) 0x27-(0x47) 0x26-(0x46) 0x25-(0x45)
COM1A [1,0] ICNC1 ICES1
COM1B [1,0]
COM1C [1,0]
WGM1 [1,0]
(0x80) (0x81) (0x85) (0x84) (0x89) (0x88) (0x8B) (0x8A) (0x87) (0x86) 0x24-(0x44)
Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem WGM00 FOC0A TCCR0A
Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem COM0A [1,0] WGM01 CS0[2.0]
WGM1 [3,2]
CS1[2.0]
T/C1 Counter Register High Byte T/C1 Counter Register Byte T/C1 Output Compare Register High Byte T/C1 Output Compare Register Byte T/C1 Output Compare Register High Byte T/C1 Output Compare Register Byte T/C1 Input Capture Register High Byte T/C1 Input Capture Register Byte WGM20 COM2 [1,0] WGM21 FOC2 CS2[2.0]
0x24-(0x44) 0x23-(0x43)
T/C2 Counter Register T/C2 Output Compare Register
0x26-(0x46) 0x27-(0x47)
TCNT0 OCR0A
T/C0 Counter Register T/C0 Output Compare Register
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AVR096
Table Registers (Continued)
ATmega128 Register Content
AT90CAN128 Register Content
IVSEL PSR2
Add.
0x22-(0x42)
Name
OCDR
Add.
0x31-(0x51)
Name
Idem
OCDR[7.0] IDRD OCDR[6.0] WDCE Idem
0x21-(0x41)
WDTCR
WDP[2.0]
(0x60)
Idem
Idem PSR310 iVCE
0x23-(0x43) ACME PSR0 SFIOR 0x20-(0x40) (see page (see page PSR321 ADHSM
GTCCR
ACME
(0x7B)
ADCSRB
ADHSM
ADTS[2.0]
0x35-(0x55) 0x1F-(0x3F) 0x1E-(0x3E) 0x1D-(0x3D) 0x1C-(0x3C) 0x1B-(0x3B) 0x1A-(0x3A) 0x19-(0x39) 0x18-(0x38) 0x17-(0x37) 0x16-(0x36) 0x15-(0x35) 0x14-(0x34) 0x13-(0x33) 0x12-(0x32) 0x11-(0x31) 0x10-(0x30) 0x0F-(0x2F) 0x0E-(0x2E) EEARH EEARL EEDR EECR PORTA DDRA PINA PORTB DDRB PINB PORTC DDRC PINC PORTD DDRD PIND SPDR WCOL SPSR SPIF EEPROM Address Register High 0x22-(0x42) 0x21-(0x41) 0x20-(0x40) EERE 0x1F-(0x3F) 0x02-(0x22) 0x01-(0x21) 0x00-(0x20) 0x05-(0x25) 0x04-(0x24) 0x03-(0x23) 0x08-(0x28) 0x07-(0x27) 0x06-(0x26) 0x0B-(0x2B) 0x0A-(0x2A) 0x09-(0x29) 0x2E-(0x4E) SPR1 SPR0 SPI2X 0x2D-(0x4D)
MCUCR Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem
Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem Idem
EEPROM Address Register Byte EEPROM Data Register EEMWE EERIE EEWE
PORTA[7.0] DDA[7.0] PINA[7.0] PORTB[7.0] DDB[7.0] PINB[7.0] PORTC[7.0] DDC[7.0] PINC[7.0] PORTD[7.0] DDD[7.0] PIND[7.0] Data Register DORD MSTR CPOL CPHA
SPIE
0x0D-(0x2D) 0x0C-(0x2C) 0x0B-(0x2B)
SPCR UDR0
0x2C-(0x4C) (0xC6)
Idem Idem Idem
Idem Idem Idem
USART0 Data Register UDRIE0 UDRE0 MPCM0 DOR0 RXC0 UPE0 TXC0 U2X0
UCSR0A
(0xC0)
UCSZ02
RXCIE0
TXCIE0
RXEN0
TCEN0
RXB80
0x0A-(0x2A)
UCSR0B
TXB80
(0xC1)
Idem
Idem
4313B-AVR-03/04
Table Registers (Continued)
ATmega128 Register Content
AT90CAN128 Register Content
Idem
Add.
0x09-(0x29) 0x08-(0x28)
Name
UBRR0L ACSR
Add.
(0xC4) 0x30-(0x50)
Name
Idem Idem
USART0 Baud Rate Register Byte ACBG ACIC ACIE ACIS [1,0]
Idem Idem
0x07-(0x27)
ADMUX
REFS [1,0] ADEN ADSC
ADLAR
MUX[4.0]
(0x7C)
Idem ADATE
Idem
ADRF
ADIE
ADIF
Idem
Idem
Idem
0x06-(0x26) 0x05-(0x25) 0x04-(0x24) 0x03-(0x23) 0x02-(0x22) 0x01-(0x21) 0x00-(0x20)
ADCSRA (see page ADCH ADCL PORTE DDRE PINE PINF
ADPS[2.0]
(0x7A) (0x79) (0x78) 0x0E-(0x2E) 0x0D-(0x2D) 0x0C-(0x2C) 0x0F-(0x2F)
Idem Idem Idem Idem Idem Idem Idem
Data Register High Byte Data Register Byte PORTE[7.0] DDE[7.0] PINE[7.0] PINF[7.0]
Idem Idem Idem Idem Idem Idem
Note:
Some AT90CAN128 registers listed hereinabove table because there corresponding registers/peripherals ATmega128 (i.e. registers).
AVR096
4313B-AVR-03/04
Idem
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4313B-AVR-03/04

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