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John Ardizzoni INTRODUCTION AD8099 evaluation boards designed hel


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AD8099 Evaluation Boards
John Ardizzoni
INTRODUCTION AD8099 evaluation boards designed help customers quickly implement evaluate noise, distortion designs. circuit configurations shown AD8099 data sheet fabricated using AD8099 evaluation boards. AD8099 evaluation boards have been designed optimal performance minimal layout parasitics. There basic AD8099 evaluation board figurations: inverting noninverting. These configurations offered both package types, LFCSP SOIC. Part numbers evaluation boards found Table AD8099 data sheet, Table this document. evaluation board features edge mounted connectors input output efficient connection other circuit boards test equipment. board 2-layer PCB, with ground plane both sides board. ground plane under input pins been removed. Removing ground plane from under input pins minimizes stray capacitance input amp, which improves stability reduces peaking. evaluation board components SMTs range from 0603 1206 case size; electrolytic bypass capacitors, C1-C4, 3528 case size. Supply bypassing AD8099 consideration optimal circuit performance, especially when distortion concern. AD8099 uses combination common-mode bypassing capacitor between
power supplies) shunt bypassing (from power supply pins amplifier ground). evaluation board schematics show bypassing schemes detail, Figures Since AD8099 externally compensated large gain bandwidth product, component values placement critical. AD8099 data sheet features detailed section compensation networks component values. gain configurations +2), compensation network consists three components, series-parallel combination resistor capacitors negative supply. minimize stray capacitance, evaluation board provides only mounting pads parallel components. Therefore, parallel combination resistor capacitor SOIC boards LFCSP boards) must soldered other. Figure illustrates proper mounting configuration. previously mentioned reference designators correspond found AD8099 data sheet. AD8099 output does drive significant values load capacitance pF); therefore output connections should kept short, direct, terminated when appropriate. Larger values capacitance driven placing series resistor into position. This will help isolate capacitive loading effects output AD8099. Minimizing output capacitance will help ensure stability while minimizing peaking ringing.
REV.
AN-720
C2** AGND
GND1
GND2
GND3
AGND
FEEDBACK DISABLE
VOUT
AGND
AGND
*USER DEFINED VALUE **0508 CASE SIZE AGND
C5**
AGND
Figure Noninverting Schematic (SOIC)
COMPONENT SIDE
CIRCUIT SIDE
Figure Board Assembly Drawings (SOIC)
Figure Board Layout Patterns (SOIC)
REV.
AN-720
C2** AGND AGND AGND FEEDBACK DISABLE
GND1
GND2
GND3
AGND
VOUT
AGND
AGND
C5**
AGND
*USER DEFINED VALUE **0508 CASE SIZE
Figure Inverting Schematic (SOIC)
COMPONENT SIDE
CIRCUIT SIDE
Figure Board Assembly Drawings (SOIC)
Figure Board Layout Patterns (SOIC)
REV.
AN-720
C2**
GND1
GND2
GND3
GND4
AGND AGND AGND
AGND DISABLE FEEDBACK VOUT
C5**
AGND
AGND
*USER DEFINED VALUE **0508 CASE SIZE
AGND AGND
Figure Noninverting Schematic (CSP)
COMPONENT SIDE
CIRCUIT SIDE
Figure Board Assembly Drawing (CSP)
Figure Board Layout Patterns (CSP)
REV.
AN-720
C2**
GND1
GND2
GND3
GND4
AGND AGND AGND
AGND DISABLE FEEDBACK VOUT
C5**
AGND
AGND
*USER DEFINED VALUE **0508 CASE SIZE
AGND AGND
Figure Inverting Schematic (CSP)
COMPONENT SIDE
CIRCUIT SIDE
Figure Board Assembly Drawing (CSP)
Figure Board Layout Patterns (CSP)
REV.
AN-720
(R7)
SOLDER TERMINATOR SOLDER SOLDER TERMINATOR MOUNTING PADS
Figure Soldering Parallel Components
Table Evaluation Board Selection Guide Package Type Board Configuration Inverting Noninverting EVAL-ADOPAMP-1CP-I EVAL-ADOPAMP-1CP-N SOIC EVAL-ADOPAMP-1R-IN EVAL-ADOPAMP-1R-NI
REV.
2004 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners.
AN04805-0-7/04(A)

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