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AN-413 APPLICATION NOTE

BOX 9106

ONE TECHNOLOGY WAY
AN-413 APPLICATION NOTE
BOX 9106
· P.O.
· NORWOOD,
MASSACHUSETTS 02062-9106
Evaluation Board for the AD7890, 12-Bit Serial, Data Acquisition System
78L05
V+ IN OUT GND IC6 SKT 11 CLKIN IC7 1 / 2 74HC4050 DATA OUT 7 4 VDD R3 10k DATA IN 5 VDD R2 10k TFS 4 LK5 1 / 2 74HC125 8 RFS 3 R1 10k NC NC 2 9 11 SCLK 1 2 12 3 IC8 5 DVDD 8 LK1 DGND 6 VDD SKT 14 SKT 10 CONVST B A B A C16 120pF 4 CONVST SHA IN 14 CEXT AGND 1 IC1 AGND 15 DGND 3 R4 10k VDD VDD 2 1 / 2 74HC125 7 SCLK SMODE VIN2 17 VIN1 16 MUX OUT 13 5 9 6 VIN4 19 VIN3 18 9 RFS 5 6 CLKIN 10 DATA OUT 12 VDD REFOUT / 24 REFIN C3 0.1µF
part contains an on-chip control register accessible via the serial port and allows control of channel selection, conversion start, and power down of the part. This flexible serial interface allows the AD7890 to connect directly to digital signal processors (ADSP-2101, TMS320C25, etc.) and microcontrollers (8XC51, 68HC11, etc.). Full data on the AD7890 is available in the AD7890 data sheet available from Analog Devices and should be consulted in conjunction with this application note when using the evaluation board.
2 VIN C4 10µF C14 10µF B C A C15 0.1µF 14 VIN8 23 VIN7 22 12 13 8 IC4 10 9 C7, C9 0.1µF C8, C10 10µF P O N M L K J I H G F E D 3 1 IC5 C6, C12 10µF + LK3 2 AD713JN 2 C B A LK4 C5, C11 0.1µF V- LK2 V+
AD780 +
6 VOUT GND 4 IC3 SKT 9 EXT REF
11 DATA IN
TFS VIN6 21
AD7890
VIN5 20 14 12 13
SKT 13 SHA IN
SKT 12 MUX OUT
Figure 1. Evaluation Board Circuit Diagram
Onboard components include an AD780, a pin programmable +2.5 V or +3 V ultrahigh precision bandgap reference, bus buffers for the serial data lines and input buffer amplifiers to buffer the eight analog inputs. Interfacing to this board is through a 9-way D-type connector. External sockets are provided for the conversion start input, analog inputs, clk in, mux out, sha in and external reference input options. OPERATING THE AD7893 EVALUATION BOARD Power Supplies This evaluation board has three analog power supply inputs: AVDD, AGND and VSS. These supplies are +15 V, 0 V and -15 V respectively and are used to power the onboard AD713 buffer amplifiers. The +15 V supply is used in conjunction with the LM78L05, a 5 V linear regulator, to provide the VDD for the AD7890 and the VIN for the AD780 voltage reference. There are two digital power supply inputs, DVDD and DGND, that are used to power the digital logic on the board. These supplies can be provided through the D-type connector or through the connection pins labelled on the board. All supplies are decoupled to ground with 10 µF tantalum and 0.1 µF ceramic disc capacitors. The AVDD and VSS supplies are decoupled to the AGND plane while the DVDD supply is decoupled to the DGND plane. The evaluation board uses extensive ground planing to minimize any high frequency noise interference from the onboard clocks or any other sources. Once again, the ground planing for the analog section is kept separate from that for the digital section and they are joined only at the AD7890 AGND and DGND pins. Shorting Plug Options There are five shorting plug options that must be set before using the evaluation board. These are outlined below: LK1 This is a double link used to configure the bidirectional buffer on the SCLK and RFS inputs to the AD7890. The position of this link also controls the SMODE pin on the AD7890 configuring the part for self-clocking or external clocking mode of operation. In the external clocking mode both links of LK1 must be in Position A, setting the SMODE pin on the AD7890 to a logic high and routing the RFS and SCLK signals from the 9-way D-type connector to the AD7890. In the self-clocking mode both links on LK1 must be in Position B, configuring the SMODE pin on the AD7890 to a logic low and routing the RFS and SCLK output signals from the AD7890 to the 9-way D-type connector.
LK2 This option is used to select the reference source for the AD7890 REFIN / REFOUT pin. With this link in Position A, the on-chip 2.5 V reference is used as the reference for the AD7890. The output impedance of this reference is 2 k allowing this reference to be overdriven when using an external 2.5 V reference. In Position B, the AD780 2.5 V reference is selected as the reference for the AD7890. In Position C the reference for the part is provided from the external socket SKT9. LK3 This link, when in place, connects the MUX OUT to the SHA IN. When this link is removed, the output of the multiplexer appears at the MUX OUT pin and also at MUX OUT (SKT12), and thus the user can insert an antialiasing filter or signal conditioning between the multiplexer and the ADC. The output range from the MUX OUT is 0 V to 2.5 V and the output impedance is 3.5 k. The SHA IN is the input to the on-chip track and hold and is a high impedance input and accepts signals in the range of 0 V to 2.5 V. The SHA IN pin can be driven directly from SKT13 with LK3 removed. LK4 This provides two options on each of the analog input channels. Option one selects the analog input for each channel from the external socket. The second option facilitates the use of the grid for signal conditioning and the signal can be linked to the VIN. The following table describes the options associated with LK4. Table I. Options Associated with LK4 Option A B C D E F G H I J K L M N O P Function Grid to VIN1 via buffer amplifier SKT1 to VIN1 via buffer amplifier Grid to VIN2 via buffer amplifier SKT2 to VIN2 via buffer amplifier Grid to VIN3 via buffer amplifier SKT3 to VIN3 via buffer amplifier Grid to VIN4 via buffer amplifier SKT4 to VIN4 via buffer amplifier Grid to VIN5 via buffer amplifier SKT5 to VIN5 via buffer amplifier Grid to VIN6 via buffer amplifier SKT6 to VIN6 via buffer amplifier Grid to VIN7 via buffer amplifier SKT7 to VIN7 via buffer amplifier Grid to VIN8 via buffer amplifier SKT8 to VIN8 via buffer amplifier
LK5 This link in place connects RFS and TFS together and is useful in applications which require that data be transmitted and received at the same time.
EVALUATION BOARD INTERFACING Interfacing to the evaluation board is via a 9-way D-Type connector, SKT14. The pinout for this connector is shown in Figure 2, and its pin designations are given in Table II.
Digital +5 V Supply. This line is connected to the DVDD supply line on the evaluation board. It allows the user to provide the digital supply via the connector along with the other digital signals.
SKT14 PIN DESCRIPTION SCLK Serial Clock Input / Output. In the external clocking mode (LK1 in Position A) an external serial clock is applied through this input to load data to the control register and to access data from the output register. In the self-clocking mode (LK1 in Position B) the internal serial clock is used to load data to the control register and to access data from the data register. This clock appears at the SCLK pin. The internal serial clock is derived from the master clock. This serial clock is buffered using a 74HC125 three-state buffer on the evaluation board and LK1 determines the direction of this bidirectional buffer depending on the mode of operation. RFS Receive Frame Sync. This can be an input or output depending on the mode of operation. In external clocking mode this pin is used to provide an active low framing pulse to access data from the data register. In the self-clocking mode an active low framing pulse which is internally generated by the part appears at this pin. This RFS signal is buffered on the board using a 74HC125 three-state buffer configured for bidirectional operation using LK1. Transmit Frame Sync. This buffered input controls the AD7890 TFS input, and serial data is expected after the falling edge of this signal. There is a 10 k pull-up resistor on this line to pull it to its inactive state if left unconnected. This buffered input pin is used to provide the serial data to be loaded to the control register of the AD7890. Digital Ground. This line is connected to the digital ground plane on the evaluation board. It allows the user to provide the digital supply via the connector along with the other digital signals.
Figure 2. Pin Configuration for SKT14, D-Type Connector
Table II. SKT14 Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 Mnemonic SCLK N / C RFS TFS DATA IN DGND DATAOUT DVDD N / C
SOCKETS There are fourteen sockets relevant to the operation of the AD7890 on this evaluation board. The functions of these sockets are outlined in Table III. Table III. Socket Functions Socket SKT1-SKT8 SKT9 SKT10 SKT11 SKT12 Function Subminiature BNC Sockets for the Eight Analog Input Channels Subminiature BNC Socket for External Reference Subminiature BNC Socket for CONVST Input Subminiature BNC Socket for Master Clock Input Subminiature BNC Socket for MUX OUT. The output of the on-chip multiplexer appears at this pin. Subminiature BNC Socket for the SHA IN Pin. An input to the on-chip track / hold can be applied to this socket. 9-Way D-Type Connector
DATA IN
SKT13
SKT14
DATAOUT Serial Data Output. Serial data from the part is obtained at this output. This data is buffered by 74HC4050 hex buffer before arriving at the DATAOUT pin of the connector. The serial data is clocked out by the rising edge of SCLK and is valid on the falling of SCLK.
processor to read the data from the AD7890. Provided the read operation is completed 500 ns before the rising edge of CONVST, the AD7890 will operate to specification. This scheme limits the throughput rate to 11.8 µs minimum. Self-Clocking Mode The AD7890 is configured for its self-clocking mode by tying the SMODE pin of the device to a logic low (LK1 on board in position B). In this mode, the AD7890 provides
the serial clock signal and the serial data framing signal used for the transfer of data from the AD7890. This selfclocking mode can be used with processors that allow an external device to clock their serial port including most digital signal processors. Interface timing can be obtained from the AD7890 data sheet.
CONVST
tCONVERT
500ns MIN
CONVERSION IS INITIATED AND TRACK / HOLD GOES INTO HOLD
CONVERSION ENDS 5.9µs LATER
SERIAL READ & WRITE OPERATIONS
READ & WRITE OPERATIONS SHOULD END 500ns PRIOR TO NEXT RISING EDGE OF CONVST
NEXT CONVERSION START COMMAND
Figure 3. Control Sequence to Obtain Optimum Performance from the AD7890
CONVST
tCONVERT
500ns MIN
CONVERSION IS INITIATED AND TRACK / HOLD GOES INTO HOLD
µP INT CONVERSION ENDS 5.9µs SERVICE OR POLLING LATER ROUTINE
SERIAL READ READ & WRITE NEXT CONVST & WRITE OPERATIONS SHOULD RISING EDGE OPERATIONS END 500ns PRIOR TO NEXT RISING EDGE OF CONVST
Figure 4. Sequence Using CONVST as an Interrupt Signal
COMPONENT LIST Integrated Circuits IC1 IC3 IC4, IC5 IC6 IC7 IC8 Capacitors C2, C4, C6, C8, C10 C12, C14 C1, C3, C5, C7, C9 C11, C13, C15 C17, C18 C16
Resistors R1, R2, R3, R4 AD7890 AD780 Voltage Reference AD713 Buffer Amplifier LM78L05 Voltage Regulator 74HC4050 Hex Buffer 74HC125 Quad Bus Buffers with Three State Outputs 10 µF Capacitors 0.1 µF Capacitors 0.1 µF Capacitors 200 pF Capacitor Links LK1, LK2, LK3, LK4, LK5 Sockets SKT1 to SKT13 SKT14
10 k Resistors Shorting Plugs
Subminiature BNC Sockets 9-Way D Type Connector
E2136-12-5 / 96
Figure 5. Silkscreen Layout for Evaluation Board
PRINTED IN U.S.A.