74HC/HCT74 Dual D-type flip-flop with reset; positive-edge trigger

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74HC/HCT74 Dual D-type flip-flop with reset; positive-edge trigger

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IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
74HC/HCT74 Dual D-type flip-flop with reset; positive-edge trigger
Product specification Supersedes data September 1993 File under Integrated Circuits, IC06 1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
FEATURES Output capability: standard category: flip-flops GENERAL DESCRIPTION 74HC/HCT74 high-speed Si-gate CMOS devices compatible with power Schottky (LSTTL). They specified compliance with JEDEC standard 74HC/HCT74 dual positive-edge triggered, D-type flip-flops with individual data inputs, clock (CP) inputs, (SD) reset (RD) inputs; also complementary outputs. QUICK REFERENCE DATA Tamb
74HC/HCT74
reset asynchronous active inputs operate independently clock input. Information data input transferred output LOW-to-HIGH transition clock pulse. inputs must stable set-up time prior LOW-to-HIGH clock transition predictable operation. Schmitt-trigger action clock input makes circuit highly tolerant slower clock rise fall times.
TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay fmax Notes used determine dynamic power dissipation µW): VCC2 VCC2 where: input frequency output frequency VCC2 outputs output load capacitance supply voltage condition condition maximum clock frequency input capacitance power dissipation capacitance flip-flop notes CONDITIONS UNIT
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
ORDERING INFORMATION TYPE NUMBER 74HC(T)74N 74HC(T)74D 74HCT74DB 74HCT74PW PACKAGE NAME DIP14 SO14 SSOP14 TSSOP14 DESCRIPTION plastic dual in-line package; leads (300 mil) plastic small outline package; leads; body width
74HC/HCT74
VERSION SOT27-1 SOT108-1 SOT337-1
plastic shrink small outline package; leads; body width
plastic thin shrink small outline package; leads; body width SOT402-1
DESCRIPTION SYMBOL 1RD, 1CP, 1SD, NAME FUNCTION asynchronous reset-direct input (active LOW) data inputs clock input (LOW-to-HIGH, edge-triggered) asynchronous set-direct input (active LOW) true flip-flop outputs complement flip-flop outputs ground positive supply voltage
Fig.1 configuration.
Fig.2 Logic symbol.
Fig.3 logic symbol.
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
FUNCTION TABLE INPUTS
74HC/HCT74
OUTPUTS
INPUTS Note
OUTPUTS Qn+1 Qn+1
HIGH voltage level voltage level don't care LOW-to-HIGH transition Qn+1 state after next LOW-to-HIGH transition Fig.4 Functional diagram.
Fig.5 Logic diagram (one flip-flop).
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
CHARACTERISTICS 74HC characteristics "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard category: flip-flops CHARACTERISTICS Tamb (°C) 74HC SYMBOL PARAMETER min. tPHL/ tPLH propagation delay +125 min. max. UNIT
74HC/HCT74
TEST CONDITIONS WAVEFORMS Fig.6 Fig.6 Fig.6 Fig.7 Fig.7 Fig.6 Fig.6 Fig.7 Fig.7 Fig.6
typ. max. min.
tPHL/ tPLH
propagation delay propagation delay output transition time
tPHL/ tPLH
tTHL/ tTLH
clock pulse width HIGH
reset pulse width
trem
removal time reset
set-up time
hold time
fmax
maximum clock pulse frequency
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
CHARACTERISTICS 74HCT characteristics "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard category: flip-flops Note types
74HC/HCT74
value additional quiescent supply current (ICC) unit load given family specifications. determine input, multiply this value unit load coefficient shown table below.
INPUT
UNIT LOAD COEFFICIENT 0.70 0.70 0.80 0.80
CHARACTERISTICS 74HCT Tamb (°C) 74HCT SYMBOL PARAMETER min. tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tTHL/ tTLH trem fmax propagation delay propagation delay propagation delay output transition time clock pulse width HIGH reset pulse width removal time reset set-up time hold time maximum clock pulse frequency typ. +125 UNIT WAVEFORMS Fig.6 Fig.7 Fig.7 Fig.6 Fig.6 Fig.7 Fig.7 Fig.6 Fig.6 Fig.6 TEST CONDITIONS
max. min. max. min. max.
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
WAVEFORMS
74HC/HCT74
shaded areas indicate when input permitted change predictable output performance. 50%; VCC. HCT:
Fig.6
Waveforms showing clock (nCP) output (nQ, propagation delays, clock pulse width, set-up, hold times, output transition times maximum clock pulse frequency.
handbook, full pagewidth
INPUT
VM(1)
trem VM(1)
INPUT
trem
VM(1)
INPUT
tPLH
tPHL
OUTPUT
VM(1)
tPHL
tPLH
50%; VCC. HCT:
OUTPUT
VM(1)
MGL350
Fig.7
Waveforms showing (nSD) reset (nRD) input output (nQ, propagation delays, reset pulse widths nRD, removal time.
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
PACKAGE OUTLINES DIP14: plastic dual in-line package; leads (300 mil)
74HC/HCT74
SOT27-1
seating plane
index
scale
DIMENSIONS (inch dimensions derived from original dimensions) UNIT inches max. 0.17 min. 0.51 0.020 max. 0.13 1.73 1.13 0.068 0.044 0.53 0.38 0.021 0.015 0.36 0.23 0.014 0.009 19.50 18.55 0.77 0.73 6.48 6.20 0.26 0.24 2.54 0.10 7.62 0.30 3.60 3.05 0.14 0.12 8.25 7.80 0.32 0.31 10.0 0.39 0.33 0.254 0.01 max. 0.087
Note Plastic metal protrusions 0.25 maximum side included. OUTLINE VERSION SOT27-1 REFERENCES 050G04 JEDEC MO-001AA EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-03-11
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
74HC/HCT74
SO14: plastic small outline package; leads; body width
SOT108-1
index detail
scale
DIMENSIONS (inch dimensions derived from original dimensions) UNIT max. 1.75 0.25 0.10 1.45 1.25 0.25 0.01 0.49 0.36 0.25 0.19 8.75 8.55 0.16 0.15 1.27 0.050 1.05 0.028 0.024 0.25 0.01 0.25 0.01 0.004 0.028 0.012
inches 0.069
0.010 0.057 0.004 0.049
0.019 0.0100 0.35 0.014 0.0075 0.34
0.244 0.039 0.041 0.228 0.016
Note Plastic metal protrusions 0.15 maximum side included. OUTLINE VERSION SOT108-1 REFERENCES 076E06S JEDEC MS-012AB EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-23 97-05-22
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
74HC/HCT74
SSOP14: plastic shrink small outline package; leads; body width
SOT337-1
index detail
scale
DIMENSIONS original dimensions) UNIT max. 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 0.65 1.25 1.03 0.63 0.13
Note Plastic metal protrusions 0.25 maximum side included. OUTLINE VERSION SOT337-1 REFERENCES JEDEC MO-150AB EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 96-01-18
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
74HC/HCT74
TSSOP14: plastic thin shrink small outline package; leads; body width
SOT402-1
index
detail
scale
DIMENSIONS original dimensions) UNIT max. 1.10 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.65 0.75 0.50 0.13 0.72 0.38
Notes Plastic metal protrusions 0.15 maximum side included. Plastic interlead protrusions 0.25 maximum side included. OUTLINE VERSION SOT402-1 REFERENCES JEDEC MO-153 EIAJ EUROPEAN PROJECTION ISSUE DATE 94-07-12 95-04-04
1998
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
SOLDERING Introduction There soldering method that ideal packages. Wave soldering often preferred when through-hole surface mounted components mixed printed-circuit board. However, wave soldering always suitable surface mounted ICs, printed-circuits with high population densities. these situations reflow soldering often used. This text gives very brief insight complex technology. more in-depth account soldering found Package Databook" (order code 9398 90011). SOLDERING DIPPING WAVE maximum permissible temperature solder solder this temperature must contact with joint more than seconds. total contact time successive solder waves must exceed seconds. device mounted seating plane, temperature plastic body must exceed specified maximum storage temperature (Tstg max). printed-circuit board been pre-heated, forced cooling necessary immediately after soldering keep temperature within permissible limit. REPAIRING SOLDERED JOINTS Apply voltage soldering iron (less than lead(s) package, below seating plane more than above temperature soldering iron less than remain contact seconds. temperature between contact seconds. SSOP TSSOP REFLOW SOLDERING Reflow soldering techniques suitable SSOP TSSOP packages. Reflow soldering requires solder paste suspension fine solder particles, flux binding agent) applied printed-circuit board screen printing, stencilling pressure-syringe dispensing before package placement. Several techniques exist reflowing; example, thermal conduction heated belt. Dwell times vary between seconds depending heating method. 1998
74HC/HCT74
Typical reflow temperatures range from Preheating necessary paste evaporate binding agent. Preheating duration: minutes WAVE SOLDERING Wave soldering used packages. Wave soldering recommended SSOP TSSOP packages, because likelihood solder bridging closely-spaced leads possibility incomplete solder penetration multi-lead devices. wave soldering used cannot avoided SSOP TSSOP packages following conditions must observed: double-wave turbulent wave with high upward pressure followed smooth laminar wave) soldering technique should used. longitudinal axis package footprint must parallel solder flow must incorporate solder thieves downstream end. Even with these conditions: Only consider wave soldering SSOP packages that have body width that SSOP16 (SOT369-1) SSOP20 (SOT266-1). consider wave soldering TSSOP packages with leads more, that TSSOP48 (SOT362-1) TSSOP56 (SOT364-1). During placement before soldering, package must fixed with droplet adhesive. adhesive applied screen printing, transfer syringe dispensing. package soldered after adhesive cured. Maximum permissible solder temperature maximum duration package immersion solder seconds, cooled less than within seconds. Typical dwell time seconds mildly-activated flux will eliminate need removal corrosive residues most applications. REPAIRING SOLDERED JOINTS component first soldering diagonallyopposite leads. only voltage soldering iron (less than applied flat part lead. Contact time must limited seconds When using dedicated tool, other leads soldered operation within seconds between
Philips Semiconductors
Product specification
Dual D-type flip-flop with reset; positive-edge trigger
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
74HC/HCT74
This data sheet contains target goal specifications product development. This data sheet contains preliminary data; supplementary data published later. This data sheet contains final product specifications.
Limiting values given accordance with Absolute Maximum Rating System (IEC 134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Where application information given, advisory does form part specification. LIFE SUPPORT APPLICATIONS These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips customers using selling these products such applications their risk agree fully indemnify Philips damages resulting from such improper sale.
1998

74HC/HCT74 Dual D-type flip-flop with reset; positive-edge trigger

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