XPIO10Gbps SERDES Lattice Applications Solutions Portal Automotive Tem
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XPIO10Gbps SERDES Lattice Applications Solutions Portal Automotive Temperature Range ispPAC® Power Manager Devices Lattice Wins Programmable Device Award ispLeverCOREConnection Partners Program Upgrade Your Design Tools with ispLEVER® Version Renew Your Software Maintenance On-Line Boards ispXPLDand ispXPGAEvaluation Development Lattice Attends Military/ Aerospace Conference Lattice Listens Lattice Literature
Lattice Releases Members Industry's Lowest Power CPLD Family
128-Macrocell ispMACH 4000Z Devices Available 56-Ball Chip-Scale Package
Lattice recently announced release 128-macrocell members industry's lowest power CPLDs, ispMACH 4000Z family. 1.8V ispMACH 4064Z ispMACH 4128Z devices require only 11µA 12µA typical standby power supply current, respectively, specified 25µA 35µA over temperature voltage. These products join already released 32-macrocell ispMACH 4032Z with typical/maximum standby supply currents just 10µA/20µA. newly introduced ispMACH 4064Z delivers industry leadership 3.7ns pin-to-pin delay (tPD), 3.2ns clock-to-output delay (tCO), 2.5ns ispMACH 4000Z: static power consumption, set-up time (tS), 250MHz operat- cost-effective logic implementation, flexible I/Os, spaceing frequencies (fMAX). ispMACH saving packages 1.8V power supply. 4128Z also delivers industry's fastChip-Scale packages, with their small 4.2ns tPD, 3.5ns tCO, 2.7ns 220MHz PCB-footprint body sizes, particularly well fMAX. previously released ispMACH 4032Z suited meet tight space constrains asdelivers 3.5ns tPD, 3.0ns tCO, 2.2ns sociated with portable handheld equip267MHz fMAX. ment designs. smallest members ispMACH addition, input leakage current character4000Z family, ispMACH 4032Z 4064Z istics entire ispMACH 4000Z family available space-saving 56-ball specified maximum over normal Chip-Scale (csBGA) package (6x6mm operating range. ispMACH 4000Z supbody, 0.5mm pitch) supporting I/Os ports tolerant inputs I/Os with maxidedicated inputs. ispMACH 4064Z device 10µA input leakage current, enabling also available 48-pin 100-pin TQFP packages providing I/Os ispMACH 4000Z family easily interface systems. dedicated inputs, respectively. ispMACH addition being industry's lowest 4128Z device available 100-pin TQFP power CPLD family, Lattice aggrespackage with I/Os dedicated inputs. sively priced this leading CPLD family Both ispMACH 4064Z 4128Z will lowest cost macrocell entire product released 132-ball csBGA packages portfolio, with high-volume prices (8x8mm body, 0.5mm pitch) with I/Os dedicated inputs later this year. (Please Page
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Feature Macrocells I/Os Dedicated Inputs (ns) (ns) (ns) fMAX (MHz) Supply Voltage Max. Standby (µA) Packaging ispMACH 4032ZC 32+4 TQFP csBGA ispMACH 4064ZC 32+4/32+12/ 64+10 TQFP csBGA TQFP csBGA
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ispMACH 4128ZC 64+10/96+4 ispMACH 4256ZC* 64+10/96+6/ 128+4
cents macrocell depending device density, package speed-grade. ispMACH 4000Z family priced below competitive standard power CPLD devices. Lattice charges premium zero-power! ispMACH 4000Z family industry's true choice zeropower CPLDs power- cost-sensitive applications across market segments including consumer, communications, computing, automotive industrial, offering lowest static power, smallest packages, lowest cost high performance.
TQFP csBGA
Device Features
TQFP csBGA TQFP
ispMACH 4000Z devices have banks, each with their power supply voltage that appropriate voltage support LVTTL LVCMOS 3.3V, 2.5V 1.8V outputs. device input buffers have programmable thresholds that support above standards independent bank voltage. Extended range 3.3V I/Os supported instead more common narrow range
*Advance information.
version standard, again accommodating battery life voltage associated with certain systems. I/Os ispMACH 4000Z tolerant also facilitate connection legacy chips interfaces. ispMACH 4000Z devices Boundary Scan Testable in-system programmable through IEEE 1532-
compliant JTAG boundary scan (IEEE 1149.1) interface.
Development Tools
ispMACH 4000 product line supported Lattice's ispLEVER design tools. ispLEVER tools, Lattice's platform next-generation logic design, provide designers with rapid access performance ispMACH 4000Z devices while maximizing resource utilization. This achieved through timing driven placement routing coupled with optimized synthesis support from vendors such Exemplar Synplicity. Additional third-party software available well UNIX workstation versions.
Availability
Production ispMACH 4064Z 4128Z devices available today commercial 70°C ambient) temperature grades. industrial automotive temperature grade versions, well 132-csBGA package options, these devices will released later this year. last member ispMACH 4000Z family, 256-macrocell ispMACH 4256Z devices will begin sampling 2003.
Look Lattice's "Reach Cold One" Advertisement Current Issues Many Trade Publications
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Lattice XPIO Device: Industry's Lowest Power 10Gbps SERDES
eXtended Performance (XPIO) Transceiver Features Extremely Power Consumption
Lattice pleased announce availability industry's lowest power Gigabit second (Gbps) SERDES transceiver based 0.13micron CMOS technology. Designed SONET OC-192 Gigabit Ethernet applications, XPIO 110GXS consumes only Watts power supports optical transponder modules such 300-pin MultiSource Agreement (MSA) well those Gigabit small form-factor pluggable (XFP) applications. high performance transceiver meets both SONET Ethernet jitter requirements. addition first eXtended Performance device further demonstrates Lattice's leadership position SERDES market. market leader high-speed SERDES-based programmable devices with Field Programmable System Chip (FPSC) product family, Lattice fully committed delivering most complete portfolio innovative FPGA FPSC solutions Gbps, XPIO 110GXS device next step towards achieving this objective. Previous Lattice FPSC devices, such ORSO82G5 ORT82G5, support Gbps traffic using four channels 3.125 Gbps SERDES, depending encoding/ decoding scheme utilized. XPIO XPIO 110GXS Diagram Measurements device generates receives Gbps clock data streams Ethernet applications. Lattice's (full duplex) utilizing signaling device also used 200-pin over single channel, reducing MSA- 300-pin MSA-based optinumber connections needed. transponder modules. device Offering continuous operating supports 16:1 serialization 1:16 range from 9.953 10.709 Gbps, deserialization with parallel LVDS low-power transceiver ideally suited data range from Mbps SONET OC-192 Gigabit supporting Optical Internetworking Forum's SFI-4.1 Gigabit Ethernet's XSBI standards. on-chip low-jitter generates required clocks based external reference static ICC), world's only non-volclock 155.52 622.08 MHz. atile, infinitely reconfigurable FPGAs integrated limiting amplifier further (Field Programmable Gate Arrays), enhances design flexibility imthe fastest programmable SERDES proves bit-error rate. (3.7Gbps channel), programThe device achieves extremely mable mixed signal devices. Lattice power consumption through consistently brings best together combination advanced 0.13-micron deliver innovative, high-performance, CMOS technology, reduced 1.3V core programmable solutions. 2.5V voltages, proprietary Lattice Solutions applications circuit design techniques. result, solutions portal helps system dethe devices typically consume only signers innovative program0.8 Watts when operating Gbps, mable solutions quickly easily. lower than competitive transceivLattice Solutions accelerates system currently available announced. design providing helpful informaThe device packaged easytion resources, including block to-use 15mm 15mm, 269-ball flipdiagrams, reference designs, applicachip package. ordering part tions notes intellectual property, number XPIO 110GXS-01CF269C. location. Please check XPIO 110GXS evaluation kits system block diagrams available through authorized Lattice Lattice Solutions portal distributors price $4999. www.latticesemi.com/solutions.
Lattice Applications Solutions Portal
Today's leading-edge system designers must satisfy multiple often competing goals. Designers must balance speed, power consumption, high functionality, board-space savings, cost, fast time-to-market. Whether you're designing core router, storage system wireless system, Lattice Semiconductor brings together variety technologies features provide innovative solutions that address your real needs. This approach been adopted across range products that Lattice supplies. silicon products, this spans logic, interface, analog. design tools covers design entry, intellectual property development tools. Lattice's product portfolio includes world's fastest programmable logic devices (2.3ns pin-to-pin delay), lowest power consumption (10µA typi-
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Lattice Launches Automotive Temperature Range ispPAC Power Manager Devices
Lattice announced availability ispPAC Power Manager devices, volume, automotive temperature range, -40°C 125°C. Lattice's Power Manager devices provide standard, off-the-shelf programmable mixedsignal solution power management that enhances reliability speeds time-to-market. Analog features such input comparator thresholds digital functions such supply control sequences programmed into nonvolatile E2CMOS® elements devices using IEEE1149.1 boundary scan protocol. With introduction automotive temperature range ispPAC Power Manager, Lattice further enhances ISPoffering into this important market segment. complexity power supply management automotive applications (for example, in-cabin instrumentation computer multimedia center located dash board modern-day cars), increased dramatically recent years number voltages found typical risen sharply. addition, most system-level integrated circuits, whether processors, ASSPs, ASICs FPGAs, have device-specific power supply sequencing tracking requirements that make each power supply management design unique. Traditional approaches, consisting arcane collections resistors, capacitors, discrete analog logic functions, longer practical solutions. ispPAC Power Manager family devices integrates four programmable
Device ispPAC-POWR1208 ispPAC-POWR604
blocks: precision analog threshold comparators monitoring various power supply voltages, programmable high-voltage drivers directly interface modern MOSFETS with lower turn resistance, programmable logic enable implementation complex power sequencing requirements circuit board, programmable timers controlling events that need long duration time-outs. benefits using ispPAC power manager family devices include reduced circuit board size, reduced cost increased reliability. in-system programmability feature, coupled with integration various programmable blocks, reduces time market also enables design engineers standardize ispPAC Power Manager solution various power management requirements their circuit boards resulting reduced cost ownership. pleased able offer revolutionary award-winning ispPAC Power Manager mixed-signal family automotive temperature range," said Stan Kopec, vice president corporate marketing Lattice. power management applications including in-cabin underthe-hood take advantage unprecedented convenience provided ispPAC Power Manager device." automotive temperature range ispPAC Power Manager devices, ispPAC-POWR1208 ispPACPOWR604, available immediately through authorized distributors.
Lattice Receives Programmable Device Award Lattice highly acclaimed Electron d'Or award France best programmable product 2003. Electron d'Or awards, sponsored leading French electronics journal Electronique, honor best electronics products year chosen jury industry experts users. Lattice presented with award revolutionary ispPAC Power Manager devices, industry's first family mixedsignal PLDs. Jean-Florent Helie, technology editor Electronique, comments: "The ispPAC Power Manager chosen panel demonstrated unique features facilitated ground-breaking technology. Power supply sequencing real design headache many circuit designers therefore Power Manager solves fundamental need. look forward with anticipation enhancements that will come with future releases device." 2003 awards took place ceremony held Groupe Tests' headquarters Paris.
Description Power Supply Sequencing Monitoring: Total Power Management Power Supplies Multi-voltage Circuit Boards. Power Supply Sequencing Monitoring: Total Power Management Power Supplies Multi-voltage Circuit Boards.
Supply Voltage (VCC) 2.25-5.5 2.25-5.5
Tolerant
Package Options TQFP TQFP
Note: Lattice programmable products also available Industrial temperature range versions. Please consult Lattice site details.
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Introducing ispLeverCORE Connection Partners Program
Choose From Over Cores Tested Connections Partners ispLEVER Software
Lattice pleased announce ispLeverCORE Connection, partnership third-party Intellectual Property (IP) providers. Extending Lattice's growing line solutions, this partner program collaboration between Lattice independent developers expand both market reach partners, applications support leading FPGA Field Programmable System Chip (FPSC) devices from Lattice. Making Connection ispLeverCORE Connection partners program designed allow customers easily access integrate many third-party products Lattice programmable devices. facilitate this, Connection Cores delivered complete package including documentation meet "ispLeverCORE Approved" requirements. Lattice also makes easy third-party developers optimize implement their cores Lattice's leading device families, such ispXPGA ORCA Series FPGAs FPSCs. Connection partners receive complete training Lattice device architectures ispLEVER design tool suite that used implementation optimization. Initial Partners initial three partners ispLeverCORE Connection CAST, Inc., Digital Core Design (DCD), Eureka Technology, Inc. Reusable core products these companies' primary business. Each partner provides broad line reusable cores, support, design services. They have extensive system knowledge products covering wide range application areas such storage, imaging, DSP, encryption, MCU/MPU more. These three partner companies have combined portfolio over different cores that complementary Lattice's line ispLeverCORE products. initial three partners were selected their leadership position dedicated providers, their longevity proven success with customers, their commitment quality support. CAST, Inc. pioneer known dedication supporting customers throughout entire design process. CAST provides general purpose (gpIP), broad range popular standards-based cores that includes processors, interfaces, application-specific functions multimedia encryption. Privately owned operating since 1993, CAST located near York City, European operations center works with international network developers distributors. Connection Cores from CAST include line 8051 products. Digital Core Design company with extensive portfolio that specializes improved architectures MPU/MCUs, floating point unit (FPU) co-processors, peripherals. also committed providing total customer solutions, which seen debugging software hardware they've developed their 8051 80390 processor cores. Digital Core Design (DCD), privately held company founded 1999, located Bytom, Poland, with U.S. sales office Texas. Connection Cores from
Connection
ispLeverCORE
include line FPUs 8-bit microcontroller products. Eureka Technology, Inc. company with rich history successful customer engagements that specializes system core logic peripherals. company offers wide range silicon proven system core logic functions peripheral functions support different standards including PowerPC, ARM, MIPS, SH2/3/4, PCI, Cardbus, SDRAM, CompactFlash PCMCIA. Founded 1993, Eureka Technology headquartered Altos, Connection Cores from Eureka Technology include CompactFlash Adapter line PowerPC interface products. ispLeverCORE Connection launch, Connection Partners have implemented over flagship cores multiple Lattice devices total products). These cores shown both Lattice website (www.latticesemi.com/ partners' websites. initial Connection Cores include microprocessors, math building blocks, UARTs, interfaces. Connection Cores have been extensively tested most cases have history successful customer usage. complete packages approved Connection Cores include following: Source code, netlist, bitstream implementation Constraints preferences files Testbenches simulation Documentation including ispLeverCORE Connection Data Sheet
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(ispLeverCORE Connections Program, Cont.)
ispLeverCORE Connections Program Selector Guide CAST Cores
ORCA FPGAs FPSCs ispXPGA
Interface Cores CUSB: Device Controller Core CUSB: Device Controller Core Serial Peripheral Interface Master/Slave Core Communication Cores H16550S: UART with FIFOs Synchronous Interface Core Processor, Controller Peripheral Cores C8051: Legacy-Speed 8-bit Processor Core R8051: 8-bit RISC-like Microcontroller Core SDLC: Controller Core
Eureka Technology Cores
EP100: PowerPC Slave EP201: PowerPC Master EP300: PowerPC Arbiter
Processor, Controller Peripheral Cores
EP510: Compact Flash/PCMCIA Host Adapter
Other supporting files such scripts, wrappers, etc. Connection Cores available netlist format immediate purchase from Connection partner. Connection partners also offer variety additional packaging licensing options suit customer's specific needs. leveraging partner products, customers quickly implement wide variety functions Lattice programmable devices. ispLeverCORE Connection partners also available custom design work customers implementing programmable solutions using Lattice devices. Check ispLeverCORE Connection products website today! ispLeverCORE Approved Quality Connection Cores reviewed determine that they have Lattice's recommended tool flow high-quality standards. Connection partners certify Lattice that cores have been successfully implemented with Lattice's ispLEVER suite implementation tools third-party tools. Connection partner also certifies that core been thoroughly tested comply with functional performance requirements applicable industry specifications. Lattice reviews each Connection Core proper development methodology, package completeness. Performance Lattice device also reviewed appropriate that particular device speed grade. Look this Approved logo ispLeverCORE Connection Products. ispLeverCORE Connection your leverage expert experienced
Digital Core Design Cores
Interface Cores DI2CM: Interface Master DI2CS: Interface Slave DI2CSB: Interface Slave Base Version DSPI: Serial Peripheral Interface Master/Slave Communication Cores D16550: Configurable UART with FIFO Basic Element/Math Cores DFPADD: Floating Point Pipelined Adder Unit DFPMUL: Floating Point Pipelined Multiplier Unit DFPDIV: Floating Point Pipelined Divider Unit DFPSORT: Floating Point Pipelined Square Root Unit DFPCOMP: Floating Point Comparator Unit DINT2FP: Integer Floating Point Pipelined Converter DFP2INT: Floating Point Integer Pipelined Converter DFPAU: Floating Point Arithmetic Unit DFPMU: Floating Point Mathematics Unit Processor, Controller Peripheral Cores DF6811: 8-Bit FAST Microcontrollers Family DF6811CPU: 8-Bit FAST Microcontrollers Family DFPIC165X: High Performance 8-Bit RISC Microcontroller DFPIC1655X: High Performance Configurable 8-Bit RISC Microcontroller DR8051CPU: High Performance Configurable 8-Bit Microcontroller D8254: Programmable Interval Timer DR8051: High Performance Configurable 8-Bit Microcontroller DR8051XP: High Performance Configurable 8-Bit Microcontroller DRPIC1655X: High Performance Configurable 8-Bit RISC Microcontroller DR80390: High Performance Configurable 8-Bit Microcontroller DR80390CPU: High Performance Configurable 8-Bit Microcontroller DR80390XP: High Performance Configurable 8-Bit Microcontroller
Approved
ispLeverCORE
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Upgrade Your Design Tools With ispLEVER Version
Lattice pleased announce update ispLEVER programmable logic design tool suite. ispLEVER v.3.1 includes number enhancements many components that comprise ispLEVER tool set. Revision Control system been expanded include ispXPLD, ispGDX2and ispMACH 4000, 5000 families. Revision Control allows organize your design into "tree". Each step design process saved branch design tree. jump point your design simply clicking appropriate branch. Improvements have been made user interface EPIC floorplanning tool. EPIC precision placement routing tool that gives total control over your ORCA® FPGA implementations. Navigation large FPGA designs easier more intuitive, more closely resembles standard look feel other Lattice tools. Improvements have also been made ispLEVER Constraint Editor. Most significantly, support available number ORCA design preferences. Previously, these preferences could only implemented source code. implementation makes advanced designs ORCA FPGAs easier develop edit. ispLEVER v.3.1 also allows edit source files while design being compiled (provided those source files actively being used software engine). example, you've already synthesized your design, waiting place route process complete. make modifications your source code, which then used second iteration design (for example, another branch revision control tree). you're waiting compilation process complete, make modifications your fitting/placement constraints. Additionally, ispLEVER v.3.1 release addresses number minor issues that have been discovered since last release. This continuous cycle improvement makes ispLEVER v.3.1 most advanced robust design tool release yet! Registered users ispLEVER with active software maintenance contracts will receive three CD-ROM upgrade ispLEVER v3.1. your software maintenance expired, renew Lattice site www.latticesemi.com/store. you're Lattice, contact your local Lattice sales representative, visit Lattice site learn more about ispLEVER, purchase software from store, download copy ispLEVER-Starter, entry-level version ispLEVER Design Tool set.
ispLEVER v.3.1 Project Navigator helps manage your ispLEVER design.
Renew Your Software Maintenace On-Line
Renewing your ispLEVER software maintenance easier than ever. Simply log-on www.latticesemi.com, click store, select product you're using. order complete renewal, you'll need provide serial number ispLEVER tool have licensed. don't know your serial number, look your ispLEVER license file (license.dat, usually located C:/isptools/ license directory). serial number identified field "KEY S/N". Lattice will notify e-mail when your maintenance expire. Notices sent days days prior expiration. still haven't renewed, we'll send final notice three days after your maintenance expired. don't wish receive these notices, just know we'll take list. With active maintenance, you'll receive latest upgrades ispLEVER design tools. Active maintenance also gives access full technical support facilities Lattice applications hotline. have questions about status your software maintenance, software maintenance program works, call 1-800-327-8636 ext.8160 send e-mail with your question lic_admn@latticesemi.com.
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Boards Available ispXPLD ispXPGA Evaluation Development
Lattice pleased announce availability development boards ispXPLD ispXPGA devices. These boards provide simple, comprehensive powerful platforms help evaluate features performance these product families, development your application. ispXPLD Evaluation Board ispXPLD Evaluation Board features 512-macrocell, 4.5ns, 1.8V ispXPLD device 256-pin fpBGA package (LC5512MC-45F256C). Four 38-pin banks available access device's total pins. board also includes 14-pin header, which suitable connection display. ispXPGA Evaluation Board ispXPGA Evaluation Board features million gate, 1.8V ispXPGA device 900-pin fpBGA package (LFX1200C-03F900C). 38-pin banks available access devices general purpose pins. board also includes 14-pin header, which suitable connection display. addition, board includes pair input pairs output pairs) connectors access ispXPGA's sysHSISERDES channels 20MHz oscillator included each board. addition, devices include integrated PLLs, eight ispXPGA, ispXPLD device. These used generate additional clock frequencies needed. Each board operates from supply. This provided from included wall adapter, from another external source. Multiple integrated ispXPGA Evaluation Board regulators, turn, provide necessary voltages on-board components. Lattice ispPAC-POWR1208 Power Manager More Information. device included each board Additional information about these provide power-on sequencboards available Lattice ing. site. Complete user guides, ispDOWNLOAD® caschematics, sample programs (pDS4102-DL2) also available download from included with each board following locations. enable programming support Lattice ispXPLD Evaluation Board: devices. This used with Lattice's programming manageindex.cfm ment software download programming files. ispVM ispXPGA Evaluation Board: System downloaded from Lattice site devtools/hardware/xpga-board/ www.latticesemi.com. index.cfm further information about ispXPGA Both boards available purispXPLD evaluation boards, chase from Lattice on-line store contact your local Lattice following address: sales representative authorized distributor.
ispXPLD Evaluation Board
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Information Need Technical Support Software Literature Download European Literature Fulfillment
www.latticesemi.com
Resource Tel: 1-800-LATTICE (408) 826-6002 e-mail: techsupport@latticesemi.com http://www.latticesemi.com Tel: (0)117 1600 FAX: (0)117 1601 e-mail: euro.lit@latticesemi.com
Lattice Listens
What features does Lattice 10Gbps SERDES (XPIO 110GXS) device support? XPIO 110GXS device 0.13-micron CMOS technology 10Gbps SERDES (Serializer/ Deserializer) that supports 10Gbps interface high speed side 16-bit/622Mbps interface speed side. high speed side XPIO device fully supports standard through specialized buffers. stands 10-Gigabit Serial Electrical Interface defined 10-Gigabit Small Form Factor Pluggable (XFP) Multi-Source Agreement (MSA Group. intended electrical interface between 10Gbps SERDES transceiver. XPIO supports continuous serial operation data rate from 9.953Gbps 10.709Gbps. speed side XPIO device fully supports SFI-4.1 XSBI standard through specialized LVDS buffers. SFI-4.1 stands OC-192 SERDES-Framer Interface defined (Optical Internetworking Forum). intended electrical interface between OC-192 framer MSA300 transponder. XPIO device supports 16-bit parallel data rate ranging from 622Mbps 670Mbps. CMOS technology 10Gbps SERDES performs necessary functions serial-to-parallel parallel-to-serial conversion with less than one-third power consumption more conventional SiGe GaAs technologies. Does Lattice offer microcontroller core? Through ispLeverCORE Connection Partners program, microcontroller cores available Lattice customers. Microcontroller cores such 8051 based, 6811 based PIC165x based imple-
mentations available through partners program. addition, other cores areas Interface, Communication Cores, Memory Controllers, Arithmetic Elements cores available either directly from Lattice from partners. Visit Lattice site www.latticesemi.com/ip more details these cores. internal clock ispPAC Power Manager devices drive other devices board? Yes. CLOCK signal ispPAC-POWR1208/604 open drain output configuration. pull-up resistor required properly drive clock output high. pull-up voltage must exceed supply voltage. frequency range clock 230kHz 330kHz. route ispXPGA primary clock output multiple pins? Yes, unique feature ispXPGA output capability primary clock output drive multiple pins. eight PLLs ispXPGA devices this same capability. Below steps necessary assign primary clock output multiple pins: hardcore block declaration parameter definition block instantiation parameters configuration. This done either with source attribute syntax with
Constraint Editor. Note that CLOCK_OUT_TO_PIN attribute should source constraint unchecked Constraint Editor. outputs. Particularly, primary clock used logic implementation order output preserved. What's ispLEVER v.3.0 (Service Pack allows ispLEVER support following devices: power ispMACH 4000Z 32-, 128-macrocell densities high performance ispGDX2 digital crosspoint switch 128-macrocell densities ispXPLD 1024-macrocell density. When select newly supported devices will notice improved Device Selector. larger window updated device information make much easier use.
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Lattice Literature
following list recently published documents, including descriptions ordering numbers. On-line versions these technical publications available Lattice site www.latticesemi.com. Some these documents also available print. order print versions, call your local Lattice representative Lattice's Literature Distribution Department 1-888-477-7537 (outside U.S. Canada, call 503-268-8000) order 503-268-8556. Europe, contact Lattice's European Literature Fulfillment Department phone (0)117 1600, (0)117 1601 e-mail euro.lit@latticesemi.com.
General Information
Title Product Selector Guide Package Selector Card Military/Aerospace Solutions Brochure Automotive Solutions Brochure ispMACH 4000Z Product Brief XPIO 110GXS Product Brief ispLeverCORE Product Brief High-Speed SERDES Briefcase Board User Manual Description Overview entire Lattice product line tabular format. Features actual size device package photos spec tables. Brochure describing Lattice's military ispLSI families that support military aerospace applications.
Order I0162 I0158 I0163 I0164 I0159 I0154 I0161
Introduction Lattice`s automotive temperature range CPLDs. Overview industry's lowest power CPLD family. Describes industry's lowest power 10Gbps SERDES device. Overview Lattice's ispLeverCORE products. Provides complete description operation schematics Lattice High-Speed SERDES Briefcase Board.
Data Sheets
Title ispMACH 4000V/B/C/Z Family Data Sheet XPIO 110GXS Data Sheet ispPAC-POWR1208 Data Sheet Description 3.3/2.5/1.8V in-system programmable SuperFAST high density PLDs. Includes information newly released 4064Z 4128Z devices. Fully integrated 10Gbps serializer/deserializer In-System Programmable power supply sequencing controller monitor. Includes automotive temperature range specs information. In-System Programmable power supply sequencing controller monitor. Includes automotive temperature range specs information. Print Order
ispPAC-POWR604 Data Sheet
Intellectual Property Data Sheets
Title CUSB: Device Controller Core Data Sheet CUSB: Device Controller Core Data Sheet Serial Peripheral Interface Master/Slave Core Data Sheet H16550S: UART with FIFOs Synchronous Interface Core Data Sheet C8051: Legacy-Speed 8-Bit Processor Core Data Sheet R8051: 8-Bit RISC-Like Microcontroller Core Data Sheet SDLC: Controller Core Data Sheet EP100: PowerPC Slave Data Sheet EP201: PowerPC Master Data Sheet These data sheets describe products from Lattice's ispLeverCORE Connections partners: Cast, Eureka Technology Digital Core Design. Description Print Order
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Lattice Literature (Cont.)
Intellectual Property Data Sheets (Cont.)
Title EP300: PowerPC Arbiter Data Sheet EP510: Compact Flash/PCMCIA Host Adapter Data Sheet DI2CM: Interface Master Data Sheet DI2CS: Interface Slave Data Sheet DI2CSB: Interface Slave Base Version Data Sheet DSPI: Serial Peripheral Interface Master/Slave Data Sheet D16550: Configurable UART with FIFO Data Sheet DFPADD: Floating Point Pipelined Adder Unit Data Sheet DFPMUL: Floating Point Pipelined Multiplier Unit Data Sheet DFPDIV: Floating Point Pipelined Divider Unit Data Sheet DFPSORT: Floating Point Pipelined Square Root Unit Data Sheet DFPCOMP: Floating Point Comparator Unit Data Sheet DINT2FP: Integer Floating Point Pipelined Converter Data Sheet DFP2INT: Floating Point Integer Pipelined Converter Data Sheet DFPAU: Floating Point Arithmetic Unit Data Sheet DFPMU: Floating Point Mathematics Unit Data Sheet DF6811: 8-Bit FAST Microcontrollers Family Data Sheet DF6811CPU: 8-Bit FAST Microcontrollers Family Data Sheet DFPIC165X: High Performance 8-Bit RISC Microcontroller Data Sheet DFPIC1655X: High Performance Configurable 8-Bit RISC Microcontroller Data Sheet DR8051CPU: High Performance Configurable 8-Bit Microcontroller Data Sheet D8254: Programmable Interval Timer Data Sheet DR8051: High Performance Configurable 8-Bit Microcontroller Data Sheet DR8051XP: High Performance Configurable 8-Bit Microcontroller Data Sheet These data sheets describe products from Lattice's ispLeverCORE Connections partners: Cast, Eureka Technology Digital Core Design. Description Print Order
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Lattice Literature (Cont.)
Intellectual Property Data Sheets (Cont.)
Title DRPIC1655X: High Performance Configurable 8-Bit RISC Microcontroller Data Sheet DR80390: High Performance Configurable 8-Bit Microcontroller Data Sheet DR80390CPU: High Performance Configurable 8-Bit Microcontroller Data Sheet DR80390XP: High Performance Configurable 8-Bit Microcontroller Data Sheet These data sheets describe products from Lattice's ispLeverCORE Connections partners: Cast, Eureka Technology Digital Core Design. Description Print Order
Lattice Attends Military/Aerospace Conference
sixth annual MAPLD Conference held September 9-11, 2003 Washington D.C. newly constructed Ronald Reagan Building International Trade Center. MAPLD Conference focuses exclusively Programmable Logic Devices military aerospace applications. such, this great opportunity Lattice promote industry leading product portfolio military, automotive industrial grade PLDs! Many military system-designers stopped Lattice booth learn more about Lattice's products. Many were impressed live "eye diagram" demonstration ORT82G5 running 3.125Gbps easily satisfying XAUI interface specifications. Attendees showed keen interest Lattice's ispXPGA family featuring non-volatility infinite reconfigurability. newly introduced
automotive versions ispPAC Power Manager family were also well received. MAPLD Conference also marked debut Lattice Military/Aerospace Solutions brochure
featuring Lattice's broad military aerospace product portfolio. This brochure available Lattice site www.latticesemi.com.
Copyright 2003 Lattice Semiconductor Corporation. Lattice Semiconductor Corporation, Lattice Semiconductor Corporation (logo), (stylized), (design), Lattice (design), E2CMOS, In-System Programmable, In-System Programmability, ISP, ispDOWNLOAD, ispGAL, ispGDX, ispGDX2, ispLEVER, ispLeverCORE, ispMACH, ispPAC, ispVM, ispXP, ispXPGA, ispXPLD, LogiBuilder, (logo), ORCA, ORCAstra, PAC-Designer, Silicon Forest, sysCLOCK, sysHSI, sysIO, sysMEM, SuperWIDE, Vantis (design), Vantis, Vantis (design) XPIO either registered trademarks trademarks Lattice Semiconductor Corporation subsidiaries United States and/or other countries. service mark Lattice Semiconductor Corporation. Synplicity Synplify registered trademarks Synplicity, Inc. Mentor Graphics, LeonardoSpectrum ModelSim either registered trademarks trademarks Mentor Graphics Corporation. Other product names used this publication identification purposes only trademarks their respective companies. LatticeNEWS publication Lattice Semiconductor Corporation, 5555 N.E. Moore Ct., Hillsboro, 97124
Order NL0105
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