Although GAL16V8 able replace number different standard PLDs, such com
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18V10 Advantage
Although GAL16V8 able replace number different standard PLDs, such common PAL16L8 PAL16R8, there times when designer needs more flexibility than standard 20-pin PLDs offer. Moving design next package size means using 24-pin 28-pin PLCC package. Often increase functionality does justify increase package size. This application brief describes most common limitations standard 20-pin GAL18V10's unique architecture allows designer much greater functionality while maintaining same 20-pin package. addition, architecture 18V10 virtually same industry-standard 22V10 device, which means that learning device architecture necessary.
GAL16V8 Emulation Mode Complex Mode (16L8) Simple Mode (16H4, etc.)
Feedback Input pins pins
More Outputs
name suggests, GAL18V10 total possible outputs. cases where more than eight outputs needed standard PLD, GAL18V10 ideal replacement. demonstration additional capability GAL18V10 eight-bit counter with carry-out signal. GAL16V8 PAL16R8 device used build eight-bit counter. However provide carry-out and/or carry-in signal, more outputs required. GAL18V10 fits bill nicely, since functional superset already flexible GAL16V8. Adding extra lines equations source file re-compiling produces JEDEC file totally pincompatible replacement, with extra functionality. Other uses additional output macrocells include implementing nine counters decoded outputs from eight nine counters. these functions could done 22V10 well extra cost), could done common 20-pin devices. Below example implementations eight-bit counter with carry-in carry-out. While this design fits GAL18V10, would require different 20-pin devices.
More Inputs
with GAL22V10, GAL18V10 macrocell structure allows greater flexibility than common 20-pin PAL-type devices. Whereas GAL16V8, because exact emulation many devices, must limit pins that have feedback configured inputs, 18V10 such limitations. Each pins GAL18V10 configured registered combinatorial, feedback capability, configured dedicated input dynamic pin.
Figure Eight-Bit Counter with Carry-In Carry-Out
Carry-Out PAL16R4 Carry-In GAL18V10 Carry-In Counter Bits PAL16R6 Carry-In Counter Bits Carry-Out Counter Bits
Carry-Out
an9004_01
July 1997
GAL18V10 Advantage
Reset Preset
Another benefit 22V10 nature GAL18V10 inclusion Asynchronous Reset Synchronous Preset registers. These dedicated product terms allow combination inputs and/or feedbacks trigger global reset preset occur. many other devices this only accomplished using valuable product terms extra design time build this capability into logic each output. Since each output these devices only seven eight product terms, addition reset/preset logic make impossible desired logic functions. Example illustrates what eighth output eight-bit counter look like. capability synchronous preset would require additional product term, which available. This same problem come complex state machine. Example Eighth Output Eight-Bit Counter Asynchronous Reset function cannot even duplicated GAL16V8 standard devices. GAL18V10 asynchronously reset, therefore simplifying power-up routine requiring clock cycle device into known state.
Flexible Output Enable
Again because exact emulation common 20pin devices, GAL16V8 limited options placement Output Enable control pins. GAL16V8 with macrocells configured registered mode always dedicated output enable register. then longer available input array. This means that combinatorial outputs that need output enable control must additional pin, since output enable control combinatorial outputs through product term. design with registered combinatorial outputs using GAL16V8 20-pin device) must always pins
!Synch_Preset
"Product "Product "Product "Product "Product "Product "Product "Product
Term Term Term Term Term Term Term Term
MORE PRODUCT TERMS AVAILABLE!
Figure Output Enable Consolidation
GAL18V10
Combinatorial Outputs Combinatorial
20-Pin
Combinatorial Outputs
Registered Outputs
Registered
Registered Outputs
GAL18V10 Advantage
output enable control outputs. GAL18V10 such restrictions. output enable control from product term, regardless whether output configured registered combinatorial. Saving 20-pin device mean difference between keeping design 20-pin device having larger (and more expensive) device. Figure illustrates GAL18V10 less than GAL16V8 20-pin device when both registered combinatorial outputs must tri-stated.
Conclusion
clear that standard architectures have definite limitations. Lattice Semiconductor first addressed this issue with GAL16V8 GAL20V8 devices, which were able replace standard 24-pin devices. replacing those same devices, adding some additional flexibility, GAL16V8 GAL20V8 devices vast improvement have become industry standard their right. However, previous examples have pointed out, there many cases where standby programmable logic architectures, even first-generation replacements, don't have flexibility required. 20-pin devices, GAL18V10 provides complete design flexibility using familiar 22V10 architecture, while maintaining ability provide pin-compatible superset GAL16V8.
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