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GAL22V10 / 883
PRESET
GAL22V10 / 883
High Performance E2CMOS PLD Generic Array Logic Features
PRESET
Functional Block Diagram
RESET
8 OLMC
10 OLMC
PROGRAMMABLE AND-ARRAY (132X44)
14 OLMC
16 OLMC
14 OLMC
12 OLMC
10 OLMC
8 OLMC
Description
Pin Configuration
CERDIP LCC
GAL 22V10
GAL22V10
Top View
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. Tel. (503) 268-8000 1-800-LATTICE FAX (503) 268-8556 http://www.latticesemi.com
February 1999
Specifications GAL22V10D / 883
Absolute Maximum Ratings(1)
Supply voltage VCC .................... -0.5 to +7V Input voltage applied .............. -2.5 to VCC +1.0V Off-state output voltage applied ..... -2.5 to VCC +1.0V Storage Temperature ................. -65 to 150°C Case Temperature with Power Applied ..................... -55 to 125°C
1. Stresses above those listed under the "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress only ratings and functional operation of the device at these or at any other conditions above those indicated in the operational sections of this specification is not implied (while programming, follow the programming specifications).
Recommended Operating Conditions
Case Temperature (TC) ................ -55 to 125°C Supply Voltage (VCC) with Respect to Ground ........... +4.50 to +5.50V
DC Electrical Characteristics
Vss - 0.5
MAX. 0.8 Vcc+1 -100 10 0.5 - 12 -2.0 -135 150
VIL VIH IIL1 IIH VOL VOH IOL IOH IOS2 ICC
Specifications GAL22V10D / 883
AC Switching Characteristics
Over Recommended Operating Conditions TEST COND.1 A A - - - A -10 -15 UNITS ns ns ns ns ns MHz
PARAMETER
DESCRIPTION Input or I / O to Combinatorial Output Clock to Output Delay Clock to Feedback Delay Setup Time, Input or Feedback before Clock Hold Time, Input or Feedback after Clock Maximum Clock Frequency with External Feedback, 1 / (tsu + tco) Maximum Clock Frequency with Internal Feedback, 1 / (tsu + tcf) Maximum Clock Frequency with No Feedback Clock Pulse Duration, High Clock Pulse Duration, Low Input or I / O to Output Enabled Input or I / O to Output Disabled Input or I / O to Asynchronous Reset of Register Asynchronous Reset Pulse Duration Asynchronous Reset to Clock Recovery Time Synchronous Preset to Clock Recovery Time - - - 6 0
tpd tco tcf2 tsu th
fmax3
MHz MHz
twh twl ten tdis tar tarw tarr tspr
1) Refer to Switching Test Conditions section. 2) Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section.
Specifications GAL22V10D / 883 Specifications GAL22V10 / 883
AC Switching Characteristics
Over Recommended Operating Conditions TEST COND.1 A A - - - A -20 -25 -30 UNITS ns ns ns ns ns MHz
PARAMETER
DESCRIPTION Input or I / O to Combinatorial Output Clock to Output Delay Clock to Feedback Delay Setup Time, Input or Feedback before Clock Hold Time, Input or Feedback after Clock Maximum Clock Frequency with External Feedback, 1 / (tsu + tco) Maximum Clock Frequency with Internal Feedback, 1 / (tsu + tcf) Maximum Clock Frequency with No Feedback Clock Pulse Duration, High Clock Pulse Duration, Low Input or I / O to Output Enabled Input or I / O to Output Disabled Input or I / O to Asynchronous Reset of Register Asynchronous Reset Pulse Duration Asynchronous Reset to Clock Recovery Time Synchronous Preset to Clock Recovery Time - - - 17 0
tpd tco tcf2 tsu th
fmax3
MHz MHz
twh twl ten tdis tar tarw tarr tspr
1) Refer to Switching Test Conditions section. 2) Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section.
Specifications GAL22V10 / 883
Switching Waveforms
INPUT or I / O FEEDBACK
VALID INPUT
INPUT or I / O FEEDBACK
VALID INPUT
COMBINATORIAL OUTPUT
Combinatorial Output
REGISTERED OUTPUT
(external fdbk)
Registered Output
INPUT or I / O FEEDBACK
OUTPUT
Input or I / O to Output Enable / Disable
REGISTERED FEEDBACK
fmax with Feedback
Clock Width
INPUT or I / O FEEDBACK DRIVING SP CLK
INPUT or I / O FEEDBACK DRIVING AR
REGISTERED OUTPUT
Synchronous Preset Asynchronous Reset
Specifications GAL22V10 / 883
fmax Descriptions
LOGIC ARRAY
REGISTER
LOGIC ARRAY
REGISTER
fmax with External Feedback 1 / (tsu+tco)
Note: fmax with external feedback is calculated from measured tsu and tco.
fmax with Internal Feedback 1 / (tsu+tcf)
LOGIC ARRAY
REGISTER
fmax with No Feedback
Switching Test Conditions
FROM OUTPUT (O / Q) UNDER TEST TEST POINT R1 +5V
3-state levels are measured 0.5V from steady-state active level. Output Load Conditions (see figure) Test Condition A B C Active High Active Low Active High Active Low R1 390 390 390 R2 750 750 750 750 750 CL 50pF 50pF 50pF 5pF 5pF
C L INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
Specifications GAL22V10 / 883
GAL22V10 Ordering Information (MIL-STD-883 and SMD)
Ordering # Tpd (ns) 10 15 20 25 30 Tsu (ns) 6 12 17 20 25 Tco (ns) 7 8 15 20 20 Icc (mA) 150 150 150 150 150 150 150 150 Package 24-Pin CERDIP 28-Pin LCC 24-Pin CERDIP 28-Pin LCC 24-Pin CERDIP 28-Pin LCC 24-Pin CERDIP 24-Pin CERDIP MIL-STD-883 GAL22V10D-10LD / 883 GAL22V10D-10LR / 883 GAL22V10D-15LD / 883 GAL22V10D-15LR / 883 GAL22V10D-20LD / 883 GAL22V10D-20LR / 883 GAL22V10D-25LD / 883 GAL22V10D-30LD / 883 SMD # 5962-8984106LA 5962-89841063A 5962-8984103LA 5962-89841033A 5962-8984102LA 5962-89841023A 5962-8984104LA 5962-8984101LA
Note: Lattice Semiconductor recognizes the trend in military device procurement towards using SMD compliant devices, as such, ordering by this number is recommended.
Part Number Description
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