Dual 10-Bit 40MSPS CMOS October 2000-2 FEATURES APPLICA

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Dual 10-Bit 40MSPS CMOS October 2000-2 FEATURES APPLICA

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XRD64L42
Dual 10-Bit 40MSPS CMOS
October 2000-2
FEATURES
APPLICATIONS
10-Bit Resolution
Monolithic Complete 10-Bit ADCs MSPS Conversion Rate On-Chip Track-and-Hold On-Chip Voltage Reference Input Capacitance TTL/CMOS Outputs Tri-State Output Buffers Single +3.0V Power Supply Operation Power Dissipation: 200mW-typ 2.7V Power Down Mode Less Than -40°C +85°C Operation Temperature Range
Medical Ultrasound Imaging Modems
BENEFITS
Reduction Components Reduction System Cost High Performance Power Dissipation Long Term Time Temperature Stability
GENERAL DESCRIPTION XRD64L42 10-bit, monolithic, MSPS ADCs. Manufactured using standard CMOS process, XRD64L42 offers power, cost excellent performance. on-chip track-and-hold amplifier(T/H) voltage reference (VREF) eliminate need external active components, requiring only external conversion clock application. XRD64L42 analog input driven with ease high input impedance 25KOhms 5pF. design architecture uses time- interleaved 10bit ADCs each converter achieve high conversion rate MSPS minimum. order insure maintain accurate 10-bit operation with respect time temperature, XRD64L42 incorporates auto-calibration circuit which continuously adjusts matches offset linearity each ADC. This auto-calibration circuit transparent user after initial 3.4ms calibration (168,000 initial clock cycles). power dissipation only 200mW MSPS with +2.7V power supply. digital output data straight binary format, tri-state disable function provided common interface. XRD64L42 internal reference provides cost savings simplifies design/development. output voltage internal reference external resistors. internal reference disabled external reference used power savings 50mW.
ORDERING INFORMATION
Part Number XRD64L42AIV Package Type 64-Lead TQFP Temperature Range -40°C +85°C
Rev. P2.00
EXAR Corporation, 48720 Kato Road, Fremont, 94538 (510) 668-7000 (510) 668-7017
XRD64L42
VCLMPA VINA+ VINA-
Bandgap
A/D's
VFBK VRHF
DA0, OTRA TRI_A DIFF SYNCO CKIN CLAMP
CONTROL LOGIC
A/D's
VRLF
VCMO
DB0, OTRB TRI_B
VCLMPB VINB+ VINB-
Figure XRD64L42 Simplified Block Diagram
Rev. P2.00
XRD64L42
DOGND
DOVDD
DGND
DVDD
OTRA
OTRB
VCMO DGND AGND AVDD AGND AGND VINBVINB+ AGND VINA+ VINAAGND AVDD AVDD AGND AGND
DGND DOVDD DOGND SYNCO CKIN TRI_A
XRD64L42 64QFP
VCLMPA
VCLMPB
VFBK
Rev. P2.00
CLAMP
VRLF
VRHF
VRHF
VRLF
AGND
TRI_B
DGND
DGND
DVDD
DIFF
XRD64L42
DESCRIPTION
Symbol VFBK VRHF VRHF VRLF VRLF VCLMPA VCLMPB AGND DGND DGND DVDD TRI_B DIFF CLAMP TRI_A CKIN SYNCO DOGND DOVDD DGND OTRB DOVDD DOGND DVDD
Description Bandgap Voltage Output Analog Reference Feedback Voltage Reference Force Voltage Reference Force Bottom Voltage Reference Force Bottom Voltage Reference Force Analog Input Clamp Analog Input Clamp Analog Ground Digital Ground Digital Ground Power Down Digital Supply Voltage Tri-state Channel Outputs Differential Single-Ended Input Mode Digital Clamp Control Tri-state Channel Outputs Clock Input Data Valid Output Digital Output (LSB) Digital Output Digital Output Digital Output Ground Digital Output Supply Voltage Digital Ground Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output Digital Output (MSB) Over Range Digital Output Digital Output (LSB) Digital Output Digital Output Digital Output Digital Output Digital Output Supply Voltage Digital Output Ground Digital Supply Voltage
Rev. P2.00
DESCRIPTION (CONT'D)
Symbol DGND OTRA VCMO DGND AGND AVDD AGND AGND VINBVINB+ AGND VINA+ VINAAGND AVDD AVDD AGND AGND Description Digital Ground Digital Output Digital Output Digital Output Digital Output Digital Output Over Range Digital Output Differential Common Mode Voltage Output Digital Ground Analog Ground Analog Supply Voltage Analog Ground Analog Ground Analog Input B(-) Analog Input B(+) Analog Ground Analog Input A(+) Analog Input A(-) Analog Ground Analog Supply Voltage Analog Supply Voltage Analog Ground Analog Ground
XRD64L42
Rev. P2.00
XRD64L42
ELECTRICAL CHARACTERISTICS TABLE (CONT'D) Test Conditions (Unless Otherwise Specified) 25°C AVDD DVDD +3.0V, +2.5V, VRLF GND, VRHF +2.5V MSPS, Duty Cycle, Differential Input Mode
Symbol Parameter Min. Typ. Max. Unit Conditions
ACCURACY Differential Non-Linearity Integral Non-Linearity Monotonicity Full Scale Error Zero Scale Error -0.75 +/-0.25 +/-0.5 Missing Codes Guaranteed Test F.S. (VRHF VRLF)x0.97 Single Ended Mode
ANALOG INPUT INVR INRES INCAP INBW Input Voltage Range Input Resistance Input Capacitance Input Bandwidth
VRHFx0.97
KOhms
VRLF Grounded
-1dB Small Signal
REFERENCE INPUT, INTERNAL BANDGAP REFERENCE REFERENCE BUFFER RLAD RLADTCO Ladder Resistance Ladder Resistance Tempco Bandgap Output Voltage Range VBGTC Bandgap Reference Tempco VRLF VRHF VRHF External Reference VRLF+ VRLF+ VRHF PSRR Internal Reference Buffer CONVERSION TIMING CHARACTERISTICS 10pF) APJT tden tdis CLKDC Aperture Jitter Time Digital Output Rise Time Digital Output Fall Time Output Data Propagation Delay Output Data Enable Delay Output Data Disable Delay Clock Duty Cycle Guaranteed Design Guaranteed Design mV/V Guaranteed Design Peak-to Peak AVdd External AVdd-0.3 Internal Reference Buffer ppm/°C 1.15 +0.8 1.25 1.35 Ohms Ohms/°C
Rev. P2.00
XRD64L42
ELECTRICAL CHARACTERISTICS TABLE (CONT'D) Test Conditions (Unless Otherwise Specified) 25°C AVDD DVDD +3.0V, +2.5V, VRLF GND, VRHF +2.5V, Duty Cycle, Differential Input Mode
Symbol Parameter Min. Typ. Max. Unit Conditions
DYNAMIC PERFORMANCE 40MHz Signal-to-Noise Ratio 10.0 SINAD Signal-to Noise Distortion ENOB EFFECTIVE NUMBER BITS SFDR SPURIOUS FREE DYNAMIC RANGE SFDR Crosstalk fin1 fin2 Intermodulation Distortion Including Harmonics
Rev. P2.00
XRD64L42
ELECTRICAL CHARACTERISTICS TABLE (CONT'D) Test Conditions (Unless Otherwise Specified) 25°C AVDD DVDD +3.0V, +2.5V, VRLF GND, VRHF +2.5V MSPS, Duty Cycle, Differential Input Mode
Symbol DVINH DVINL DIINH CKIN DIFF TRI_A/TRI_B DIINL CKIN DIFF TRI_A/TRI_B DINC DOHV DOLV Parameter Digital Input High Voltage Digital Input Voltage Min. Typ. Max. Unit Conditions
DIGITAL INPUTS
Digital Input High Current (The DIFF input internal pull-up resistor, TRI_A, TRI_B, CLAMP have internal pull-down resistors Clock Input Differential/Single-Ended Input Channel Tri-State -125.0 -90.0 -50.0 Digital Input Current (The DIFF input internal pull-up resistor, TRI_A, TRI_B, CLAMP have internal pull-down resistors Clock Input Differential/Single-Ended Input Channel Tri-State Digital Input capacitance Digital Output High Voltage Digital Output Voltage High-Z Leakage -100 DVdd -0.4V -1.0 0.25 DVdd0.3V -5.0 50.0 0.05 90.0 125.0 -1.0 -1.0 0.05 -0.25
DIGITAL OUTPUTS
Rev. P2.00
XRD64L42
ELECTRICAL CHARACTERISTICS TABLE (CONT'D) Test Conditions (Unless Otherwise Specified) 25°C AVDD DVDD +3.0V, +2.5V, VRLF GND, VRHF +2.5V MSPS, Duty Cycle, Differential Input Mode
Symbol Parameter Min. Typ. Max. Unit Conditions
POWER SUPPLIES AVDD DVDD Analog Power Supply Voltage Digital Power Supply Range MHz, AVDD DVDD 2.7V, 10pF, 10MHz (Includes Iref Current) AIDD DIDD DOIDD Analog Supply Current Digital Supply Current Output Driver Current AVDD DVDD AVDD
PDISS Power Dissipation MHz, AVDD DVDD 3.0V, 10pF, 10MHz (Includes Iref Current) AIDD DIDD DOIDD Analog Supply Current Digital Supply Current Output Driver Current
PDISS Power Dissipation POWER DOWN CURRENT Power Down Current
ABSOLUTE MAXIMUM RATINGS +25°C unless otherwise noted)1,
Notes:
Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation above this specification implied. Exposure maximum rating conditions extended periods affect device reliability. input which value outside absolute maximum ratings should protected Schottky diode clamps (HP5082-2835) from input supplies. inputs have protection diodes which will protect device from short transients outside supplies less than 100mA less than 100ms. refers AVDD DVDD. refers AGND DGND
Rev. P2.00
2000V
Inputs Outputs Storage Temperature
+0.5 -0.5V +0.5 -0.5V +0.5 -0.5V +0.5 -0.5V -65°C 150°C
+7.0V
Lead Temperature (Soldering seconds) 300°C Maximum Junction Temperature 150°C Package Power Dissipation Ratings (TA= +70°C) SSOP 89.4°C/W
XRD64L42
Figure SINAD 40.0MHz, DIFFERENTIAL INPUT MODE
Figure Spectrum @Fclock 40.0MHz, 4.0MHz, DIFFERENTIAL INPUT MODE
Figure Spectrum @Fclock 40.0MHz, 10.0MHz, DIFFERENTIAL INPUT MODE
Figure SINAD 40.0MHz, SINGLE-ENDED INPUT MODE
Rev. P2.00
XRD64L42
Figure Spectrum @Fclock 40.0MHz, 4.0MHz, Single-ended INPUT MODE
Figure Spectrum @Fclock 40.0MHz, 10.0MHz, Single-ended INPUT MODE
Rev. P2.00
XRD64L42
NOTICE EXAR Corporation reserves right make changes products contained this publication order improve design, performance reliability. EXAR Corporation assumes responsibility circuits described herein, conveys license under patent other right, makes representation that circuits free patent infringement. Charts schedules contained here only illustration purposes vary depending upon user's specific application. While information this publication been carefully checked; responsibility, however, assumed accuracies. EXAR Corporation does recommend products life support applications where failure malfunction product reasonably expected cause failure life support system significantly affect safety effectiveness. Products authorized such applications unless EXAR Corporation receives, writing, assurances satisfaction that: risk injury damage been minimized; user assumes such risks; potential liability EXAR Corporation adequately protected under circumstances.
Copyright 2000 EXAR Corporation
Datasheet October 2000 Reproduction, part whole, without prior written consent EXAR Corporation prohibited.
Rev. P2.00

Dual 10-Bit 40MSPS CMOS October 2000-2 FEATURES APPLICA

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