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XE16BB10 Enhanced Channel Correlator Features channels,


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Data Sheet XE16BB10 Enhanced Correlator
XE16BB10
Enhanced Channel Correlator
Features
channels, correlators Operating voltages: VDDC (Core Power Supply Voltage): 1.6V 2.0V VDDR Power Supply Voltage): 2.7V 3.3V Ultra power consumption Core maximum current 3.0mA 1.8V Four power control states Serial Interface: UART: Full duplex asynchronous, 2.4k, 115.2k
General Description
XE16BB10 part XE1610 chipset based advanced FirstGPS architecture. This enhanced channel correlator designed receive decode digital signals from Colossus enhanced correlator outputs measurements (i.e pseudorange, carrier phase, Doppler etc.) "Navigation Platform" where these measurements used compute position, velocity and/or time solutions. enhanced channel, correlators design enables parallel tracking (1.575 GHz) frequency.
Applications Ordering Information
Part XE16BB10I11 (shipped only part XE1610 kit) Temp. range 85°C Pin-package SO16NB
Laptop computer Palmtop Leisure Sports receiver Asset management tracking Automotive Cell phone
Cool Solutions Wireless Connectivity
XEMICS e-mail: info@xemics.com web: www.xemics.com
Data Sheet XE16BB10 Enhanced Correlator
Functional Description
XE16BB10 enhanced channel correlator designed receive decode digital signals from Colossus enhanced correlator outputs measurements (i.e pseudorange, carrier phase, Doppler etc.) "Navigation Platform" where these measurements used compute position, velocity and/or time solutions. enhanced channel, correlators design enables parallel tracking (1.575 GHz) frequency.
Features
channels that output pseudorange, carrier phase Doppler Operating voltages: VDDC (Core Power Supply Voltage): 1.6V 2.0V VDDR (Colossus Power Supply Voltage): 2.7V 3.3V Ultra power consumption Core maximum current 3.0mA 1.8V Four power control states Serial Interface: UART: Full duplex asynchronous channel with fixed data format data bits, stop parity Speed (baud): 2.4k, 9.6k, 14.4k, 19.2k, 28.8k, 38.4k, 57.6k, 115.2k SO16NB package (Footprint: 9.9mm 6.0mm: Pitch: 1.27mm) Extended operating temperature range: -40°C 85°C
Architecture
Power
Colossus
XE16BB10
SCLK Sampling Clock MCLK Master Clock
Measurements
D0205-129
Data Sheet XE16BB10 Enhanced Correlator
General Application
enhanced channel correlator digital front-end part receiver. receives digital signal from Colossus front-end decodes data contained this signal. measurement outputs available both parallel port serial port. Application information fine-tuning available datasheet.
3330R/38743
XE16BB10
D0205-129
Data Sheet XE16BB10 Enhanced Correlator
Block Diagram
MCLK* CLOCK MANAGEMENT SCLK* MSECIN
CHANNEL CHANNEL CR816
PWRRF* IRF* QRF*
CHANNEL
D[7:0] DROM SRAM UART PPORT
TCTOUT
Channel correlator embedded micro-controller: CoolRISC816 (CR816). on-chip controller coordinates various measurement functions interfaces with host system. communication host system "navigation platform" takes place through proprietary protocol uses standard RS232 link. Direct access CR816 micro-controller possible. channel correlation functions invoked through that part navigation software running host processor.
D0205-129
Data Sheet XE16BB10 Enhanced Correlator
Absolute Maximum Ratings Storage Conditions
External Conditions power supplies chip need properly decoupled. This means that least external capacitor must connected between each positive supply (VDDx). Absolute Maximum Ratings Stresses above those listed this clause cause permanent damage device. Functional operation device implied these other conditions excess those given operating range section. Exposure absolute maximum ratings extended periods affect device reliability Parameter VDDC VDDN VDDR Description core power supply voltage navigation interface power supply voltage front-end power supply voltage Ambient temperature under bias Unit
Operating Range Operating ranges define limits functional operation parametric characteristics device. Functionality outside these limits implied. Total cumulative dwell time outside normal power supply voltage range ambient temperature under bias, must less than 0.1% useful life defined. Parameter VDDC VDDN VDDR VIHN VILN VIHR VILR VOHN VOLN VOHR VOLR IPWRRF IoutN, source Description Core power supply voltage Navigation interface power supply voltage front power supply voltage High level input voltage Navigation level input voltage Navigation High level input voltage level input voltage High level output voltage Navigation level output voltage Navigation High level output voltage level output voltage Power current Current source VDDN supply (VOH= 2.4V) VDDN VDDR VDDN VDDR Unit
D0205-129
Data Sheet XE16BB10 Enhanced Correlator Operating Range continued Description Current sink VDDN supply (VOL=0.4V) Current source VDDR supply (VOH=2.4V Current sink VDDR supply (VOL=0.4V) Ambient temperature Maximum input riding time from Maximum input falling time from Load capacitance SCLK output Load capacitance parallel port outputs Load capacitance output Load capacitance TOUT Load capacitance PWRRF Load capacitance other outputs Unit
Parameter IoutN, sink IoutR, source IoutR, sink Tamb trise tfall Clsclk Clpp Cltx Cltc Clprwrf Clother
Power consumption increases with capacitance values. Current consumption Typical current consumption core reached under following assumptions: VDDC 1.8V Freq(SCLK) 4.185 Freq(MCLK) 12.504 Freq (parallel port) 14kWords/sec. Freq CR816 3MHz Maximum current under these assumptions: 3.4mA Storage conditions Temperature should range -55°C +110°C case deliveries bag, conditions maximum storage period years follows Ambient Temperature (°C) Relative humidity
D0205-129
Data Sheet XE16BB10 Enhanced Correlator External Stress Immunity
Electrostatic discharges: device withstands 2000 volts Standardized Human Body Model pulses when tested according MIL883C method 3015.5 (pin combination Latch-up: Static latch-up protection level 300mA 25°C when tested according JEDEC
Packages Pin-out
Available Packages circuit delivered 16-pin 28-pin package. Part chip functionality lost when chip enclosed 16-pin package. SO16NB
VDDN TOUT PWRRF MCLK SCLK
SO16NB
MSECIN VDDC VDDR
Name VDDN TOUT PWRRF MCLK SCLK VDDR VDDC MSECIN
Description Power Supply pads connected platform Test Enable Temperature controlled oscillator compensation Temperature controlled oscillator square-wave output Temperature controlled oscillator input from thermistor Power Colossus chip (digital circuit) Master clock input Sample clock Incoming data, data changes with leading edge SCLK Incoming data, data changes with leading edge SCLK Power Colossus chip Core power supply Receive input UART Transmit output from UART Synchronization other Ground
D0205-129
Data Sheet XE16BB10 Enhanced Correlator TSSOP28
VDDN TOUT PWRRF MCLK SCLK
TSSOP28
MSECIN nINT VDDC VDDR
Name VDDN TOUT PWRRF MCLK SCLK VDDR VDDC nINT MSECIN
Description Power Supply pads connected platform Test Enable Parallel port Chip Enable signal Parallel port Read/Write signal Parallel port data Parallel port data Parallel port data Parallel port data Temperature controlled oscillator compensation Temperature controlled oscillator square-wave output Temperature controlled oscillator input from thermistor Power Colossus chip (digital circuit) Master clock input Sample clock Incoming data, data changes with leading edge SCLK Incoming data, data changes with leading edge SCLK Power Colossus chip Core power supply Receive input UART Transmit output from UART Parallel port data Parallel port data Parallel port data Parallel port data Parallel port ready signal Parallel port data interrupt signal Synchronization other Ground
D0205-129
Data Sheet XE16BB10 Enhanced Correlator Mechanical drawings
0.2280 0.2440
0.034 0.048
0.050 0.060 0.040 0.060
0.3859 0.3937 0.054 0.088 0.013 0.020
0.150 0.155 0.008 0.010
0.016 0.050
0.248 0.256
0.033 0.037 0.040 0.060 0.047 0.007 0.011
0.169 0.177 0.005 0.008 0.020 0.030
XEMICS 2002 rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent other industrial intellectual property rights. XEMICS PRODUCTS DESIGNED, INTENDED, AUTHORIZED WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION XEMICS PRODUCTS SUCH APPLICATIONS UNDERSTOOD UNDERTAKEN SOLELY CUSTOMER'S RISK. Should customer purchase XEMICS products such unauthorized application, customer shall indemnify hold XEMICS officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs damages attorney fees which could arise.
CoolRISC trademark Xemics S.A. FirstGPS Colossus trademarks Trimble Navigation Limited
D0205-129

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