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XE1209 FEATURES Single chip transceiver cost external compon
Top Searches for this datasheetDatasheet XE1209 Ultra Power CMOS Transceiver XE1209 FEATURES Single chip transceiver cost external component count Ultra Power Stand-by mode Carrier detection mode Low-power receiver mode Unlicensed frequency band Short range applications; meters Ultra Power CMOS Transceiver XE1209 CMOS Ultra Low-Power transceiver short-range frequency data communications system. uses 2-level Continuous Phase modulation. receiver section includes preamplifier, down-converter, channel filters, demodulator synchronizer, which delivers synchronized data output. transmitter section composed Direct Digital Synthesizer (DDS), power amplifier generating square-wave output current. XE1209 carrier detector detect presence signal carrier frequency. local clock based 32kHz crystal oscillator generate required Local oscillator (LO) frequency. XE1209 simple interface with external microcontroller. APPLICATIONS Remote control Short Range Wireless data Access control ORDERING INFORMATION Part number XE1209C012 Temperature range -10°C +60° Package SO20 Cool Connect XEMICS e-mail: info@xemics.com web: www.xemics.com Datasheet XE1209 Ultra Power CMOS Transceiver DESCRIPTION Name TEST VDDA QOUT VSSA IREF VREF SUPTEST VSSPA PAOUT DCLK DATA Description Test Ground digital Xtal input external clock Supply voltage analog Xtal Ground analog Iref node external resistance Vref node external capacitance Test Receiver enable input signal input signal Ground power amplifier power amplifier output Supply voltage digital Received data clock output Input/output stream output carrier detector Data enable 3-wire communication Data input 3-wire communication Clock input 3-wire communication TYPICAL APPLICATION product used system frequency data communications. transmission made with 2-level CPFSK modulation. modulated signal carrier frequency deviation frequency coding data following: fRFin fRFin "0". Figure below shows structure transceiver external components required application. 3-wire allows product receive configuration data from microcontroller. Note: TEST remains unconnected Figure Application diagram TEST SUPTEST VDDA Cvdd VSSA 68mH Carrier Detector Sine Filter Pass Filter Limiter Demodulator DATA 68mH 150k 2.2nF Preamp Sine Filter Pass Filter Cvref 30uH 280K Riref VREF Current/ Voltage Limiter Synchronizer DCLK IREF Sequencer Power Management Phase/ Frequency Detector Loop Filter Progr. Divider XTAL Oscillator Serial Interface PAOUT VSSPA Progr. Power Phase QOUT Xtal D0205-51 Datasheet XE1209 Ultra Power CMOS Transceiver Typical external components Besides components needed communication itself, following external components required: Name Type Pins connected Value Cvdd Capacitor Cvref Capacitor VREF Riref Resistance IREF Xtal Crystal QOUT 32.768 reference crystal used Xtal following: "DS26 watch crystal" from Micro Crystal Switzerland Tolerance Max. Temp. variation over over ppm/K over GENERAL FUNCTIONAL DESCRIPTION XE1209 composed main functional blocks: Receiver receiver channel converts 2-level CPFSK modulated signal into stream. composed following blocks: preamplifier, down-converters (0-IF architecture), channel filters, limiters, demodulator, synchronizer. Transmitter transmitter performs modulation input bit-stream. main parts this block (Direct Digital Synthesizer), generating digital signal with modulated period, power amplifier generating square-wave output current controlled output DDS. Carrier detector function this block detect presence signal carrier frequency Clock generator clock generator composed quartz oscillator generating reference signal 32.768 kHz, (Phase Locked Loop), whose function deliver signal frequency which multiple oscillator output; multiplying factor programmable values. Service block This block provides whole circuit with required voltage references current sources. Digital part digital part main functions: implement 3-wire interface communication with external microcontroller. generate internal signals according selected mode operation content configuration register product four operating modes: standby mode (M1), where blocks powered this mode, oscillator either according value (called OSC) stored configuration register), carrier detector mode (M2), where only carrier detector active, transmitter mode (M3), where transmitter powered receiver mode (M4), where receiver powered D0205-51 Datasheet XE1209 Ultra Power CMOS Transceiver input configuration register determine mode setting. Table gives status main blocks each mode. standby Receiver Transmitter Carrier detector Clock generator Service block Digital part ON/off carrier detection Table Mode selection When oscillator (bit OSC=0), external clock applied QIN. ABSOLUTE MAXIMUM RATINGS, OPERATING RANGES EXTERNAL CONDITIONS Parameters Conditions Unit Storage temperature range Operating temperature range Operating supply voltage FREF_EXT reference External oscillator, 32.735 32.768 32.800 frequency VDD=2.6 temp=25 CL_CK External capacitate Full range supply load temperature IL_CK External leakage Full range supply current temperature RP_OSC Parasitic resistance Full range supply between pins QIN, temperature QOUT other ASIC CP_OSC Parasitic capacitance Full range supply between pins QIN, temperature QOUT other ASIC Stresses above those listed this clause cause permanent device failure. Exposure absolute maximum ratings extended periods affect device reliability. Electrostatic discharges: device withstands 2000 Volts Standardized Human Body Model pulses when tested according MIL883C method 3015.5 (pin combination Latch-up: Static latch-up protection level 30mA Symb STO_TR D0205-51 Datasheet XE1209 Ultra Power CMOS Transceiver ELECTRICAL SPECIFICATIONS Electrical specifications defined VDD=2.6 Temp=25 fc=36.86 kHz, data rate 1820 bit/s, unless otherwise specified. Symb IDDS1 IDDS2 Parameters Standby current Standby current Conditions Oscillator stopped Oscillator active, VDD=3V, Temp= +60°C, unloaded Temp Temp Load resistance ohms connected between PAOUT, programmable through 3-wire 0.15 Unit IDD1 IDD2 ISINK Supply current carrier detection mode (M2) Supply current receiver mode (M4) Sink current transmitter mode (peak value) 5.65 2.60 1.35 1.80 32.768 589.82 720.90 1000 36.86 45.05 5000 1820 1872 9.35 4.40 2.25 591.00 722.35 bit/s FREF MAXIN ATT3 CMRR FDEV reference frequency frequency differential input resistance differential input capacitance sensitivity Maximum effective input signal Transmission carrier frequency Adjacent channel rejection 30.6 Adjacent channel rejection 110.58 Common mode rejection ratio Receiver -3dB Bandwidth Data rate Frequency deviation Carrier detector level FC=36.86 rising edges measured output 900us time window RFSmin Rsource=100,BER=10 RFSmin Rsource=100,BER=10 RFSmin Rsource=100,BER=10 FC=36.86 kHz, Programmable 3-wire 588.65 719.45 Rsource=100 BER=10 Without signal parasitic D0205-51 Datasheet XE1209 Ultra Power CMOS Transceiver Symb Parameters Receiver Activation time Conditions from carrier-detector mode with oscillator running temp =-10 +60°C Unit XOAC Xtal oscillator activation time Logical level Logical high level 0.8*VDD 0.2*VDD INPUT/OUTPUT SIGNALS Transmit Mode transmitter composed power amplifier. 12-bits counter, which incremented 256+13 when input data 256-13 when input data This way, frequency deviation equal FREF Where multiplying factor PLL, FREF frequency reference clock. With N=18 FREF=32.768 kHz, expression gives f=1872 power amplifier delivers square wave current whose amplitude programmable (see configuration register section below). figure below shows shapes signals when, example, ISINK=110 transmitter processes input data real time without additional sampling filtering, which means that data rate does depend XE1209. output sink current ISINK D0205-51 Datasheet XE1209 Ultra Power CMOS Transceiver Receive Mode data available receiver output valid between data period (1/DR) after rising edge clock (DCLK) shown figure below. received data rate must 1820 bit/s proper synchronizer operation. addition, synchronizer needs least transition (from from "1") every bits present input. 1/DR 1/DR 1/DR DATA DCLK beginning reception, synchronizer needs receive preamble which sequence sent alternatively. Carrier Detection Mode Carrier Detection mode active when configuration register input signal present inputs amplified compared voltage threshold. When signal present input, comparator output square wave frequency equal frequency signal. This signal into 3-bit counter, whose output directly available DATA pin. this case, DATA signal square wave whose frequency carrier frequency. (TR=0) RFIN (shown square wave) DATA D0205-51 Datasheet XE1209 Ultra Power CMOS Transceiver carrier detector set-up time (after input 4.85ms when carrier frequency 36.86 kHz. applications where carrier detector turned relative long period (tens hundreds ms), recommended reset block with short transition stand-by mode (RE=0). timing diagram carrier detection shown below when signal present input function programmed PROGRAMMING DATA INTERFACE Programming XE1209 performed through 3-wire interface shown below. enable signal goes same time falling edge (that with maximum delay between each other ns). From rising edge XE1209 will sample data present first falling edges whatever following sequence proper data transfer, data must stable microseconds before after each falling edge values well must kept constant (either VSS) during time where XE1209 effective modes Configuration Register content configuration register received data during 3-wire communication. described below. first TEST SENS D0205-51 Datasheet XE1209 Ultra Power CMOS Transceiver Name SENS TEST Description Carrier frequency Transmission flag Power level Power level Power level Carrier detector threshold Test flag Oscillator flag Convention 45.05 Mode (RE=0) Mode (RE=1) 36.86 Mode (RE=0) Mode (RE=1) (see Table Normal mode External oscillator Test mode Internal oscillator Table Configuration register Correspondence between word current sinked power amplifier shown below. words reserved test purposes. Power amplifier current Table Sink current levels (register) (input pin) Mode (standby) (carrier detector) (transmitter) (receiver) Table Mode selection Upon start-up, reset XE1209 required configuration register proper default mode. This done sending binary word 'b00000000 circuit using 3-wire bus, while setting "0". XEMICS 2002 rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent other industrial intellectual property rights. XEMICS PRODUCTS DESIGNED, INTENDED, AUTHORIZED WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION XEMICS PRODUCTS SUCH APPLICATIONS UNDERSTOOD UNDERTAKEN SOLELY CUSTOMER'S RISK. Should customer purchase XEMICS products such unauthorized application, customer shall indemnify hold XEMICS officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs damages attorney fees which could arise. D0205-51 Other recent searchesORT82G5 - ORT82G5 ORT82G5 Datasheet ORT42G5 - ORT42G5 ORT42G5 Datasheet MAPLST2122-060CF - MAPLST2122-060CF MAPLST2122-060CF Datasheet IIA2010-N - IIA2010-N IIA2010-N Datasheet IEC1000-4 - IEC1000-4 IEC1000-4 Datasheet IEC1000-3-2 - IEC1000-3-2 IEC1000-3-2 Datasheet HCF4008B - HCF4008B HCF4008B Datasheet EMM5079X - EMM5079X EMM5079X Datasheet AN9728 - AN9728 AN9728 Datasheet AM27SURD09 - AM27SURD09 AM27SURD09 Datasheet AIIGX51012-2 - AIIGX51012-2 AIIGX51012-2 Datasheet
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