2.1i FPGA Editor XAPP401 (Version 1.0) October 1999 Summary/
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2.1i FPGA Editor
XAPP401 (Version 1.0) October 1999
Summary/ Introduction
This application note presents new, easier FPGA Editor differs from previous version EPIC. general FPGA Editor usage, refer FPGA Editor Guide.
This application note will also cover return EPIC type actions zoom actions.
FPGA Editor EPIC
FPGA Editor Overview
FPGA Editor written using Microsoft® MFCs allowing Windows look feel along with functionality that EPIC support. functions allow many ease features. Important functionality also added enhance editor. addition following features listed, controls like shift select selecting contiguous list items control select selecting non-contiguous items list have been implemented.
Probing Internal Signals
FPGA Editor taken "probe" script added feature. probe capability allows user into internal signal route external analysis. FPGA Editor automated probe feature, allowing user specify signal whether user wants specify tool pick best IOB. tool configures IOBs routes signal automatically. bitstream generated from probe dialog. Downloading through Hardware Debugger from dialog also possible. This prevents user from having invoke other tools just signal. Probe accessed selecting either "Probes" button right side editor from Tools pulldown menu. bring internal signal simply enter name package probed i.e., "DPO<3>", choose internal signal wish probe from list window, enter package number wish probe just seconds Probe will route signal selected (see Figure Perhaps best uses Probe give list possible package pins. large, congested design, this improve odds routing internal signals. very effective method accomplishing this enter package pins side FPGA. Probe will route each these, pick with shortest routing delay.
XAPP401 (Version 1.0) October 1999
www.xilinx.com 1-800-255-7778
2.1i FPGA Editor
Figure Probes Dialog
List Window Functions
list windows have taken advantage graphics libraries supply more design information user. Information presented spreadsheet that allows user sort variety columns. instance with "All Nets" displayed, user sort list nets fanout. This allows user high fanout nets together. "Determining Skew" evaluating skew these nets. example replace "Max Delay" column with delay value, select net(s) that want delay press "Delay" button buttons down right side. also create button this selected nets, type following command line:
button "net delays" "select delay"
have this alias available each time FPGA Editor invoked, your fpga_editor_user.ini described section "Editing fpga_editor_user.ini Files". "Selected" column allows user bring together list items that contiguous when sorted other columns. user selected several items throughout list, they then sort items "Selected" column bring then list.
Opening Multiple Windows
There several advantages allowing multiple windows open time. Several window types allow this functionality including: Array, Block, List, World. Having List windows open useful being able both nets comps (components used design such CLBs IOBs) same time following path through nets components. Having Array windows open allows user zoom into different areas interest while looking path points performing manual routing.
www.xilinx.com 1-800-255-7778
XAPP401 (Version 1.0) October 1999
2.1i FPGA Editor
Displaying Resources
EPIC used Layer Visibility window toggle different resources. FPGA Editor changed buttons turning resources. These buttons have modes controlled "Apply" button (far right button) either dynamic applied. While "Apply" button depressed state, resource buttons dynamic toggle each type resource resource button pushed. large designs where redraw time longer, quicker redraws, make sure "Apply" button position. Multiple layer buttons toggled before "Apply" button depressed, implementing changes once.
Analyzing Timing Paths
FPGA Editor used analyze highlight same timing paths that Timing tools report. highlight timing path, select Tools-> Trace-> Setup Run., Trace dialog, select constraint from Trace Summary dialog, Details, finally selecting path hi-lite button from Trace Errors dialog. full path should highlighted display window.
Determining Skew
With more nets selected, press "Attrib" button right side column buttons editor. Once dialog open, select the"Pins" tab, then click "Delay" column sort delay. Look delays first last loads subtract fastest delay from slowest, this will give skew signal (see Figure
Figure Determining Skew
Using Logical Block Editor (LBE)
Components doubled clicked enter LBE. EPIC required "SHIFT+Select". edit configuration component, "Begin Editing" button near left side buttons must pressed. When exiting, changes must saved. Exiting will prompt save changes. Press "Save Changes Closes Window" "Apply" button properly save changes.
XAPP401 (Version 1.0) October 1999
www.xilinx.com 1-800-255-7778
2.1i FPGA Editor
Printing Array Window
There several Array window printing options FPGA Editor. Printing available from EPIC. When print selected from File menu design broken into many sections needed print whole design out. Just section being shown selected along with "All" specified pages. Print Preview allows user what represented each page.
Creating Assignments
Hotkeys allow user perform common actions that require menu pulldown button. Hotkeys assigned little differently than EPIC. FPGA Editor, simply place desired hotkey letter(s) within square brackets [.]. example assign letter attribute selected item, type following command line:
alias "post attr"
this example, letter could then pressed after selecting object array window attributes dialog that object. have this alias available each time FPGA Editor invoked, your fpga_editor_user.ini described section "Editing fpga_editor_user.ini Files".
Configuring FPGA Editor Zoom like EPIC
This will allow user FPGA Editor Zoom and/or control back actions that EPIC used these functions. Note that when editing file, look other actions, aliases buttons changed.
Editing fpga_editor_user.ini Files
fpga_editor.ini file located $XILINX/data directory. this server installation changes made here will affect users. make local changes "cut paste" EPIC section into file named fpga_editor_user.ini either user's home directory directory where design (revision) exists. section fpga_editor.ini file called Define some hot-keys (accelerators) This section defines zoom actions done. following section allows these actions redefined EPIC like. Comment action first section uncomment action EPIC section. adding file, then just EPIC sections uncommented fpga_editor_user.ini file.
Revision History
Date 10.13.99
Version Initial Xilinx release.
Revision
1999 Xilinx, Inc. rights reserved. Xilinx trademarks, registered trademarks, patents, disclaimers listed other trademarks registered trademarks property their respective owners.
www.xilinx.com 1-800-255-7778
XAPP401 (Version 1.0) October 1999
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