WP151 (v1.0) September 2001 System Ace: Configuration Solution Xi
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White Paper: Configuration Solutions
WP151 (v1.0) September 2001
System Ace: Configuration Solution Xilinx FPGAs
Eric Thacker, Xilinx, Inc.
Design techniques electronic systems constantly changing. industries heart digital revolution telecommunications, networking, wireless communications this change especially acute. Functional integration, dramatic increases complexity, standards protocols, increased time-to-market pressures have bolstered both design challenges opportunities architecting modern electronic "boxes." trend driving these changes increased integration core logic with previously discrete functions achieve higher performance more compact board designs. Traditionally, ASICs have been vehicle such integration now, with their advanced system capabilities, programmable logic devices (PLDs), especially field programmable gate arrays (FPGAs), have begun take this role system design.
2001 Xilinx, Inc. rights reserved. Xilinx trademarks, registered trademarks, patents, disclaimers listed other trademarks registered trademarks property their respective owners. specifications subject change without notice.
WP151 (v1.0) September 2001
www.xilinx.com 1-800-255-7778
White Paper: System Ace: Configuration Solution Xilinx FPGAs
Trends FPGA Usage
Until recently, PLDs been used primarily "glue logic," tying various system functions together acting programmable high-speed interface logic. these instances, FPGA usage usually limited chips system. Now, however, generation FPGAs, with their integration specialized functionality expansion performance capabilities, being used core advanced electronic systems. This increasing role FPGAs heart system development been spurred part Xilinx Platform FPGA efforts integrate specialized functions high-performance application interface circuitries into FPGA fabric. flexibility increase capabilities FPGA relative ASICs, especially given pressures greatly compressed product development cycles, accelerated systems multiple FPGAs their core logic. addition, average density FPGAs designed into systems growing rapidly. According Dataquest, average individual FPGA design-in density grew 113% 1999 2000. increased usage FPGAs growing focus designing FPGA configuration. When only FPGAs were used system requiring only configuration bitstream, dedicated configuration PROM fast simple configuration solution. those cases, board space cost taken PROM offset speed ease implementing PROM-based solution. number FPGAs system need flexibility configuration grows, using multiple dedicated PROMs becomes unwieldy. such case, sometimes more efficient have centralized source configuration FPGAs. Traditionally, designers have often used embedded solution using on-board commodity Flash controlled microprocessor PLD. When microprocessor used, configuration data pulled directly from system memory over memory FPGA chain JTAG. Alternatively, PLDs paired with commodity Flash used configure FPGA chains, supplying bitstream data either serially parallel using 8-bit word faster configuration speeds. Such embedded FPGA configuration options often complex design challenges requiring valuable development bandwidth. System engineers must devote design time effort developing testing microcode having microprocessor control configuration. addition, using microprocessor manage general system startup FPGA configuration simultaneously delay startup times. There also danger contention with FPGAs competing with other resources microprocessor memory access. Embedded solutions also require extra board space additional memory used configuration storage. Boundary Scan (JTAG) used board test FPGA programming, separate trace lines scanchain-control chips also required. designs using FPGAs CPLDs configuration controllers, designers must still additional packaged part board simply convert FPGA clocks address increments and, serial mode, serialize data. FPGA also requires separate PROM configure controller.
System Technology
Given options described above growing need configuration flexibility, designers using multiple FPGAs that need large numbers configuration bits enhanced configuration flexibility were faced with need make tradeoff: self-contained, pre-engineered multi-PROM solution expense board space devote engineering development debug time design customized, spaceefficient, flexible configuration solution. meet need space-efficient, preengineered, high-density configuration solution multi-FPGA systems, Xilinx
www.xilinx.com 1-800-255-7778
WP151 (v1.0) September 2001
White Paper: System Ace: Configuration Solution Xilinx FPGAs
developed System Advanced Configuration Environment (System ACE) family configuration solutions. System series designed meet growing need flexible, high-density storage configuration control. This series combines Xilinx expertise configuration control logic with industry expertise high-density, low-cost data storage provide complete platform meeting configuration need. System product lines support multiple-bitstream management, FPGA microprocessor cores, system reconfiguration/update over network. They also provide easily scalable reusable configuration platform, built interface system processor, ability centralize configuration entire system, simplifying debug minimizing board space. three product lines System series System (CompactFlash), System (Multi-Package Module), System (Soft Controller).
System
first member this family, System using standard memory based CompactFlash standard, very flexible, high-density, two-piece configuration solution comprising Flash module Controller chip. Flash interface accommodate removable CompactFlash modules, currently ranging from Mbits over Gbit, Microdrives, currently ranging from with identical form factor board space requirement. perspective, individual VirtexTM-II FPGAs require from Kbits 29.0 Mbits configuration data, meaning configure over largest members Virtex-II family with System solution. CompactFlash gives system designers access low-cost, high-density Flash very efficient footprint that does change with density product generations. Thus designers have flexibility change density Flash needed without board redesign. Because CompactFlash removable medium, making changes upgrades memory contents density done simply exchanging removable modules programming system. Controller chip built-in control logic with variety specialized interfaces. This chip interface Flash, FPGA chain, external test environment, system microprocessor. default configuration mode takes bitstreams from memory module configures chain FPGAs Boundary Scan. There also Boundary Scan test programming interface with system prototyping debugging. There three main advantages System solution: system configuration management, upgrade management, flexible file management.
System Configuration Management
System first pre-engineered configuration solution provide both density control logic manage configuration FPGAs within system from centralized location. Centralizing configuration management minimizes board space, simplifies design modifications (either during prototyping field), opens door system microprocessors take more interactive role managing re-configuration increase system flexibility. systems with multiple boards connected through backplane, System module used board manage each board's FPGA configuration. Boundary Scan chain connects FPGAs across multiple boards through backplane, just System module used configure FPGAs across these boards.
WP151 (v1.0) September 2001
www.xilinx.com 1-800-255-7778
White Paper: System Ace: Configuration Solution Xilinx FPGAs
System also allows storage multiple bitstreams time location. This allows board design serve multiple purposes. example, slight variations FPGA-based system being shipped different markets (e.g., accommodate different interface, broadcast, electrical standards), designers design single system these markets with only difference being which bitstream inside CompactFlash used system configuration.
Upgrade Management
System solution also greatly simplifies upgrading FPGA-based systems; that required that changed bitstream stored Flash module. Because centralized, System allows designers update their entire system simply changing contents Flash module, either through physical removal in-system re-programming, making updating debugging much easier. Whether prototyping board installed system field, manually reconfiguring FPGA-based system using removable System requires little effort. In-system programming accomplished either cable network interface. Network reconfiguration System memory eliminates need direct interface enabling users update debug their systems remotely transmitting bitstream over network (e.g., internet wireless WAN). addition, ability store multiple bitstreams have microprocessor activate bitstream time allows system administrators maintain access previous versions system configuration event that problem with newly transmitted configuration discovered
Flexible File Management
file structure Flash module simplifies storage management multiple bitstreams. This multiple bitstream capability empowers designers single Flash card multiple BIST patterns, applications, store multiple bitstream variations single design (e.g., versions North America, Europe, Japan, China). Also, designers using Xilinx FPGAs with Empower!embedded processors store FPGA configuration bits processor microcode same source, with System handling initialization both FPGA cells delivery microprocessor initialization software. System also store multiple applications that used processor core deliver them needed. Designers also have flexibility store related files memory module, such release notes, revision history, user guides, FAQs, other supporting files. microprocessor interface also enables utilization unused Flash capacity purposes other than bitstream storage, e.g., generic system scratchpad memory. Designers Flash supplied Xilinx (128 standard CompactFlash modules available from variety third-party suppliers. Microdrives also used. Controller comes 144-pin TQFP package.
System
System single-package solution containing packaged FPGA PROM configuration control packaged Flash configuration storage. single-package solution simplifies manufacturing board design while reducing number part numbers that must managed configuration. Xilinx offers System 16-, 32-, 64-Mbit densities.
www.xilinx.com 1-800-255-7778
WP151 (v1.0) September 2001
White Paper: System Ace: Configuration Solution Xilinx FPGAs
Like other members System series, System uses form standard Flash memory storage medium. This makes available advances cost, voltage, performance, density that occur standard Flash market. FPGA configuration controller makes available advances performance interface voltage guarantees future FPGA compatibility. hallmark System solution support multiple configuration modes performance Mbps. System configure FPGAs ways: Slave serial bit) one, two, four, eight FPGA chains, SelectMAP bit) four FPGAs. This multiple-mode support gives customers flexibility design their boards maximize system performance while minimizing board space and/or trace lines. System configuration control technology first Xilinx configuration solution support bitstream compression. Bitstream compression enables users reduce density configuration storage density given FPGA chain. example, Virtex-II 8,000-gate FPGA requires over configuration data. Without compression, designers would have 32-Mb System configure this FPGA. Compression could reduce size bitfile size that would 16-Mb System MPM, reducing cost total solution. amount compression varies with characteristics design's pattern.
System
System downloadable version System controller, offering same capabilities implemented stand-alone FPGA without integrated single-package form factor. With System connect configuration-dedicated FPGA your board memory Flash chip configuration storage. Using downloaded bitstream configure configuration FPGA gives complete, pre-engineered configuration solution other Virtex SpartanFPGAs your system.
Software
System software integrates seamlessly with existing Xilinx programming software uses standard file management structure allowing drag-and-drop file manipulation Flash from Windows' environment. Unix versions will also available. With increased usage multiple FPGAs core logic modern electronic systems, having pre-engineered, flexible, robust configuration solution growing importance. System technology frees systems engineers from need design FPGA configuration system allows them focus their design effort maximizing system performance achieving faster time market.
Revision History
following table shows revision history this document.
Date Version Revision
09/25/01
Initial Xilinx release.
WP151 (v1.0) September 2001
www.xilinx.com 1-800-255-7778
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