Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter P

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Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter P

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HS-3374RH
Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter
Pinout
HS-3374RH MIL-STD-1835, CDIP2-T22 (SBDIP) VIEW
CMOS INPUT/OUTPUT DISABLE INPUT/OUTPUT
Features
Devices Qualified Accordance with MIL-PRF-38535 Detailed Electrical Screening Requirements Contained SMD# 5962-9XXXX Intersil' Plan Radiation Hardened EPI-CMOS Total Dose RAD(Si) Latch-Up Immune 1012 (Si)/s (Note Propagation Delay Time Typical CMOS Pre-RAD 40ns Typical CMOS Post 100K 40ns Typical CMOS Pre-RAD 50ns Typical CMOS Post 100K 50ns Standby Power +10V CMOS Power Supply Inputs Eight Non-inverting Three-State Input/Output Channels External Input Pull-Up Resistors Required High Sink Current Equivalent Sandia SA2996 Military Temperature Range -55oC +125oC
ENABLE
Description
Intersil HS-3374RH radiation hardened 8-bit bidirectional level converter designed interface CMOS logic levels with logic levels radiation hardened oriented systems. HS-3374RH fabricated using radiation hardened EPI-CMOS process features eight parallel bidirectional buffer/level converters. control inputs, ENABLE DISABLE, used determine direction data flow, both puts outputs high impedance state. control inputs driven either CMOS logic drivers capable sinking standard load. HS-3374RH non-inverting version industry standard CD40116. non-inverting outputs HS-3374RH reduce board chip count eliminating need restore data back non-inverted format.
NOTE: operation transient levels above 1010 (Si)/s, please refer Application Note 401.
Functional Diagram
DISABLE
CMOS IN/OUT
LEVEL SHIFTER
(IN) 14-21
ENABLE
Ordering Information
PART NUMBER
5962R9XXXX01QRC 5962R9XXXX01VRC HS1-3374 (SAMPLE)
TEMPERATURE RANGE -55oC +125oC -55oC +125oC +25oC
SCREENING LEVEL
MIL-PRF-38535 Level MIL-PRF-38535 Level Sample
PACKAGE Lead SBDIP Lead SBDIP Lead SBDIP
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. http://www.intersil.com 407-727-9207 Copyright Intersil Corporation 1999
Spec Number File Number
518052 3038.1
Specifications HS-3374RH
Absolute Maximum Ratings
Supply Voltage +11.0V Voltage Applied. GND-0.3V VDD+0.3V Storage Temperature Range -65oC +150oC Junction Temperature +175oC Lead Temperature (Soldering 10s) +300oC Classification Class
Thermal Information
Thermal Resistance (Typical) (oC/W) (oC/W) SBDIP Package 74.8 12.3 Maximum Package Power Dissipation +125oC SBDIP Package .0.67W Device Power Exceeds Package Dissipation Capability, Provide Heat Sinking Derate Linearly Following Rate: SBDIP Package 13.4mW/oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
Operating Conditions
+9.5V +10.5V +4.75V +5.25V Operating Temperature Range -55oC +125oC Input Voltage Range Data Inputs (CMOS) .GND-0.3 VDD+0.3 Data Inputs (TTL) .GND-0.3 VCC+0.3 Enable, Disable Inputs .GND-0.3 VDD+0.3 Operating Voltage Range Input Voltage (CMOS) Input High Voltage (CMOS). VDD-1.0V Input Voltage (TTL) 0.8V Input High Voltage (TTL) 2.8V
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL CONDITIONS GROUP SUBGROUPS TEMPERATURE UNITS
ENABLE DISABLE IINPUTS Input Leakage Current CMOS 10.5V, 5.25V, 10.5V, Floating Outputs -55oC, +25oC, +125oC
INPUT CMOS OUTPUTS Input Leakage Current 10.5V, 5.25V, 0.8V, Other Inputs 2.8V 10.5V, 5.25V, 2.8V, other Inputs 0.8V High Level Output Voltage 9.5V, 4.75V, 2.8V, 0.8V, -2.0mA 10.5V, 5.25V, 2.8V, 0.8V, 2.0mA -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC
level output Voltage
CMOS OUTPUTS High Level Output Voltage 9.5, 4.75V, 8.5V, 1.0V, -2.0mA 10.5V, 5.25V, 9.5V, 1.0V, 11mA 10.5V, 5.25V, other pins high 10.5V, 5.25V, 2.8V, other pins -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC
Level Output Voltage
Output Leakage Current
IOZL
IOZH
Spec Number
518052
Specifications HS-3374RH
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Functional Tests SYMBOL CONDITIONS CMOS: 10.5V, 5.25V 9.5V, 4.75V, VDD-1V, TTL: 10.5V, 5.25V 9.5V, 4.75V, 2.8V, 0.8V 10.5V, 5.25V, 2.8V, DISABLE 2.8V, Floating Outputs 10.5V, 5.25V, DISABLE 2.8V, Floating Outputs 10.5, 5.25V, DISABLE 2.8V, Floating Output, Measure GROUP SUBGROUPS TEMPERATURE -55oC, +25oC, +125oC UNITS
Static Current
SIDD1
-55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC
Static Current
SIDD2
Static Current
SICC
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Propagation Delay Times CMOS/TTL Data Data Propagation Delay Times CMOS Data Data Propagation Delay Times CMOS/TTL Data Data Propagation Delay Time TTL/CMOS Data Data Transition Time CMOS/TTL Input/Output Transition Time CMOS/TTL Input/Output Transition Time CMOS/TTL Input/Output Transition Time CMOS/TTL Input/Output Propagation Delay Time TTL/CMOS Enable CMOS Propagation Delay Time TTL/CMOS Enable CMOS Propagation Delay Time TTL/CMOS Enable CMOS SYMBOL TPHLCT GROUP SUBGROUPS TEMPERATURE -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC UNITS
TPLHCT
TPHLTC
TPLHTC
TTHLCT
TTLHCT
TTHLTC
TTLHTC
TPHZTC
TPZHTC
TPLZTC
Spec Number
518052
Specifications HS-3374RH
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Propagation Delay Time TTL/CMOS Enable CMOS Propagation Delay Time CMOS/TTL Disable Propagation Delay Time CMOS/TTL Disable Propagation Delay Time CMOS/TTL Disable Propagation Delay Time CMOS/TTL Disable SYMBOL TPZLTC GROUP SUBGROUPS TEMPERATURE -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC UNITS
TPHZCT
TPZHCT
TPLZCT
TPZLCT
NOTE: Timings measured with following conditions: 100pF, 9.5V, 4.75V, 8.5V (2.8V), 1.0V (0.8V).
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Input, Output Capacitance SYMBOL CMOS CI/O CONDITIONS Open, 1MHz, Measurements Referenced Device Ground Open, 1MHz, Measurements Referenced Device Ground Open, 1MHz, Measurements Referenced Device Ground TEMPERATURE +25oC +25oC +25oC UNITS
Input Capacitance
Input, Output Capcitance
CI/O
NOTE: parameters listed Table controlled design process parameters directly tested. These parameters characterized upon initial design release upon design changes which would affect these characteristics.
Spec Number
518052
HS-3374RH Functional Block Diagram
IDENTICAL CIRCUITS
CMOS INPUT (OUTPUT) LEVEL SHIFTER (20, OUTPUT (INPUT) ENABLE DISABLE LEVEL SHIFTER
LEVEL SHIFTER
NOTES: Enable disable type inputs outputs common channels INPUT (OUTPUT) DATA TERMINAL NUMBER OUTPUT (INPUT) DATA TERMINAL NUMBER ENABLE DISABLE TRUTH TABLE FUNCTION Convert CMOS Level Level Convert Level CMOS Level High Impedance
Level High Level Don't Care High Impedance Both CMOS sides. NOTE: important caveat that applicable CMOS devices general that unused inputs should never left floating. This rule applies inputs connected three-state bus. need external pull-up resistors during three-state conditions eliminated presence regenerative latches following HS-3374RH pins: functional block diagram depicts these pins with regenerative latch. When CMOS driver assumes high impedance state, latch holds whatever logic state (high low) before three-state condition. transient drive current ±1.5mA VDD/2 ±0.5V 10ns required switch latch. Thus, CMOS device inputs connected allowed float during three-state conditions. WARNING: activate Disable input hardwiring input pins. This incorrect mode operation.
Spec Number
518052
HS-3374RH Metallization Topology
DIMENSIONS: 89.4 mils 76.0 mils mils METALLIZATION: Type: AlSi Thickness: GLASSIVATION: Type: SiO2 Thickness:
Metallization Mask Layout
HS-3374RH
(22)
(21)
(20) (19)
(18)
(17)
(16)
(15)
(14)
ENABLE (10)
(11)
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, site http://www.intersil.com
DISABLE (13)
Spec Number
518052

Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter P

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