8-Bit, MSPS/80 MSPS/100 MSPS Converter AD9283 PWRDWN AD9283

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8-Bit, MSPS/80 MSPS/100 MSPS Converter AD9283 PWRDWN AD9283

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FEATURES 8-Bit, MSPS Power: MSPS On-Chip Reference Track/Hold Analog Bandwidth 46.5 MSPS Analog Input Range Single +3.0 Supply Operation (2.7 V-3.6 Power-Down Mode: APPLICATIONS Battery Powered Instruments Hand-Held Scopemeters Cost Digital Oscilloscopes
8-Bit, MSPS/80 MSPS/100 MSPS Converter AD9283
PWRDWN
AD9283
ENCODE TIMING OUTPUT STAGING D7-D0
GENERAL DESCRIPTION
AD9283 8-bit monolithic sampling analog-to-digital converter with on-chip track-and-hold circuit optimized cost, power, small size ease use. product operates MSPS conversion rate, with outstanding dynamic performance over full operating range. requires only single (2.7 power supply encode clock full performance operation. external reference driver components required many applications. digital outputs TTL/CMOS compatible separate output power supply supports interfacing with logic.
encoder input TTL/CMOS compatible. power-down function exercised bring total consumption power-down mode, digital outputs driven high impedance state. Fabricated advanced CMOS process, AD9283 available 20-lead surface mount plastic package (SSOP) specified over industrial temperature range (-40°C +85°C).
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices. Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 1999
AD9283-SPECIFICATIONS
Parameter RESOLUTION ACCURACY Differential Nonlinearity Integral Nonlinearity Missing Codes Gain Error1 Gain Tempco1 ANALOG INPUT Input Voltage Range (With Respect Common-Mode Voltage Input Offset Voltage Reference Voltage Reference Tempco Input Resistance Input Capacitance Analog Bandwidth, Full Power SWITCHING PERFORMANCE Maximum Conversion Rate Minimum Conversion Rate Encode Pulsewidth High (tEH Encode Pulsewidth (tEL Aperture Delay (tA) Aperture Uncertainty (Jitter) Output Valid Time (tV) Output Propagation Delay (tPD)2 DIGITAL INPUTS Logic Voltage Logic Voltage Logic Current Logic Current Input Capacitance DIGITAL OUTPUTS Logic Voltage Logic Voltage Output Coding POWER SUPPLY Power Dissipation3, Power-Down Dissipation Power Supply Rejection Ratio (PSRR) +25°C Full +25°C Full Full +25°C Full Full Temp Test Level
single-ended input; external
reference, unless otherwise noted)
AD9283BRS-50 Units Bits +1.25 +1.50 +1.25 +1.50 ppm/°C
AD9283BRS-100 -1.25 0.75 +1.25 +1.50 +1.25 +2.25
AD9283BRS-80 -1.25 0.75 +1.25 +1.50 +1.25 +1.50
-1.25 0.75
Guaranteed
Guaranteed
Guaranteed
Full Full +25°C Full Full Full +25°C Full +25°C Full +25°C Full +25°C +25°C +25°C +25°C +25°C Full Full Full Full Full Full +25°C Full Full
1.25
1.25
1.25
ppm/°C MSPS MSPS
1000 1000
1000 1000
1000 1000
2.95 0.05 Offset Binary Code
2.95 0.05 Offset Binary Code 2.95
0.05 Offset Binary Code
Full Full +25°C
mV/V
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AD9283
Parameter DYNAMIC PERFORMANCE Transient Response Overvoltage Recovery Time Signal-to-Noise Ratio (SNR) (Without Harmonics) 10.3 Signal-to-Noise Ratio (SINAD) (With Harmonics) 10.3 Effective Number Bits 10.3 Harmonic Distortion 10.3 Harmonic Distortion 10.3 Two-Tone Intermod Distortion (IMD) 10.3
Temp +25°C +25°C
Test Level
AD9283BRS-100
AD9283BRS-80
AD9283BRS-50
Units
+25°C +25°C +25°C +25°C
46.5 46.5 43.5 46.5 46.0
+25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C +25°C
45.5 42.5 42.5 54.5 52.5
43.5 46.5
43.5 46.5
Bits Bits Bits Bits
62.5
+25°C
NOTES Gain error gain temperature coefficient based only (with fixed 1.25 external reference). measured from level ENCODE input 50%/50% levels digital outputs swing. digital output load during test exceed load current Power dissipation measured with encode rated speed analog input. Typical thermal impedance style (SSOP) 20-lead package: 46°C/W, 80°C/W, 126°C/W. SNR/harmonics based analog input voltage -0.7 dBFS referenced 1.024 full-scale input range. Specifications subject change without notice.
ABSOLUTE MAXIMUM RATINGS*
Analog Inputs -0.5 Digital Inputs -0.5 VREF -0.5 Digital Output Current Operating Temperature -55°C +125°C Storage Temperature -65°C +150°C Maximum Junction Temperature +175°C Maximum Case Temperature +150°C
*Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions outside those indicated operation sections this specification implied. Exposure absolute maximum ratings extended periods affect device reliability.
ORDERING GUIDE
Model
Temperature Ranges
Package Descriptions
Package Options
AD9283BRS -50, -80, -100 -40°C +85°C 20-Lead SSOP RS-20 AD9283/PCB +25°C Evaluation Board
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although AD9283 features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
WARNING!
SENSITIVE DEVICE
REV.
AD9283
EXPLANATION TEST LEVELS Table Output Coding (VREF +1.25
Test Level 100% production tested. 100% production tested +25°C sample tested specified temperatures. Sample tested only. Parameter guaranteed design characterization testing. Parameter typical value only. 100% production tested +25°C; guaranteed design characterization testing industrial temperature range; 100% production tested temperature extremes military devices.
Step
AIN-AIN 0.512 0.002 -0.002 -0.512
Digital Output 1111 1111 1000 0000 0111 1111 0000 0000
CONFIGURATION
PWRDWN VREF VREF
(LSB)
AD9283
VIEW (Not Scale) ENCODE
(MSB)
FUNCTION DESCRIPTIONS
Number
Name PWRDWN VREF VREF
Function Power-down function select; Logic HIGH power-down mode (digital outputs high impedance state). Internal Reference Output (+1.25 typ); Bypass with Ground. Reference Input (+1.25 typ). Ground. Analog Power Supply. Analog Input (Can left open operating single-ended mode, recommend connection capacitor resistor series ground better input matching). Analog Input Encode Clock (ADC samples rising edge ENCODE). Digital Outputs ADC. Digital output power supply. Nominally +2.5 +3.6
11-14, 17-20
ENCODE D7-D4, D3-D0
REV.
AD9283
SAMPLE SAMPLE SAMPLE SAMPLE
ENCODE
SAMPLE
SAMPLE
1/fS
D7-D0 DATA DATA DATA DATA DATA
DATA
Figure Timing Diagram
33.3k 33.3k
14.3k
14.3k
Figure Equivalent Analog Input Circuit
Figure Equivalent Digital Output Circuit
VBIAS
Figure Equivalent Reference Input Circuit
Figure Equivalent Reference Output Circuit
ENCODE
Figure Equivalent Encode Input Circuit
REV.
AD9283
ENCODE MSPS 10.3MHz 46.5dB SINAD 45dB 57dBc 54.5dBc
ENCODE MSPS
-100 FREQUENCY
FREQUENCY
Figure Spectrum: MSPS, 10.3
Figure Harmonic Distortion Frequency
FREQUENCY ENCODE MSPS 41MHz 46.5dB SINAD 45dB 58dBc 52.5dBc
FREQUENCY ENCODE MSPS AIN1 9MHz AIN2 10MHz 52dBc
Figure Spectrum: MSPS,
Figure Two-Tone Intermodulation Distortion
ENCODE MSPS 76MHz 46dB SINAD 42.5dB 46dBc 53dBc ENCODE MSPS
FREQUENCY
SINAD
FREQUENCY
Figure Spectrum: MSPS,
Figure SINAD/SNR Frequency
REV.
AD9283
SINAD
POWER
10.3MHz 10.3MHz
ENCODE RATE
ENCODE RATE
Figure SINAD/SNR Encode Rate
Figure Analog Power Dissipation Encode Rate
ENCODE MSPS 10.3MHz SINAD
SINAD
ENCODE PULSEWIDTH HIGH
TEMPERATURE
Figure SINAD/SNR Encode Pulsewidth High
Figure SINAD/SNR Temperature
-0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5.0 -5.5 BANDWIDTH
1.00 0.75 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 CODE
Figure Frequency Response: MSPS
Figure Differential Nonlinearity
REV.
AD9283
-0.5 -1.0 -1.5 -2.0
Digital Outputs
digital outputs TTL/CMOS compatible. output buffers powered from separate supply, allowing adjustment output voltage swing ease interfacing with logic. AD9283 goes into power state within clock cycles following assertion PWRDWN input. PWRDWN asserted with logic high. During power-down outputs transition high impedance state. time takes achieve optimal performance after disabling powerdown mode approximately clock cycles. Care should taken when loading digital outputs high speed ADC. Large output loads create current transients chip that degrade converter's performance.
CODE
Voltage Reference
Figure Integral Nonlinearity
APPLICATIONS Theory Operation
analog signal applied differentially single-endedly inputs AD9283. signal buffered forward on-chip sample-and-hold circuit. core architecture bit-per-stage pipeline type converter utilizing switch capacitor techniques. bit-per-stage blocks determine MSBs drive FLASH converter encode LSBs. Each stages provides sufficient overlap error correction allow optimization performance with respect comparator accuracy. output staging block aligns data, carries error correction feeds data eight output buffers. AD9283 includes on-chip reference (nominally 1.25 generates clocking signals from externally applied encode command. This makes easy interface with requires very external components operation.
ENCODE Input
stable accurate 1.25 voltage reference built into AD9283 (VREF OUT). normal operation, internal reference used strapping Pins AD9283 together. input range adjusted varying reference voltage applied AD9283. degradation performance occurs when reference adjusted full-scale range tracks reference voltage changes linearly. Whether used not, internal reference (Pin should bypassed with capacitor ground. Timing AD9283 provides latched data outputs with four pipeline delays. Data outputs available propagation delay (tPD) after rising edge encode command (Figure Timing Diagram). minimum guaranteed conversion rate MSPS. dynamic performance converter will degrade encode rates below this sample rate.
Evaluation Board
AD9283 evaluation board offers easy test AD9283. only requires supply, analog input encode clock test AD9283. board shipped with MSPS grade ADC. analog input board accepts signal centered ground. should used (Jump E3-E4, E18-E19) drive through Transformer should used singleended input drive (Jump E19-E21). Both terminated PCB. Each analog path ac-coupled on-chip resistor divider which provides required bias. (TTL/CMOS Level) sample clock applied connector which terminated through PCB. This clock buffered which also provides clocks latches, DAC, off-card latch clock CLKCON. (Timing modified E17.) There reconstruction (AD9760) PCB. board assist debug only-the outputs should used measure performance ADC.
ENCODE input fully TTL/CMOS compatible with nominal threshold Care taken chip match clock line delays maintain sharp clock logic transitions. high speed converter extremely sensitive quality sampling clock provided user. This uses on-chip sample-and-hold circuit which essentially mixer. timing jitter ENCODE will combined with desired signal degrade high frequency performance ADC. user advised give commensurate thought clock source.
Analog Input
analog input fully differential both inputs internally biased. This allows most flexible differential single-ended input modes. peak performance inputs biased specification table allowable common-mode range when coupling input. inputs also buffered reduce load user needs drive. best dynamic performance, impedances should matched. importance this increases with sampling rate analog input frequency. nominal input range 1.024 p-p.
REV.
AD9283
Figure Printed Circuit Board Side Silkscreen
Figure Printed Circuit Board Side Copper
Figure Printed Circuit Board Bottom Side Silkscreen
Figure Printed Circuit Board "Split" Power Layer
REV.
AD9283
Figure Printed Circuit Board Ground Layer
Figure Printed Circuit Board Bottom Side Copper
EVALUATION BOARD BILL MATERIALS GS01717
REFDES C4-C17 C18-C21 E1-E6, E8-E10, E12-E19, E21, E34-E39
DEVICE Ceramic Tantalum W-HOLE Connector 5-Pin Connector
PACKAGE 0603 BCAPTAJD
VALUE
Wieland Connector (P/N #25.602.2553.0 #Z5.530.0525.0 Bottom) AMP-747462-2 Mini-Circuits T1-1T-KK81
R10, R21,
37-Pin Connector Resistor Resistor Resistor Transformer AD9283 AD9760 74ACQ574 SN74LVC86
1206 1206 1206 SSOP-20 SOIC-28 SOIC-20 SO14
-10-
REV.
REV.
PWDN PWDN REFOUT REFIN CLOCK CLKLAT OUT_EN 74ACQ574 CLKCON VDAC
AD9283
VDAC
Figure Printed Circuit Board Schematic
AD9760 CLKDAC VDAC CLKLAT CLKDAC VDAC DVDD DCOM AVDD COMP2 IOUTA IOUTB ACOM COMP1 FSADJ REFIO REFLO SLEEP
-11-
SN74LVC86
VDAC C37DRPF
CLKCON
AD9283
AD9283
OUTLINE DIMENSIONS
Dimensions shown inches (mm).
20-Lead Shrink Small Outline Package (SSOP) (RS-20)
C3389b-0-9/99
0.037 (0.94) 0.022 (0.559) 0.295 (7.50) 0.271 (6.90)
0.311 (7.9) 0.301 (7.64)
0.078 (1.98) 0.068 (1.73)
0.07 (1.78) 0.066 (1.67)
0.008 (0.203) 0.002 (0.050)
0.0256 (0.65)
SEATING 0.009 (0.229) PLANE 0.005 (0.127)
0.212 (5.38) 0.205 (5.21)
-12-
REV.
PRINTED U.S.A.

8-Bit, MSPS/80 MSPS/100 MSPS Converter AD9283 PWRDWN AD9283

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