M5M5408BFP/TP/RT/KV/KR Notice: This final specification. Some par

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revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
DESCRIPTION
M5M5408B family 4-Mbit static RAMs organized 524,288-words 8-bit, fabricated Mitsubishi's highperformance 0.25µm CMOS technology. M5M5408B suitable memory applications where simple interfacing battery operating battery backup important design objectives. M5M5408B packaged 32-pin plastic SOP, 32-pin plastic TSOP 32-pin 13.4mm STSOP packages. types TSOPs types STSOPs available M5M5408BTP (normal-lead-bend TSOP) M5M5408BRT (reverse-lead-bend TSOP) M5M5408BKV (normal-lead-bend STSOP) M5M5408BKR (reverse-lead-bend STSOP). These types TSOPs types STSOPs suitable surface mounting double-sided printed circuit boards. From point operating temperature, family divided into three versions; "Standard", "W-version", "I-version". Those summarized part name table below.
FEATURES
Single power supply Small stand-by current: 0.4µA(3V,typ.) clocks, refresh Data retention supply voltage=2.0V 5.5V inputs outputs compatible. Easy memory expansion Common Data Three-state outputs: OR-tie capability prevents data contention Process technology: 0.25µm CMOS Package: M5M5408BFP: M5M5408BTP/RT: TSOP(ll) M5M5408BKV/KR: 13.4mm STSOP
PART NAME TABLE
Version, Operating temperature Part name stands "FP","TP", "RT","KV"or"KR") M5M5408B## -55L M5M5408B## -70L 5.0V
Power Supply
Access time
Stand-by current Icc(PD), Vcc=3.0V typical Ratings (max.) 25°C -70°C 50µA 85°C
max.
55ns 70ns 100ns 55ns
Active current Icc1 (5.0V, typ.)
Standard +70°C
M5M5408B## -10L M5M5408B## -55H M5M5408B## -70H M5M5408B## -10H M5M5408B## -55LW M5M5408B## -70LW 5.0V 5.0V
70ns 100ns 55ns 70ns 100ns 55ns
0.4µA
10µA
100µA
50mA (10MHz) 25mA (1MHz)
W-version +85°C
M5M5408B## -10LW M5M5408B## -55HW M5M5408B## -70HW M5M5408B## -10HW M5M5408B## -55LI M5M5408B## -70LI 5.0V 5.0V
70ns 100ns 55ns 70ns 100ns 55ns
0.4µA
20µA
100µA
I-version +85°C
M5M5408B## -10LI M5M5408B## -55HI M5M5408B## -70HI M5M5408B## -10HI 5.0V
70ns 100ns
0.4µA
20µA
"typical" parameter sampled, 100% tested.
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
CONFIGURATION (TOP VIEW)
(0V)
(5V)
(5V)
(0V)
Outline
32P2M-A (FP) 32P3Y-H (TP)
Outline
32P3Y-J (RT)
M5M5408BKV
M5M5408BKR
Outline 32P3K-B
Outline 32P3K-C
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
FUNCTION
M5M5408BFP,TP,RT,KV,KR organized 524,288words 8-bit. These devices operate single +5.0V power supply, directly compatible both input output. fully static circuit needs clocks refresh, makes useful. write operation executed during overlap time. address(A0~A18) must before write cycle read operation executed setting high level level while active state(S=L). When setting high level, chips nonselectable mode which both reading writing disabled. this mode, output stage high-impedance state, allowing OR-tie with other chips. Setting high level,the output stage high-impedance state, data contention problem write cycle eliminated. power supply current reduced 0.4µA(25°C, typical), memory data held power supply, enabling battery back-up operation during power failure power-down operation non-selected mode.
FUNCTION TABLE
Mode selection Write Read Read High-impedance Data input Data output High-impedance Standby Active Active Active
Function Address input Chip select input Write control input Output inable input Power supply Ground supply
Data input output
BLOCK DIAGRAM
M5M5408B FP/TP/RT M5M5408BKV/KR
M5M5408BKV/KR
M5M5408B FP/TP/RT
MEMORY ARRAY 524288 WORDS BITS
CLOCK GENERATOR
(3V)
(0V)
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Supply voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature Conditions With respect With respect With respect Ta=25°C Standard (-L, (-LW, -HW) (-LI, -HI) W-version I-version Ratings Units
Tstg
-0.3* -0.3* ~150
-3.0V case (Pulse width 30ns)
ELECTRICAL CHARACTERISTICS
Symbol Parameter High-level input voltage Low-level input voltage High-level output voltage IOH= -1mA High-level output voltage IOH= -0.1mA Low-level output voltage Input leakage current Output leakage current Active supply current AC,MOS level Active supply current AC,TTL level Stand supply current AC,MOS level Conditions
Vcc=5V±10%, unless otherwise noted) Limits Vcc+0.3V Units
VOH1 VOH2 Icc1 Icc2
-0.3
Vcc-0.5V
IOL=2mA S=VIH OE=VIH, VI/O=0
0.2V Output-open Other inputs 0.2V Vcc-0.2V Output-open S=VIL Other inputs=VIH Vcc-0.2V Other inputs=0~Vcc
minimum cycle
1MHz
minimum cycle
1MHz -LW, -HW,
Icc3
Icc4
Stand supply current AC,TTL level
,Other inputs=
Note Direction current flowing into indicated positive mark) Note Typical value Vcc=5.0V Ta=25°C
-3.0V case (Pulse width 50ns)
CAPACITANCE
Symbol Parameter Input capacitance Output capacitance Conditions VI=GND, VI=25mVrms, f=1MHz VO=GND,VO=25mVrms, f=1MHz
(Vcc=5.0V±10%, unless otherwise noted) Limits Units
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
ELECTRICAL CHARACTERISTICS TEST CONDITIONS
Supply voltage Input pulse Input rise time fall time Reference level 5.0V
(Vcc=5.0V±10%, unless otherwise noted)
VIH=2.4V,VIL=0.6V (FP,TP,RT,KV,KR-70,-10 VIH=3.0V,VIL=0V (FP,TP,RT,KV,KR-55 VOH=VOL=1.5V Transition measured ±500mV from steady state voltage.(for ten,tdis) Fig.1, CL=100pF (FP,TP,RT,KV,KR-70,-10 CL=30pF (FP,TP,RT,KV,KR-55 CL=5pF (for ten,tdis)
1.8k
Output loads
Including scope capacitance
Fig.1 Output load
READ CYCLE
Limits Symbol Parameter Read cycle time Address access time Chip select access time Output enable access time Output disable time after high Output disable time after high Output enable time after Output enable time after Data valid time after address
M5M5408BFP,TP,RT, KV,KR-55 M5M5408BFP,TP,RT, M5M5408BFP,TP,RT, KV,KR-70 KV,KR-10
Units
ta(A) ta(S) ta(OE) tdis(S) tdis(OE) ten(S) ten(OE) tV(A)
WRITE CYCLE
Limits Symbol Parameter Write cycle time Write pulse width Address time Address time with respect high Chip select time Data time Data hold time Write recovery time Output disable time after Output disable time after high Output enable time after high Output enable time after
M5M5408BFP,TP,RT, KV,KR-55 M5M5408BFP,TP,RT, M5M5408BFP,TP,RT, KV,KR-10 KV,KR-70
Units
tw(W) tsu(A) tsu(A-WH) tsu(S) tsu(D) th(D) trec(W) tdis(W) tdis(OE) ten(W) ten(OE)
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
(4)TIMING DIAGRAMS Read cycle
A0~18 ta(A) ta(S)
(Note3)
tdis (OE)
(Note3)
(Note3) level
(OE) tdis (OE)
(Note3)
DQ1~8
VALID DATA
Write cycle control mode
A0~18
(Note3)
(A-WH)
(Note3)
tdis tdis(OE) DQ1~8
DATA STABLE
trec
ten(OE)
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
Write cycle control mode)
A0~18 trec
(Note5)
(Note3)
(Note4) (Note3)
DQ1~8
DATA STABLE
Note Hatching indicates state "don't care". Note Write occurs during overlap Note goes simultaneously with prior S,the output remains high impedance state. Note Don't apply inverted phase signal externally when output mode.
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
POWER DOWN CHARACTERISTICS ELECTRICAL CHARACTERISTICS
Symbol Parameter Test conditions Limits Typ. Units
(PD) Power down supply voltage Chip select input Vcc(PD) 2.2V 2.2V Vcc(PD) 2.0V -LW, (PD) Power down supply current
Vcc=3.0V, SVcc-0.2V, Other inputs=0
Vcc(PD)
-HW,
Typical value Ta=25°C
TIMING REQUIREMINTS
Symbol Parameter Power down time Power down recovery time Limits Test conditions Units
(PD) trec (PD)
TIMING DIAGRAM
control mode (PD) 2.2V SVcc 0.2V 4.5V 4.5V trec (PD) 2.2V
MITSUBISHI ELECTRIC
revision-K0.1e, 98.07.30
M5M5408BFP/TP/RT/KV/KR
Notice: This final specification. Some parametric limits subject change
4194304-BIT (524288-WORD 8-BIT) CMOS STATIC
Revision History Revision K0.1e
History first edition
Date '98.7.30 Preliminary
MITSUBISHI ELECTRIC

M5M5408BFP/TP/RT/KV/KR Notice: This final specification. Some par

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