Quad 3-State Flip-Flop with Common Clock Reset MC74HC173 identica

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Quad 3-State Flip-Flop with Common Clock Reset MC74HC173 identica

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Quad 3-State Flip-Flop with Common Clock Reset
MC74HC173 identical pinout LS173. device inputs compatible with standard CMOS outputs; with pullup resistors, they compatible with LSTTL outputs. Data, when enabled, clocked into four flip-flops with rising edge common Clock. When either both Output Enable Controls high, outputs high-impedance state. This feature allows HC173 used bus-oriented systems. Reset feature asynchronous active high. Output Drive Capability: LSTTL Loads Outputs Directly Interface CMOS, NMOS, Operating Voltage Range: Input Current: High Noise Immunity Characteristic CMOS Devices Compliance with Requirements Defined JEDEC Standard Chip Complexity FETs Equivalent Gates LOGIC DIAGRAM
MC74HC173
SUFFIX PLASTIC PACKAGE CASE 648-08
SUFFIX SOIC PACKAGE CASE 751B-05
ORDERING INFORMATION MC74HCXXXN MC74HCXXXD Plastic SOIC
ASSIGNMENT
RESET
DATA INPUTS
3-STATE NONINVERTING OUTPUTS
CLOCK
CLOCK RESET OUTPUT ENABLES
DATA- ENABLES
FUNCTION TABLE
Inputs Output Enables Reset Clock Data Enables Data Output
Change Change Change Change Change High Impedance High Impedance High Impedance
10/95
Motorola, Inc. 1995
Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. Derating Plastic DIP: mW/_C from 125_C SOIC Package: mW/_C from 125_C high frequency heavy load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D). NOTE: Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D).
MAXIMUM RATINGS*
ELECTRICAL CHARACTERISTICS (Voltages Referenced GND)
RECOMMENDED OPERATING CONDITIONS
MC74HC173
Symbol
Vin, Vout
Symbol
Symbol
Vout
Tstg
Iout
Lead Temperature, from Case Seconds (Plastic SOIC Package)
Storage Temperature
Power Dissipation Still
Supply Current, Pins
Output Current,
Input Current,
Output Voltage (Referenced GND)
Input Voltage (Referenced GND)
Supply Voltage (Referenced GND)
Input Rise Fall Time (Figure
Operating Temperature, Package Types
Input Voltage, Output Voltage (Referenced GND)
Supply Voltage (Referenced GND)
Maximum Quiescent Supply Current (per Package)
Maximum Three-State Leakage Current
Maximum Input Leakage Current
Maximum Low-Level Output Voltage
Minimum High-Level Output Voltage
Maximum Low-Level Input Voltage
Minimum High-Level Input Voltage
Parameter
Parameter
Parameter
Plastic SOIC Package
Output High-Impedance State Vout
|Iout|
|Iout|
Iout
|Iout| |Iout|
|Iout| |Iout|
Vout |Iout|
Vout |Iout|
Test Conditions
Value
1000
Unit
Unit
25_C
3.15
0.26 0.26
3.98 5.48
This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, Vout should constrained range (Vin Vout) VCC. Unused inputs must always tied appropriate logic voltage level (e.g., either VCC). Unused outputs must left open.
Guaranteed Limit
85_C 125_C
High-Speed CMOS Logic Data DL129 3.15 0.33 0.33 3.84 5.34
3.15
0.40 0.40
3.70 5.20
Unit
NOTE: Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D). Used determine no-load dynamic power consumption: load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D). NOTES: propagation delays with loads other than Chapter Motorola High-Speed CMOS Data Book (DL129/D). Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D).
ELECTRICAL CHARACTERISTICS Input
Symbol tPLH, tPHL tTLH, tTHL tPZL, tPZH tPLZ, tPHZ tPHL fmax Cout Maximum Three-State Output Capacitance (Output High-Impedance State) Maximum Input Capacitance Maximum Output Transition Time, Output (Figures Maximum Propagation Delay, Output Enable (Figures Maximum Propagation Delay, Output Enable (Figures Maximum Propagation Delay, Reset (Figures Maximum Propagation Delay, Clock (Figures Maximum Clock Frequency (50% Duty Cycle) (Figures Parameter 25_C Guaranteed Limit
High-Speed CMOS Logic Data DL129
TIMING REQUIREMENTS (Input
Symbol
trec
Power Dissipation Capacitance (Per Flip-Flop)*
Maximum Input Rise Fall Times (Figure
Minimum Pulse Width, Reset (Figure
Minimum Pulse Width, Clock (Figure
Minimum Recovery Time, Reset Inactive Clock (Figure
Minimum Hold Time, Clock Input (Figure
Minimum Setup Time, Input Clock (Figure
Parameter
25_C Typical 25°C, 1000 Guaranteed Limit 1000 1000
85_C 125_C
85_C 125_C
MC74HC173
MOTOROLA Unit Unit
MC74HC173
DESCRIPTIONS
INPUTS (Pins 4-bit data inputs. Data these pins, when enabled Data-Enable Controls, entered into flip-flops rising edge clock. CLOCK (Pin Clock input. OUTPUTS (Pins 3-state register outputs. During normal operation device, outputs flip-flops appear these pins. During 3-state operation, these outputs assume high- impedance state. CONTROL INPUT Reset (Pin Asynchronous reset input. high level this resets flip-flops forces outputs low, they already high-impedance state. DE1, (Pins Active-low Data Enable Control inputs. When both Data Enable Controls low, data inputs loaded into flip-flops with rising edge Clock input. When either both these controls high, there change state flip-flops, regardless changes Clock inputs. OE1, (Pins Output Enable Control inputs. When either both Output Enable Controls high, outputs device high-impedance state. When both controls low, device outputs display data flip-flops.
SWITCHING WAVEFORMS
CLOCK 1/fmax tPLH tTLH tTHL tPHL tPHL trec CLOCK RESET
Figure
Figure
tPZL tPZH tPHZ HIGH IMPEDANCE CLOCK tPLZ HIGH IMPEDANCE VALID INPUT
Figure
Figure
High-Speed CMOS Logic Data DL129
MC74HC173
TEST CIRCUITS
TEST POINT OUTPUT DEVICE UNDER TEST TEST POINT OUTPUT CONNECT WHEN TESTING tPLZ tPZL. CONNECT WHEN TESTING tPHZ tPZH.
DEVICE UNDER TEST
Includes probe capacitance
Includes probe capacitance
Figure
Figure
LOGIC DETAIL
DATA INPUTS
DATA- ENABLES
RESET
CLOCK OUTPUT ENABLES
High-Speed CMOS Logic Data DL129
MC74HC173
OUTLINE DIMENSIONS
SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS 0.740 0.770 18.80 19.55 6.35 0.250 0.270 6.85 3.69 0.145 0.175 4.44 0.39 0.015 0.021 0.53 1.02 0.040 0.070 1.77 0.100 2.54 0.050 1.27 0.21 0.008 0.015 0.38 2.80 0.110 0.130 3.30 7.50 0.295 0.305 7.74 0.020 0.040 0.51 1.01
0.25 (0.010)
SEATING PLANE
SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE
0.25 (0.010)
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 0.25 0.19 0.10 0.25 6.20 5.80 0.50 0.25 INCHES 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.229 0.244 0.010 0.019
SEATING
PLANE
0.25 (0.010)
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters vary different applications. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
reach USA/EUROPE: Motorola Literature Distribution; P.O. 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; Ping Industrial Park, Ting Road, N.T., Hong Kong. 852-26629298
CODELINE
*MC74HC173/D*
MC74HC173/D High-Speed CMOS Logic Data DL129

Quad 3-State Flip-Flop with Common Clock Reset MC74HC173 identica

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