9-Bit Odd/Even Parity Generator/Checker CD74AC280 CD74ACT280 9-bi
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CD74AC280, CD74ACT280
9-Bit Odd/Even Parity Generator/Checker
CD74AC280 CD74ACT280 9-bit odd/even parity generator/checkers that utilize Harris Advanced CMOS Logic technology. Bothe even parity outputs available checking generating parity words nine bits long. Even parity indicated (Eoutput HIGH) when even number data inputs HIGH. parity indicated output HIGH) when number data inputs HIGH. Parity checking words larger than nine bits accomplished tying output input additional AC/ACT280 parity checker.
August 1998
Features
Buffered Inputs Typical Propagation Delay 10ns 25oC, 50pF Exceeds Protection MIL-STD-883, Method 3015 SCR-Latchup-Resistant CMOS Process Circuit Design Speed Bipolar FASTTM/AS/S with Significantly Reduced Power Consumption Balanced Propagation Delays Types Feature 1.5V 5.5V Operation Balanced Noise Immunity Supply ±24mA Output Drive Current Fanout FASTICs Drives Transmission Lines
Ordering Information
PART NUMBER CD74AC280E CD74ACT280E CD74AC280M TEMP. RANGE (oC) PACKAGE PKG. E14.3 E14.3 M14.15 M14.15
70oC, PDIP 70oC, PDIP 70oC, SOIC 70oC, SOIC
Pinout
CD74ACT280M CD74AC280, CD74ACT280 (PDIP, SOIC) VIEW NOTES:
When ordering, entire part number. suffix obtain variant tape reel.
Wafer this part number available which meets electrical specifications. Please contact your local sales office Harris customer service ordering information.
Functional Diagram
EVEN
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. FASTis Trademark Fairchild Semiconductor. Copyright Harris Corporation 1998
File Number
1957.1
CD74AC280, CD74ACT280
Absolute Maximum Ratings
Supply Voltage, -0.5V Input Diode Current, -0.5V 0.5V .±20mA Output Diode Current, -0.5V 0.5V .±50mA Output Source Sink Current Output Pin, -0.5V 0.5V .±50mA Ground Current, IGND (Note .±100mA
Thermal Information
Thermal Resistance (Typical, Note (oC/W) PDIP Package SOIC Package Maximum Junction Temperature (Plastic Package) 150oC Maximum Storage Temperature Range .-65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC
Operating Conditions
Temperature Range, -55oC 125oC Supply Voltage Range, (Note Types. .1.5V 5.5V Types .4.5V 5.5V Input Output Voltage, Input Rise Fall Slew Rate, dt/dv Types, 1.5V 50ns (Max) Types, 3.6V 5.5V 20ns (Max) Types, 4.5V 5.5V. 10ns (Max)
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: outputs device, ±25mA each additional output. Unless otherwise specified, voltages referenced ground. measured with component mounted evaluation board free air.
Electrical Specifications
TEST CONDITIONS PARAMETER TYPES High Level Input Voltage Level Input Voltage High Level Output Voltage -0.05 -0.05 -0.05 (Note (Note 3.85 2.58 3.94 1.65 3.85 2.48 3.85 1.65 3.85 3.85 1.65 SYMBOL (mA) 25oC -40oC 85oC -55oC 125oC UNITS
CD74AC280, CD74ACT280
Electrical Specifications
(Continued) TEST CONDITIONS PARAMETER Level Output Voltage SYMBOL (mA) 0.05 0.05 0.05 (Note (Note Input Leakage Current Quiescent Supply Current TYPES High Level Input Voltage Level Input Voltage High Level Output Voltage -0.05 (Note (Note Level Output Voltage 0.05 (Note (Note Input Leakage Current Quiescent Supply Current Additional Supply Current Input Inputs High Unit Load NOTES: Test output time 1-second maximum duration. Measurement made forcing current measuring voltage minimize power dissipation. Test verifies minimum transmission-line-drive capability 85oC, 125oC. -2.1 3.94 0.36 ±0.1 3.85 0.44 1.65 3.85 1.65 25oC 0.36 0.36 ±0.1 -40oC 85oC 0.44 0.44 1.65 -55oC 125oC 1.65 UNITS
Input Load Table
INPUT UNIT LOAD 1.43
NOTE: Unit load limit specified Electrical Specifications Table, e.g., 2.4mA 25oC.
CD74AC280, CD74ACT280
Switching Specifications Input 3ns, 50pF (Worst Case)
-40oC 85oC PARAMETER TYPES Propagation Delay, Input tPLH, tPHL (Note (Note Propagation Delay, Input tPLH, tPHL Input Capacitance Power Dissipation Capacitance TYPES Propagation Delay, Input Propagation Delay, Input Input Capacitance Power Dissipation Capacitance NOTES: Limits tested 100%. 3.3V 3.6V, 5.5V, 4.5V. used determine dynamic power consumption package. VCC2 (CPD ACT: VCC2 (CPD where input frequency, output load capacitance, supply voltage. tPLH, tPHL tPLH, tPHL (Note (Note 19.6 19.6 21.6 21.6 (Note 19.1 18.2 SYMBOL -55oC 125oC UNITS
INPUT LEVEL tPHL
tPLH
OUTPUT (NOTE)
OUTPUT LOAD
50pF
NOTE: Series Only: When 1.5V, CD74AC CD74ACT 1.5V
tPLH
tPHL
Input Level Input Switching Voltage, Output Switching Voltage,
FIGURE
FIGURE PROPAGATION DELAY TIMES
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Copyright 1999, Texas Instruments Incorporated
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