March 1995 Revised June 1999 74LCX02 Voltage Quad 2-Input Gate wi
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74LCX02 Voltage Quad 2-Input Gate with Tolerant Inputs
March 1995 Revised June 1999
74LCX02 Voltage Quad 2-Input Gate with Tolerant Inputs
LCX02 contains four 2-input gates. inputs tolerate voltages allowing interface systems systems. 74LCX02 fabricated with advanced CMOS technology achieve high speed operation while maintaining CMOS power dissipation.
Features
tolerant inputs 2.3V-3.6V specification provided (VCC 3.3V), Power down high impedance inputs outputs output drive (VCC 3.0V) Implements patented noise/EMI reduction circuitry Latch-up performance exceeds performance: Human body model 2000V Machine model 200V
Ordering Code:
Order Number 74LCX02M 74LCX02SJ 74LCX02MTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available Tape Reel. Specify appending suffix letter ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Descriptions
Names Description Inputs Outputs
1999 Fairchild Semiconductor Corporation
ds012409.prf
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74LCX02
Absolute Maximum Ratings(Note
Symbol IGND TSTG Parameter Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply Current Supply Ground Current Ground Storage Temperature Value -0.5 +7.0 -0.5 +7.0 -0.5 ±100 ±100 +150 (Note Operating Data Retention IOH/IOL Input Voltage Output Voltage Output Current HIGH State 3.0V 3.6V 2.7V 3.0V 2.3V 2.7V Free-Air Operating Temperature Input Edge Rate, 0.8V-2.0V, 3.0V ns/V Units Output HIGH State (Note Conditions Units
Recommended Operating Conditions
Symbol Supply Voltage Parameter
Note Absolute Maximum Ratings those beyond which safety device cannot guaranteed. device should operating these limits. parametric values defined Electrical Characteristics tables guaranteed Absolute Maximum Ratings. "Recommended Operating Conditions" table will define conditions actual device operation. Note Absolute Maximum Rating must observed. Note Unused inputs must held HIGH LOW. They float.
Electrical Characteristics
Symbol Parameter HIGH Level Input Voltage Level Input Voltage HIGH Level Output Voltage -100µA Level Output Voltage 100µA IOFF Input Leakage Current Quiescent Supply Current Increase Input 5.5V 3.6V 5.5V -0.6V Power-Off Leakage Current 5.5V Conditions 0.55 ±5.0 -40°C +85°C Units
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74LCX02
Electrical Characteristics
-40°C +85°C, Symbol Parameter 3.3V 0.3V, tPHL tPLH tOSHL tOSLH Output Output Skew (Note Propagation Delay Time 2.7V 2.5V 0.2V Units
Note Skew defined absolute value difference between actual propagation delay separate outputs same device. specification applies outputs switching same direction, either HIGH-to-LOW (tOSHL) LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak Quiet Output Dynamic Valley Conditions 3.3V, 2.5V, 3.3V, 2.5V, 25°C Typical -0.8 -0.6 Units
Capacitance
Symbol COUT Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter Conditions Open, 3.3V, 3.3V, VCC, Typical Units
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74LCX02
Loading Waveforms Generic Family
FIGURE Test Circuit includes probe capacitance) Test tPLH, tPHL tPZL, tPLZ tPZH,tPHZ Switch Open 0.3V 0.2V
Waveform Inverting Non-Inverting Functions
3-STATE Output Enable Disable Times Logic
Propagation Delay, Pulse Width trec Waveforms
Setup Time, Hold TIme Recovery TIme Logic
3-STATE Output High Enable Disable TImes Logic FIGURE Waveforms (Input Pulse Characteristics; f=1MHz, tr=tf=3ns) Symbol 3.3V 0.3V 1.5V 1.5V 0.3V 0.3V 2.7V 1.5V 1.5V 0.3V 0.3V
trise tfall
2.5V 0.2V VCC/2 VCC/2 0.15V 0.15V
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74LCX02
Schematic Diagram Generic Family
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74LCX02
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE 5.3mm Wide Package Number M14D
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74LCX02 Voltage Quad 2-Input Gate with Tolerant Inputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT FAIRCHILD SEMICONDUCTOR CORPORATION. used herein: critical component component life support Life support devices systems devices systems device system whose failure perform reawhich, intended surgical implant into sonably expected cause failure life support body, support sustain life, whose failure device system, affect safety effectiveness. perform when properly used accordance with instructions provided labeling, reasonably expected result significant injury www.fairchildsemi.com user.
Fairchild does assume responsibility circuitry described, circuit patent licenses implied Fairchild reserves right time without notice change said circuitry specifications.
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