Many factors, such supply voltage, current consumption, size, routing

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Many factors, such supply voltage, current consumption, size, routing

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Power Consumption Comparison: APEX Virtex Devices
Many factors, such supply voltage, current consumption, size, routing structure, affect semiconductor power consumption. devices with same supply voltages, device current determines power consumption. Although modeling effective tool estimating current consumption particular design, appropriate comparing relative current consumption same design different devices. Modeling current consumption complex programmable logic devices (CPLDs) field programmable gate arrays (FPGAs) difficult because many factors must considered, including percentage signals switching, channel capacitance, size, device utilization, routing structure, embedded memory utilization. Device vendors provide power estimators models tools estimate power consumed specific devices. These power estimators built under different assumptions conditions, provide good power consumption comparison between devices from different semiconductor manufacturers. most accurate compare power consumption between devices from different semiconductor manufacturers perform experiments. Altera® Applications recently tested four typical designs determine actual power consumed Altera APEXEP20K100 Xilinx Virtex XCV150 devices.
Altera Corporation Innovation Drive Jose, 95134 (408) 544-7000 http://www.altera.com https://websupport.altera.com
Setup
During experiment, Altera Applications used Hewlett-Packard 8110A 150-MHz pulse generator generate clock signals. Each device mounted test circuit board, programmed with identical designs, powered with separate power supplies. Core voltage (VCCINT) voltage (VCCIO) designs required input control signals mode operation output signal monitor circuit operation. unused pins were tri-stated. Figure shows setup used experiment.
Figure Current Consumption Comparison
Note
Note:
Current measured using Fluke 8840A volt-ohm meter.
Altera Corporation
Power Consumption Comparison: APEX Virtex Devices
Power Consumption Experiments
Altera APEX EP20K100 Xilinx Virtex XCV150 devices were chosen because they have similar number logic elements (LEs) similar number bits. Designs using functions were implemented EP20K100 device's embedded system blocks (ESBs) XCV150 device's blocks. Table describes devices used experiment.
Table Devices Used Comparison
Feature
Package Speed Grade Bits Logic Elements Core Voltage Notes:
RQFP power quad flat pack. Slowest speed grade.
Altera EP20K100
240-pin RQFP 4,160
Xilinx XCV150
240-pin RQFP 3,456
experiment tested typical designs that have both combinatorial registered logic that load clock tree, that test current consumption various implementations. Each design utilized test devices equally. Table shows designs used experiments, Figure shows results.
Table Designs Used Experiments
Design
16-Bit Counters Clock Tree (Loaded 3,456 Registers) DualPort Blocks Dual-Port Blocks Note:
Xilinx Virtex configurable logic block (CLB) equivalent four LEs.
Operating Frequency (MHz)
EP20K100 Device Utilization
2,640 3,456 Kbits Kbits
XCV150 Device Utilization
2,640 3,456 Kbits Kbits
Altera Corporation
Power Consumption Comparison: APEX Virtex Devices
Figure Power Consumption
800.0
600.0
Power (mW) 400.0
Xilinx XCV150 device Altera EP20K100 device
200.0
16-Bit Counters (100 MHz) Clock Tree Loaded Dual-Port Dual-Port 3,456 Registers Blocks Blocks (100 MHz) MHz) MHz)
EP20K100 device consumed between less power than XCV150 device. average, EP20K100 device consumed less power than XCV150 device.
Power Consumption
Figure shows power consumed EP20K100 device XCV150 device when implementing dual-port designs. EP20K100 device used, average, less power than XCV150 device when implementing RAM.
Figure Power Consumption Comparison
400.0
300.0
XCV150 EP20K100
Power (mW) 200.0
100.0
Dual-Port Blocks MHz)
Dual-Port Blocks MHz)
Altera Corporation
Power Consumption Comparison: APEX Virtex Devices
XCV150 device, each block 4,096 Kbits; EP20K100 device, each 2,048 Kbits. this comparison, dual-port blocks were implemented XCV150 device block. same implemented using EP20K100 ESBs. When implementing deep RAM, EP20K100 ESBs consumed less power than Virtex block. When implementing dual-port RAM, XCV150 block EP20K100 were used. When implementing dual-port RAM, EP20K100 consumed less power than XCV150 device. designs using embedded RAM, EP20K100 device consumed, average, less power than XCV150 device. smaller ESBs EP20K100 device provide more flexibility when implementing consume less power.
Clock Tree Power Consumption
global clock tree network buffers signal lines that connected registers device ensure that destinations simultaneously receive signal transitions. this experiment, EP20K100 clock tree consumed less power than XCV150 clock tree (see Figure
Figure Clock Tree Power Consumption
Xilinx XCV150
Power (mW) Altera EP20K100
Frequency (MHz)
Clock tree power consumption directly affected size clock tree, which, turn, directly related relative size device. XCV150 1.10 times larger than EP20K100 (see Figure Therefore, XCV150 clock tree consumes more power than EP20K100 clock tree. addition smaller size, EP20K100 device offers more more bits.
Figure Size Comparison
Altera EP20K100 Relative Size 0.22 Layers 4,160
Xilinx XCV150 Relative Size 1.10 0.22 Layers 3,456
Altera Corporation
Power Consumption Comparison: APEX Virtex Devices
Continuous Interconnect Routing Versus Segmented Routing
Several factors contribute lower power consumption Altera EP20K100 devices over Xilinx XCV150 devices. most significant factor device interconnect structure. EP20K100 devices continuous routing structure that better suited interconnect routing than pass transistors used XCV150 devices. Because interconnect path uses more pass transistors segmented Virtex architecture than continuous APEX architecture, capacitance given path lower APEX devices, resulting lower power consumption.
APEX 20KE Power Consumption
APEX 20KE devices will further reduce power consumption. APEX 20KE devices operate core voltage based 0.18-µm, six-layer-metal process. Less capacitance from smaller process lower core voltage expected reduce power consumption APEX 20KE devices about over APEX devices. Figure shows projected power consumption APEX 20KE devices.
Figure Power Consumption Virtex, APEX APEX 20KE Devices
800.0 700.0 600.0 500.0 Xilinx XCV150 Altera EP20K100 Altera EP20K100E
Power (mW) 400.0
300.0 200.0 100.0 16-Bit Counters (100 MHz) Clock Tree Loaded 3,456 Registers (100 MHz) Dual-Port Blocks MHz) Dual-Port Blocks MHz)
Note:
Projected power consumption.
LVDS Power Consumption
APEX 20KE devices support voltage differential signaling (LVDS) standard. Using LVDS high-frequency signals reduces power consumption 93.5%. Using LVDS channel 622.08 million bits second (MBPS) equivalent using eight low-voltage CMOS (LVCMOS) signals 77.76 MHz. voltage swing LVDS signals voltage swing LVCMOS signals Toggling eight LVCMOS pins 77.75 consumes 27.09 power. Toggling LVDS channel 622.08 MBPS consumes 1.83 power. Figure compares power consumption LVDS LVCMOS.
Altera Corporation
Power Consumption Comparison: APEX Virtex Devices
Figure LVDS LVCMOS Power Consumption Comparison
30.0 25.0 20.0 Power (mW) 15.0 10.0
LVDS (One Channel 622.08 MBPS)
LVCMOS Pins 77.76 MHz)
References
detailed information about APEX devices, APEX Programmable Logic Device Family Data Sheet Application Note (Using Selectable Standards Altera Devices). obtain these documents from:
Altera Literature Services (888) 3-ALTERA Altera site http://www.altera.com Your local Altera sales representative
Innovation Drive Jose, 95134 (408) 544-7000 http://www.altera.com
Copyright 1999 Altera Corporation. Altera, APEX, APEX 20K, APEX 20KE, EP20K100, EP20K100E trademarks and/or service marks Altera Corporation United States other countries. Altera Corporation acknowledges trademarks other organizations their respective products services mentioned this document, including following: Virtex, XCV150, Xilinx trademarks Xilinx, Inc. Other brands products trademarks their respective holders. specifications contained herein subject change without notice. Altera assumes responsibility liability arising application information, product, service described herein except expressly agreed writing Altera Corporation. Altera customers advised obtain latest version device specifications before relying published information before placing orders products services. rights reserved.
Altera Corporation

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