Overview Summary Tables. Logic Cells. Flip-Flops. 3-219 Latches. 3-315
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Internal Macrocells
Overview Summary Tables. Logic Cells. Flip-Flops. 3-219 Latches. 3-315 Holder. 3-340 Internal Clock Drivers 3-341 Adders 3-343 Multiplexers 3-348 Integrated Clock-Gating Cells. 3-369
INTERNAL MACROCELLS
OVERVIEW
OVERVIEW
This chapter contains data sheets standard logic macrocells; combinational logic cells, flip-flops, latches, holder, internal clock drivers, decoders, adders multiplexers. electrical characteristics each cell follow each cell's description. summary table following pages list entire STD131 standard logic macrocell library cell type along with cell description page number. Moreover, each section begins with table containing brief functional description each cell that section.
Samsung ASIC
STD131
SUMMARY TABLES
INTERNAL MACROCELLS
SUMMARY TABLES
Logic Cells
Cell Type Cell Cell Name AD2/AD2D2/AD2D4/AD2D8 AD2B/AD2BD2/AD2BD4/AD2BD8 AD3/AD3D2/AD3D4 AD4/AD4D2/AD4D4 AD5/AD5D2/AD5D4 NAND Cell ND2/ND2D2/ND2D4/ND2D8 ND2B/ND2BD2/ND2BD4/ND2BD8 ND3/ND3D2/ND3D4/ND3D8 ND3B/ND3BD2/ND3BD4/ND3BD8 ND4/ND4D2/ND4D4 ND5/ND5D2/ND5D4 ND6/ND6D2/ND6D4 ND8/ND8D2/ND8D4 Cell NR2/NR2A/NR2D2/NR2D4/NR2D8 NR2B/NR2BD2/NR2BD4/NR2BD8 NR3/NR3A/NR3D2/NR3D4 NR4/NR4D2/NR4D4 NR5/NR5D2/NR5D4 NR6/NR6D2/NR6D4 NR8/NR8D2/NR8D45 Cell OR2/OR2D2/OR2D4/OR2D8 OR2B/OR2BD2/OR2BD4/OR2BD8 OR3/OR3D3/OR3D4 OR4/OR4D2/OR4D4 OR5/OR5D2/OR5D4 Exclusive-NOR Cell Exclusive-OR Cell XN2/XN2D2/XN2D4 XN3/XN3D2/XN3D4 XO2/XO2D2/XO2D4 XO3/XO3D2/XO3D4 Page 3-14 3-16 3-18 3-20 3-22 3-25 3-27 3-29 3-32 3-35 3-37 3-40 3-44 3-48 3-50 3-52 3-55 3-57 3-61 3-65 3-69 3-71 3-73 3-75 3-77 3-80 3-82 3-84 3-86
STD131
Samsung ASIC
INTERNAL MACROCELLS
SUMMARY TABLES
Cell Type Combinational Cell
Cell Name AO21/AO21D2/AO21D4 AO211/AO211D2/AO211D4 AO2111/AO2111D2 AO22/AO22D2/AO22D4 AO22A AO221/AO221D2/AO221D4 AO222/AO222D2/AO222D4 AO222A AO2222/AO2222D2/AO2222D4 AO31/AO31D2/AO31D4 AO311 AO3111 AO32/AO32D2 AO321 AO322 AO33 AO331 AO332
Page 3-88 3-90 3-92 3-94 3-96 3-97 3-100 3-104 3-105 3-109 3-111 3-112 3-113 3-115 3-116 3-118 3-120 3-122 3-124 3-126 3-128 3-130 3-132 3-134 3-137 3-141 3-145 3-147 3-148 3-149 3-150 3-151 3-15
Combinational Cell NAND
OA21/OA21D2/OA21D4 OA211/OA211D2/OA211D4 OA2111/OA2111D2 OA22/OA22D2/OA22D4 OA22A/OA22D2A/OA22D4A OA221/OA221D2/OA221D4 OA222/OA222D2/OA222D4 OA2222/OA2222D2/OA2222D4 OA31/OA31D2/OA31D4 OA311 OA3111 OA32 OA321 OA322
Samsung ASIC
STD131
SUMMARY TABLES
INTERNAL MACROCELLS
Cell Type Complex Cells SCG1/SCG1D2
Cell Name SCG2/SCG2D2/SCG2D4 SCG3/SCG3D2/SCG3D4 SCG4/SCG4D2/SCG4D4 SCG5/SCG5D2/SCG5D4 SCG6/SCG6D2 SCG7/SCG7D2 SCG8/SCG8D2 SCG9/SCG9D2 SCG10/SCG10D2 SCG11/SCG11D2 SCG12/SCG12D2/SCG12D4 SCG13/SCG13D2 SCG14/SCG14D2 SCG15/SCG15D2 SCG16/SCG16D2 SCG17/SCG17D2
Page 3-154 3-157 3-159 3-162 3-166 3-170 3-172 3-174 3-176 3-178 3-180 3-182 3-184 3-186 3-188 3-190 3-192 3-194 3-196 3-198 3-200 3-202 3-204 3-205 3-206 3-207 3-208 3-211 3-213 3-216
Complex Cells
SCG18/SCG18D2 SCG19/SCG19D2 SCG20/SCG20D2 SCG21/SCG21D2 SCG22/SCG22D2
Delay Cells
DL1D2 DL2D2 DL5D2 DL10D2
Inverter Inverting Tri-State Buffer Non-Inverting Buffer
IVT/IVTD2/IVTD4/IVTD8/IVTD16 NIT/NITD2/NITD4/NITD8/NITD16
Flip-Flops
Cell Type Flip-Flop FD1/FD1D2 FD1CS/FD1CSD2 FD1S/FD1SD2 FD1SQ/FD1SQD2 FD1Q/FD1QD2 Cell Name Page 3-222 3-224 3-226 3-228 3-230
STD131
Samsung ASIC
INTERNAL MACROCELLS
SUMMARY TABLES
Cell Type Flip-Flop with Reset FD2/FD2D2 FD2CS/FD2CSD2 FD2S/FD2SD2 FD2SQ/FD2SQD2 FD2Q/FD2QD2 Flip-Flop with FD3/FD3D2 FD3CS/FD3CSD2 FD3S/FD3SD2 FD3SQ/FD3SQD2 FD3Q/FD3QD2 Flip-Flop with Reset, FD4/FD4D2 FD4CS/FD4CSD2 FD4S/FD4SD2 FD4SQ/FD4SQD2 FD4Q/FD4QD2 Flip-Flop with Negative Edge Trigger FD5/FD5D2 FD5S/FD5SD2 FD6/FD6D2 FD6S/FD6SD2 FD7/FD7D2 FD7S/FD7SD2 FD8/FD8D2 FD8S/FD8SD2 Flip-Flop with Synchronous Clear FDS2/FDS2D2
Cell Name
Page 3-232 3-234 3-238 3-240 3-242 3-244 3-246 3-250 3-252 3-254 3-256 3-259 3-263 3-267 3-270 3-272 3-274 3-276 3-278 3-280 3-282 3-284 3-287 3-291 3-293 3-295 3-297 3-299 3-301 3-303 3-305 3-307 3-310 3-31
FDS2CS/FDS2CSD2 FDS2S/FDS2SD2 FDS3/FDS3D2 FDS3CS/FDS3CSD2 FDS3S/FDS3SD2 Flip-Flop FJ2/FJ2D2 FJ2S/FJ2SD2 FJ4/FJ4D2 FJ4S/FJ4SD2 Toggle Flip-Flop FT2/FT2D2
Samsung ASIC
STD131
SUMMARY TABLES
INTERNAL MACROCELLS
Latches
Cell Type Latch with Active High LD1/LD1D2 LD1Q/LD1QD2 LD2/LD2D2 LD2Q/LD2QD2 LD3/LD3D2 LD4/LD4D2 Latch with Active LD5/LD5D2 LD5Q/LD5QD2 LD6/LD6D2 LD6Q/LD6QD2 Cell Name Page 3-316 3-318 3-320 3-323 3-325 3-328 3-331 3-333 3-335 3-338
Holder
Cell Type Holder BUSHOLDER Cell Name Page 3-340
Internal Clock Drivers
Cell Type Internal Clock Drivers CK2/CK4/CK6/CK8 Cell Name Page 3-342
Adders
Cell Type Full Adder Half Adder FA/FAD2 HA/HAD2 Cell Name Page 3-344 3-346
Multiplexers
Cell Type Non-Inverting Inverting Non-Inverting Non-Inverting Cell Name MX2/MX2D2/MX2D4 MX2I/MX2ID2/MX2ID4 MX2IA/MX2ID2A/MX2ID4A MX4/MX4D2/MX4D4 MX8/MX8D2/MX8D4 Page 3-349 3-352 3-354 3-357 3-361
Integrated Clock-Gating Cells
Cell Type Integrated Clock-Gating Cells Cell Name CGLP/CGLPD2/CGLPD4 Page 3-370
STD131
Samsung ASIC
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