100397 Quad Differential Translating Transceiver with Latch 10039
|
|
|
Top Searches for this datasheet
100397 Quad Differential Translating Transceiver with Latch
100397 Quad Differential Translating Transceiver with Latch
100397 quad latched transceiver designed convert logic levels differential F100K logic levels vice versa This device designed with capability driving differential load with cutoff capability will sink load 100397 ideal mixed technology applications utilizing either backplane direction translation direction control (DIR) 100397 accepts F100K logic levels sets pins inputs pins outputs HIGH sets pins inputs pins outputs output enable input (OE) holds output cut-off state outputs high impedance level HIGH latch enable input (LE) latches data both inputs even though only output enabled time makes latch transparent cut-off state designed more negative than normal level This allows output emitterfollowers turn when termination supply presenting high impedance data This high impedance reduces termination power prevents loss state noise margin when several loads share 100397 designed with FAST output buffers featuring optimal drive capable quickly charging discharging highly capacitive loads inputs have pull-down resistors
Features
Differential input output structure FAST outputs differential outputs with cut-off Bi-directional translation 2000V protection Latched outputs TRI-STATE outputs Voltage compensated operating range
Logic Symbol
10971
Connection Diagrams
24-Pin 28-Pin
10971
FAST TRI-STATE registered trademarks National Semiconductor Corporation C1995 National Semiconductor Corporation
10971
10971
RRD-B30M105 Printed
Functional Diagram
Detail
10971
10971-5
Note logic levels
Truth Table
Names GNDECL GNDECLO GNDS VEED GNDTTL GNDTTLD VTTL VTTLD Description Data Complementary Data Data Output Enable Input (ECL Levels) Latch Enable Input (ECL Levels) Direction Control Input (ECL levels) Ground Output Ground Ground-to-Substrate Quiescent Power Supply Dynamic Power Supply Quiescent Ground Dynamic Ground Quiescent Power Supply Dynamic Power Supply Port (Cut-Off) Input (Cut-Off) Output Input Latched (Cut-Off) Latched Port Output Input Input Notes
pins function 100K levels except
HIGH Voltage Level Voltage Level Don't Care High Impedance Note input output mode Note input output mode Note Retains data present before HIGH Note Latch transparent
Absolute Maximum Ratings (Note
Military Aerospace specified devices required please contact National Semiconductor Sales Office Distributors availability specifications Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic Plastic Potential Ground VTTL Potential Ground Input Voltage (DC) Output Current Output HIGH) Input Voltage (Note Input Current (Note
Voltage Applied Output HIGH State TRI-STATE Output Current Applied Output State (Max) (Note
Twice Rated (mA)
2000V
Recommended Operating Conditions
Case Temperature (TC) Commercial Industrial Military Supply Voltage (VEE) Supply Voltage (VTTL)
Note Absolute maximum ratings those values beyond which device damaged have useful life impaired Functional operation under these conditions implied Note testing conforms MIL-STD-883 Method 3015 Note Either voltage limit current limit sufficient protect inputs
Commercial Version TTL-to-ECL Electrical Characteristics
VTTL (Note Symbol Parameter Output HIGH Voltage Output Voltage Cutoff Voltage
2000 1950
1025 1830
1705
1620
Units
Conditions VIH(Max) VIL(Min) Loading with High VIH(Max) VIL(Min) Loading with VIH(Min) VIL(Max) Loading with
VOHC VOLC IBVIT VFCD IEEZ
Output HIGH Voltage Corner Point High Output Voltage Corner Point Input HIGH Voltage Input Voltage Input HIGH Current Input HIGH Current Breakdown Input Current Input Clamp Diode Voltage Supply Current Supply Current
1035 1610
Over VTTL Range Over VTTL Range High Inputs Open High Inputs Open
Note specified limits represent ``worst case'' value parameter Since these values normally occur temperature extremes additional noise immunity guardbanding achieved decreasing allowable system operating ranges Conditions testing shown tables chosen guarantee operation under ``worst case'' conditions
Commercial Version (Continued) ECL-to-TTL Electrical Characteristics
VTTL (Note Symbol VDIFF Parameter Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input Voltage Differential Common Mode Voltage Input HIGH Current Output HIGH Leakage Current Drainage Test Input Current TRI-STATE Current Output High TRI-STATE Current Output Output Short-Circuit Current VTTL Supply Current
1165 1830
Units
Conditions VTTL VTTL VTTL Guaranteed HIGH Signal Inputs Guaranteed Signal Inputs Required Full Output Swing
1475
GNDECL GNDECL
VIH(Max) VOUT VTTL VOUT VTTL VIL(Min) VOUT VOUT VOUT VTTL Outputs Outputs HIGH Outputs TRI-STATE
ICEX IOZHT IOZLT ITTL
Note specified limits represent ``worst case'' value parameter Since these values normally occur temperature extremes additional noise immunity guardbanding achieved decreasing allowable system operating ranges Conditions testing shown tables chosen guarantee operation under ``worst case'' conditions
Commercial Version (Continued) TTL-to-ECL Electrical Characteristics
VTTL Symbol FMax tPLH tPHL tPLH tPHL tPZH tPHZ tPHZ tTLH tTHL Parameter Maximum Clock Frequency (Transparent) (Cutoff High) (High Cutoff) (High Cutoff) Transition Time Units Conditions
Figures Figures Figures Figures Figures Figure Figures Figures
ECL-to-TTL Electrical Characteristics
VTTL Symbol FMax tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tPW(L) Parameter Maximum Clock Frequency (Transparent) (Enable Time) (Disable Time) (Disable Time) Pulse Width Units Conditions
Figures Figures Figures Figures Figures Figures Figures Figures
Industrial Version TTL-to-ECL Electrical Characteristics
VTTL (Note Symbol Parameter Output HIGH Voltage Output Voltage Cutoff Voltage
2000 1900
1085 1830
1705
1575
Units
Conditions VIH(Max) VIL(Min) Loading with High VIH(Max) VIL(Min) Loading with VIH(Min) VIL(Max) Loading with
VOHC VOLC IBVIT VFCD IEEZ
Output HIGH Voltage Corner Point High Output Voltage Corner Point Input HIGH Voltage Input Voltage Input HIGH Current Input HIGH Current Breakdown Input Current Input Clamp Diode Voltage Supply Current Supply Current
1095 1565
Over VTTL Range Over VTTL Range High Inputs Open High Inputs Open
Note specified limits represent ``worst case'' value parameter Since these values normally occur temperature extremes additional noise immunity guardbanding achieved decreasing allowable system operating ranges Conditions testing shown tables chosen guarantee operation under ``worst case'' conditions
Industrial Version (Continued) ECL-to-TTL Electrical Characteristics
VTTL (Note Symbol VDIFF Parameter Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input Voltage Differential Common Mode Voltage Input HIGH Current Output HIGH Leakage Current Drainage Test Input Current TRI-STATE Current Output High TRI-STATE Current Output Output Short-Circuit Current VTTL Supply Current
1170 1830
Units
Conditions VTTL VTTL VTTL Guaranteed HIGH Signal Inputs Guaranteed Signal Inputs Required Full Output Swing
1480
GNDECL GNDECL
VIH(Max) VOUT VTTL VOUT VTTL VIL(Min) VOUT VOUT VOUT VTTL Outputs Outputs HIGH Outputs TRI-STATE
ICEX IOZHT IOZLT ITTL
Note specified limits represent ``worst case'' value parameter Since these values normally occur temperature extremes additional noise immunity guardbanding achieved decreasing allowable system operating ranges Conditions testing shown tables chosen guarantee operation under ``worst case'' conditions
Industrial Version (Continued) TTL-to-ECL Electrical Characteristics
VTTL Symbol FMax tPLH tPHL tPLH tPHL tPZH tPHZ tPHZ tTLH tTHL Parameter Maximum Clock Frequency (Transparent) (Cutoff High) (High Cutoff) (High Cutoff) Transition Time Units Conditions
Figures Figures Figures Figures Figures Figures Figures Figures
ECL-to-TTL Electrical Characteristics
VTTL Symbol FMax tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tPW(L) Parameter Maximum Clock Frequency (Transparent) (Enable Time) (Disable Time) (Disable Time) Pulse Width Units Conditions
Figures Figures Figures Figures Figures Figures Figures Figures
Military Version Preliminary TTL-to-ECL Electrical Characteristics
VTTL Symbol Parameter Output HIGH Voltage
1025 1085
1620 1555 1950 1850
Units
Conditions
Notes
Output Voltage
1830 1830
(Max) (Min) Loading with
Cutoff Voltage
VOHC
Output HIGH Voltage
1035 1085
VOLC
Output Voltage
1610 1555
(Min) (Max)
Loading with
Input HIGH Voltage Input Voltage Input HIGH Current Breakdown Test
Over VTTL Range Over VTTL Range
High Inputs Open
VFCD
Input Current Input Clamp Diode Voltage Supply Current
Military Version
Preliminary (Continued)
ECL-to-TTL Electrical Characteristics
VTTL Symbol IOZHT IOZLT ITTL Parameter Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input HIGH Current Input Current TRI-STATE Current Output High TRI-STATE Current Output Output Short-Circuit CURRENT VTTL Supply Current
Units
Conditions VTTL VTTL VTTL Guaranteed HIGH Signal Inputs Guaranteed Signal Inputs VIH(Max) VIL(Min) VOUT VOUT VOUT VTTL Outputs Output High Output TRI-STATE
Notes
1165 1830 1475
Note F100K Series cold temperature testing performed temperature soaking guarantee junction temperature equals then testing immediately without allowing junction temperature stabilize heat dissipation after power-up This provides ``cold start'' specs which considered worst case condition cold temperatures Note Screen tested 100% each device Subgroups Note Sample tested (Method 5005 Table each manufactured Subgroups Note Guaranteed applying specified input condition testing
TTL-to-ECL Electrical Characteristics
VTTL VCCA Symbol tPLH tPHL tPLH tPHL tPZH tPHZ tPHZ tset thold tpw(H) tTLH tTHL Parameter (Transparent) (Cutoff HIGH) (HIGH Cutoff) (HIGH Cutoff) Pulse Width Transition Time Units Conditions Notes
Figures
Figures Figures Figures Figures Figures Figures Figures Figures
Military Version ECL-to-TTL
Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tset thold tpw(H)
Preliminary (Continued)
Electrical Characteristics
Units Conditions Notes
VTTL Parameter (Transparent) (Enable Time) (Disable Time) (Disable Time) Pulse Width
Figures
Figures Figures Figures Figures Figures Figures Figures
Test Circuitry (TTL-to-ECL)
10971
Note termination When input output being monitored scope supplied scope's resistance When input output being moinitored external resistance must applied serve Note force signals brought coax lines Note VTTL decoupled grouond with ground decoupled ground with connected ground Note input pins equivelent force sense circuitry optional
FIGURE TTL-to-ECL Test Circuit
Switching Waveforms (TTL-to-ECL)
10971
FIGURE Transition
Propagation Delay Transition Times
Test Circuitry (ECL-to-TTL)
10971
Note termination When input output being monitored scope supplied scope's resistance When input output being moinitored external resistance must applied serve Note Tri-State pull switch connected only tests Note force signals brought coax lines Note VTTL decoupled grouond with ground decoupled ground with connected ground
FIGURE ECL-to-TTL Test Circuit
Switching Waveforms (Continued)
Note HIGH
10971
FIGURE ECL-to-TTL Transition
Propagation Delay Transition Times
Note HIGH
10971
FIGURE ECL-to-TTL Transition Output Enable Disable Times
Note HIGH HIGH
10971
FIGURE ECL-to-TTL Transition Output Disable Time
Applications
10971
FIGURE Applications Diagram
SRAM Interface Using 100397 Latched Translator
Ordering Information
device number used form part simplified purchasing code where package type temperature range defined follows 100397 Device Type (Basic) Package Code Ceramic Plastic Dual-In-Line Plastic Leaded Chip Carrier (PCC) Special Variations Commercial grade device with burn-in Military grade device with environmental burn-in processing Temperature Range Commercial Industrial (b40 only Military (b55
Physical Dimensions inches (millimeters)
24-Lead Plastic Dual-In-Line Package wide) Package Number N24E
100397 Quad Differential Translating Transceiver with Latch
Physical Dimensions inches (millimeters) (Continued)
28-Lead Plastic Chip Carrier Package Number V28A Note Pedestal shown base available F100K products
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user
National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018
critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness
National Semiconductor Europe (a49) 0-180-530 Email cnjwge tevm2 Deutsch (a49) 0-180-530 English (a49) 0-180-532 Fran (a49) 0-180-532 Italiano (a49) 0-180-534
National Semiconductor Hong Kong 13th Floor Straight Block Ocean Centre Canton Tsimshatsui Kowloon Hong Kong (852) 2737-1600 (852) 2736-9960
National Semiconductor Japan 81-043-299-2309 81-043-299-2408
National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications
Other recent searches
SM6500AA-2 - SM6500AA-2 SM6500AA-2 Datasheet
RF1601T2D - RF1601T2D RF1601T2D Datasheet
GP522 - GP522 GP522 Datasheet
ES51922 - ES51922 ES51922 Datasheet
RS232 - RS232 RS232 Datasheet
EE-56 - EE-56 EE-56 Datasheet
BHF4431HS - BHF4431HS BHF4431HS Datasheet
ARM966E-S - ARM966E-S ARM966E-S Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
