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July 1992 100351 Power Flip-Flop 100351 contains D-type edge
Top Searches for this datasheet100351 Power Flip-Flop July 1992 100351 Power Flip-Flop 100351 contains D-type edge-triggered master slave flip-flops with true complement outputs pair common Clock inputs (CPa CPb) common Master Reset (MR) input Data enters master when both transfers slave when both) HIGH input overrides other inputs makes outputs inputs have pulldown resistors Features power reduction 100151 2000V protection function compatible with 100151 Voltage compensated operating range Available industrial grade temperature range Logic Symbol Names 9885 Description Data Inputs Common Clock Inputs Asynchronous Master Reset Input Data Outputs Complementary Data Outputs Connection Diagrams 24-Pin SOIC 28-Pin 24-Pin Quad Cerpak 9885 9885 9885-1 C1995 National Semiconductor Corporation 9885 RRD-B30M115 Printed Logic Diagram 9885 Truth Tables (Each Flip-flop) Synchronous Operation Inputs Outputs Qn(t Qn(t) Qn(t) Qn(t) Asynchronous Operation Inputs Outputs Qn(t HIGH Voltage Level Voltage Level Don't Care Time before positive transition Time after positive transition LOW-to-HIGH transition Absolute Maximum Ratings Above which useful life impaired (Note Military Aerospace specified devices required please contact National Semiconductor Sales Office Distributors availability specifications Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic Plastic Potential Ground Input Voltage (DC) Output Current Output HIGH) (Note Recommended Operating Conditions Case Temperature (TC) Commercial Industrial Military Supply Voltage (VEE) 2000V Note Absolute maximum ratings those values beyond which device damaged have useful life impaired Functional operation under these conditions implied Note testing conforms MIL-STD-883 Method 3015 Commercial Version Electrical Characteristics VCCA (Note Symbol VOHC VOLC Parameter Output HIGH Voltage Output Voltage Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input Current Input HIGH Current Power Supply Current 1165 1830 1025 1830 1035 1705 1620 Units Conditions (Max) (Min) (Min) (Max) Loading with Loading with 1610 1475 Guaranteed HIGH Signal Inputs Guaranteed Signal Inputs (Min) (Max) Inputs Open Note specified limits represent ``worst case'' value parameter Since these values normally occur temperature extremes additional noise immunity guardbanding achieved decreasing allowable system operating ranges Conditions testing shown tables chosen guarantee operation under ``worst case'' conditions Electrical Characteristics VCCA Symbol fmax tPLH tPHL tPLH tPHL tTLH tTHL Parameter Toggle Frequency Propagation Delay Output Propagation Delay Output Transition Time Units Conditions Figures Figures Figures Figures Commercial Version (Continued) Electrical Characteristics (Continued) VCCA Symbol Parameter Setup Time (Release Time) Hold Time Pulse Width HIGH Units Conditions Figure Figure Figure Figures tpw(H) SOIC Cerpak Electrical Characteristics VCCA Symbol fmax tPLH tPHL tPLH tPHL tTLH tTHL Parameter Toggle Frequency Propagation Delay Output Propagation Delay Output Transition Time Setup Time (Release Time) Hold Time Pulse Width HIGH Maximum Skew Common Edge Output-to-Output Variation Clock Output Path Maximum Skew Common Edge Output-to-Output Variation Clock Output Path Maximum Skew Opposite Edge Output-to-Output Variation Clock Output Path Maximum Skew (Signal) Transition Variation Clock Output Path Units Conditions Figures Figures Figures Figures Figure Figure Figure Figures only (Note only (Note only (Note only (Note tpw(H) tOSHL tOSLH tOST Note Output-to-Output Skew defined absolute value difference between actual propagation delay outputs within same packaged device specifications apply outputs switching same direction either HIGH (tOSHL) HIGH (tOSLH) opposite directions both (tOST) Parameters tOST guaranteed design Industrial Version Electrical Characteristics VCCA (Note Symbol VOHC VOLC Parameter Output HIGH Voltage Output Voltage Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input Current Input HIGH Current Power Supply Current 1170 1830 1085 1830 1095 1565 1480 1025 1830 1035 1610 1165 1830 1475 Units Conditions (Max) (Min) (Min) (Max) Loading with Loading with 1575 1620 Guaranteed HIGH Signal Inputs Guaranteed Signal Inputs (Min) (Max) Inputs Open Note specified limits represent ``worst case'' value parameter Since these values normally occur temperature extremes additional noise immunity guardbanding achieved decreasing allowable system operating ranges Conditions testing shown tables chosen guarantee operation under ``worst case'' conditions Electrical Characteristics VCCA Symbol fmax tPLH tPHL tPLH tPHL tTLH tTHL Parameter Toggle Frequency Propagation Delay Output Propagation Delay Output Transition Time Setup Time (Release Time) Hold Time Pulse Width HIGH Units Conditions Figures Figures Figures Figures Figure Figure Figure Figures tpw(H) Military Version Preliminary Electrical Characteristics VCCA Symbol Parameter Output HIGH Voltage 1025 1085 1620 1555 Units Conditions Notes Output Voltage 1830 1830 (Max) (Min) Loading with VOHC Output HIGH Voltage 1035 1085 VOLC Output Voltage 1610 1555 (Min) (Max) Loading with Input HIGH Voltage Input Voltage Input Current Input HIGH Current 1165 1830 1475 Guaranteed HIGH Signal Inputs Guaranteed Signal Inputs (Min) (Max) Power Supply Current Inputs Open Note F100K Series cold temperature testing performed temperature soaking guarantee junction temperature equals then testing immediately without allowing junction temperature stabilize heat dissipation after power-up This provides ``cold start'' specs which considered worst case condition cold temperatures Note Screen tested 100% each device Subgroups Note Sample tested (Method 5005 Table each manufactured Subgroups Note Guaranteed applying specified input condition testing Military Version Preliminary (Continued) Electrical Characteristics VCCA Symbol fmax tPLH tPHL tPLH tPHL tTLH tTHL Parameter Toggle Frequency Propagation Delay Output Propagation Delay Output Transition Time Setup Time (Release Time) Hold Time Pulse Width HIGH Units Conditions Notes Figures Figures Figures Figures Figure Figure Figure Figures tpw(H) Note F100K Series cold temperature testing performed temperature soaking guarantee junction temperature equals then testing immediately without allowing junction temperature stabilize heat dissipation after power-up This provides ``cold start'' specs which considered worst case condition cold temperatures Note Screen tested 100% each device Temperature only Subgroup Note Sample tested (Method 5005 Table each Subgroup Temperature Subgroups Note tested Temperature (design characterization data) Test Circuitry Notes VCCA equal length impedance lines terminator internal scope Decoupling from unused outputs loaded with Fixture stray capacitance 9885 FIGURE Test Circuit Notes VCCA equal length impedance lines terminator internal scope Decoupling from unused outputs loaded with stray capacitance 9885 FIGURE Toggle Frequency Test Circuit Switching Waveforms 9885 FIGURE Propagation Delay (Clock) Transition Times 9885 FIGURE Propagation Delay (Reset) 9885 Notes minimum time before transition clock that information must present data input minimum time after transition clock that information must remain unchanged data input FIGURE Setup Hold Time Ordering Information device number used form part simplified purchasing code where package type temperature range defined follows 100351 Device Type (Basic) Package Code Ceramic Flatpak Plastic Plastic Leaded Chip Carrier (PCC) Small Outline (SOIC) Special Variation Military grade device with environmental processing shipped tubes Temperature Range Commercial Industrial (b40 (PCC only) Military (b55 Physical Dimensions inches (millimeters) 24-Lead Ceramic Dual-In-Line Package Wide) Package Number J24E 24-Lead Molded Package Wide) Package Number M24B Physical Dimensions inches (millimeters) (Continued) 24-Lead Plastic Dual-In-Line Package Package Number N24E Package Number V28A 28-Lead Plastic Chip Carrier OVERFLOW DATA THIS PAGE 100351 Power Flip-Flop Physical Dimensions inches (millimeters) (Continued) 103903 24-Lead Quad Cerpak Package Number W24B LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018 critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness National Semiconductor Europe (a49) 0-180-530 Email cnjwge tevm2 Deutsch (a49) 0-180-530 English (a49) 0-180-532 Fran (a49) 0-180-532 Italiano (a49) 0-180-534 National Semiconductor Hong Kong 13th Floor Straight Block Ocean Centre Canton Tsimshatsui Kowloon Hong Kong (852) 2737-1600 (852) 2736-9960 National Semiconductor Japan 81-043-299-2309 81-043-299-2408 National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications Other recent searchestr6ph0 - tr6ph0 tr6ph0 Datasheet fe4b - fe4b fe4b Datasheet it9d - it9d it9d Datasheet od0t - od0t od0t Datasheet RCM5600W - RCM5600W RCM5600W Datasheet CLV0795E-LF - CLV0795E-LF CLV0795E-LF Datasheet CDLE-138-032 - CDLE-138-032 CDLE-138-032 Datasheet AOZ1117 - AOZ1117 AOZ1117 Datasheet AA3022ES-4 - AA3022ES-4 AA3022ES-4 Datasheet
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