CD4009M CD4009C Buffers (Inverting) CD4010M CD4010C Buffers (Non-Inver

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CD4009M CD4009C Buffers (Inverting) CD4010M CD4010C Buffers (Non-Inver

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CD4009M CD4009C Buffers (Inverting) CD4010M CD4010C Buffers (Non-Inverting)
CD4009M CD4009C Buffers (Inverting) CD4010M CD4010C Buffers (Non-Inverting)
These buffers monolithic complementary (CMOS) integrated circuits P-channel enhancement mode transistors provide symmetrical circuit with output swings essentially equal supply voltage This results high noise immunity over wide supply voltage range power other than that caused leakage current consumed during static conditions inputs protected against static discharge These gates used buffers CMOS interface CMOS current drivers Conversion ranges from providing
Features
Wide supply voltage range power High noise immunity High current sinking capability
(typ (typ (min
Applications
Automotive Data terminals Instrumentation Medical electronics
Alarm system Industrial controls Remote metering Computers
Schematic Connection Diagrams
Dual-In-Line Package Dual-In-Line Package
5945
5945
View Order Number CD4009 CD4010 CD4009M CD4009C
View CD4010M CD4010C
converter (non-inverting) Connect supply Connect supply
5945
converter (inverting) Connect supply Connect supply
5945
C1995 National Semiconductor Corporation
5945
RRD-B30M105 Printed
Absolute Maximum Ratings
Military Aerospace specified devices required please contact National Semiconductor Sales Office Distributors availability specifications Voltage (Note Operating Temperature Range CD40XXM CD40XXC
Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering seconds) Operating Range (VDD)
Electrical Characteristics
Symbol Characteristics Test Conditions (Volts) Quiescent Device Current Quiescent Device Dissipation Package Output Voltage Level High Level Noise Immunity (All Inputs) Output Drive Current N-Channel (Note P-Channel (Note Input Current
Note tested output time
Limits CD40XXM
CD40XXC
Units
CD4009M CD4010M
Note This device should connected circuits with power because high transient voltage cause permanent damage
Electrical Characteristics
unless otherwise noted Typical Temperature coefficient values Test Conditions Characteristics (Volts) Propagation Delay Time High-to-Low Level (tPHL) Low-to-High Level (tPLH) Transition Time High-to-Low Level (tTHL) Low-to-High Level (tTLH) Input Capacitance (CI) Input Limits CD40XXM CD40XXC Units
Parameters guaranteed correlated testing
Typical Application
5945
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package Order Number CD4009MJ CD4009CJ CD4010MJ CD4010CJ Package Number J16A
CD4009M CD4009C Buffers (Inverting) CD4010M CD4010C Buffers (Non-Inverting)
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package Order Number CD4009MN CD4009CN CD4010MN CD4010CN Package Number N16E
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user
National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018
critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness
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National Semiconductor Japan 81-043-299-2309 81-043-299-2408
National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications

CD4009M CD4009C Buffers (Inverting) CD4010M CD4010C Buffers (Non-Inver

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