8-PIN SINGLE CONTROLLER WITH GENERAL DESCRIPTION single controlle

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8-PIN SINGLE CONTROLLER WITH GENERAL DESCRIPTION single controlle

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CM6503/4
8-PIN SINGLE CONTROLLER WITH GENERAL DESCRIPTION
single controller with clock CM6503/4 space-saving controller power factor corrected, switched mode power supplies that offers very start-up operating currents. power supply less than 500Watt, performance could very close CM6800 ML4800 architecture. dual function. CM6503/4 does require bleed resistors. during start condition start CM6503/4. After CM6503/4 will switch itself back function. Power Factor Correction (PFC) offers smaller, lower cost bulk capacitors, reduces power line loading stress switching FETs, results power supply fully compliant IEC1000-3-2 specifications. CM6503/4 includes circuits implementation leading edge, average current "boost" type trailing edge, Clock signal which will turn until boost output reaches steady state. CM6503's Clock operate same frequency, 67kHz. frequency CM6504 automatically half that 134kHz PWM. This higher frequency allows user design with smaller components while maintaining optimum operating frequency PFC. comparator shuts down section event sudden decrease load. section also includes peak current limiting enhanced system reliability.
CLOCK SIGNAL
FEATURES
Enable lowest power supply with Patented slew rate enhanced voltage error amplifier with advanced input current shaping technique Universal Line Input Voltage bleed resistor required boost boost with leading edge modulation using Input Current Shaping Technique Feedforward automatic slope compensation PFCOVP, TriFault Detect, VCCOVP, Precision ILIMIT supply currents; start-up: 100uA typical, operating current: typical. Synchronized leading trailing edge modulation Clock down stream stage reduce ripple current storage capacitor between sections reduce switching noise system VINOK Comparator guarantee enable Clock when reach steady state UVLO, VREFOK, brownout protection
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APPLICATIONS
Desktop Power Supply Adaptor Internet Server Power Supply Power Supply Battery Charger Motor Power Supply Monitor Power Supply Telecom System Power Supply Distributed Power
CONFIGURATION
DIP-08 (P08) View
PFCOUT ISENSE VEAO
MCLK
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH DESCRIPTION
Symbol ISENSE VEAO driver output Ground Current sense input current limit comparator transconductance voltage error amplifier output Description Min. Operating Voltage Typ. Max. Unit
CLOCK SIGNAL
transconductance voltage error amplifier input Feedforward input slope compensation start system
Positive supply
BLOCK DIAGRAM
VREFOK ISENSE
100K
400K
ISENSEAMP
PFCCMP
VREF
PFCOUT
2.5V
RAMP
UVLO
UVLO
VEAO
19.4V
FAULTB
Tri-Fault Detect
PFCCLKB PWMCLK
PFCCLKB PWMCLK
VREF
0.5V
PWMCLK
2.75V 2.5V
2.5V 0.75V
10mS
ILIMIT
CM6503 fpfc= 67KHz clk= 67KHz
CM6504 fpfc= 67KHz clk= 134KHz
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH ORDERING INFORMATION
Part Number CM6503IP CM6504IP Temperature Range Package 8-Pin PDIIP (P08) 8-Pin PDIP (P08)
CLOCK SIGNAL
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum ratings those values beyond which device could permanently damaged. Parameter (after start ISENSE Voltage Clock VEAO Voltage Other Current (Average) Peak Current, Source Sink Peak Current, Source Sink OUT, Energy Cycle Junction Temperature Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, sec) Thermal Resistance (JA) PDIP-08 SOP-08 Min. GND-0.3 Max. VREF Units
ELECTRICAL CHARACTERISTICS
TA=Operating Temperature Range (Note
Unless otherwise stated, these specifications apply Vcc=+15V,
Symbol
Parameter
Test Conditions Voltage Error Amplifier (gmv)
CM6503/4 Min. Typ. Max. -0.5 1000 1150 2.55 -1.0
Unit
Input Voltage Range Transconductance Feedback Reference Voltage Input Bias Current Output High Voltage Output Voltage Sink Current Source Current Open Loop Gain Power Supply Rejection Ratio Input Impedance 16.5V ISENSE VEAO 1.5V, VEAO 1.5V Note VNONINV VINV, VEAO 3.75V
µmho
2.45
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH
CLOCK SIGNAL
ELECTRICAL CHARACTERISTICS (Conti.) Unless otherwise stated, these specifications apply
Vcc=+15V, TA=Operating Temperature Range (Note CM6503/4 Min. ILIMIT Comparator Threshold Voltage Delay Output Oscillator Initial Accuracy Voltage Stability Temperature Stability Total Variation Dead Time (Note Minimum Duty Cycle Maximum Duty Cycle Output Impedance Output Voltage Output High Impendence Output High Voltage Rise/Fall Time (Note IOUT 100mA, 1000pF Clock Duty Cycle Range Output Impedance Output Voltage Output High Impendence Output High Voltage Rise/Fall Time (Note Start-Up Current Operating Current Undervoltage Lockout Threshold Undervoltage Lockout Hysteresis Note Guaranteed design, 100% production test. IOUT 100mA, 1000pF Supply 11V, 15V, 14.7 4.85 15.3 5.15 13.5 IOUT -100mA IOUT -10mA, CM6503 CM6504 49.5 49.5 14.2 13.5 IOUT -100mA IOUT -10mA, IAC=100uA,VFB=2.55V, ISENSE IAC=0uA,VFB=2.0V, ISENSE 14.2 Line, Temp 0.45 74.5 0.65 -0.9 -1.15 Typ. 19.4 Max. 1.65
Symbol
Parameter
Test Conditions Comparator
Unit
Threshold Voltage Hysteresis
Note Limits guaranteed 100% testing, sampling, correlation with worst-case test conditions.
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH TYPICAL PERFORMANCE CHARACTERISTIC
CLOCK SIGNAL
Transconductance (umho)
Voltage Error Amplifier (gmv) Transconductance
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH Functional Description
CM6503/4 consists ICST (Input Current Shaping Technique), (Continuous Conduction Mode) (Discontinuous Conduction Mode) boost (Power Factor Correction) front synchronized Clock synchronize down stream stage. CM6503/4 compatible with FAN6503/4. distinguished from earlier combo controllers count, innovative input current shaping technique, very start-up operating currents. clock synchronize conventional trailing-edge modulation stage, while uses leading-edge modulation. This patented Leading Edge/Trailing Edge (LETE) modulation technique helps minimize ripple current buss capacitor. features CM6503/4: Voltage Error Amplifier slew rate enhancement transconductance amplifier, gmv. This transconductance amplifier will increase transient response times from conventional comparator Tri-fault Detect UL1950 compliance enhanced safety feedforward signal from added automatic slope compensation. This increases signal noise ratio during light load; therefore, improved light load high input line voltage. CM6503 does require bleed resistor uses less than 500k resistor between rectified line voltage feed initial current before chip wakes VINOK comparator added guaranteed Clock cannot turn until reaches 2.5V which boost output about steady state, typical 380V. packages internal Zener which been replaced with VCCOVP comparator CM6503 operates both sections 67kHz, while CM6504 operates section twice frequency (134kHz) PFC. This allows smaller magnetic output filter components, while minimizing switching losses stage. Several protection features have been built into CM6503/4. These include soft-start, redundant overvoltage protection, Tri-Fault Detect, VINOK, peak current limiting, duty cycle limiting, under-voltage lockout, reference comparator VCCOVP.
CLOCK SIGNAL
(Pin return point circuits associated with this part. Note: high-quality, impedance ground critical proper operation High frequency grounding techniques should used. ISENSE (Pin This ties resistor which senses input current. This signal should negative with respect ground. internally feeds pulse-by-pulse current limit comparator current sense feedback signal. ILIMIT trip level -1V. ISENSE feedback internally multiplied gain four compared against internal programmed ramp duty cycle. intersection boost inductor current downslope with internal programming ramp determines boost off-time. requires filter between ISENSE boost sensing resistor. VEAO (Pin This slew rate enhanced transconductance amplifier output which needs connected with compensation network. (Pin Besides this slew rate enhanced transconductance input, also couple protection comparators, PFCOVP, Tri-Fault Detect. (pin Typically, feedforward resistor, RAC, less than 500K resistor connected between this rectified line input voltage. This serves purposes: During startup condition, supplies startup current; therefore, system does requires additional bleed resistor start chip. current will program automatic slope compensation system. This feedforward signal increase signal noise ratio light load condition high input line voltage condition. (Pin power input connection start-up current 100uA. no-load current 2mA. quiescent current will include both biasing currents output currents. Given operating frequency MOSFET gate charge (Qg), average output currents calculated IOUT average magnetizing current required gate drive transformers must also included. also assumed proportional output voltage. Internally tied comparator (19.4V) providing redundant high-speed over-voltage protection (OVP) stage. also ties internally UVLO circuitry VREFOK comparator, enabling disabling 10V. must bypassed with high quality ceramic bypass capacitor placed close
Detailed Descriptions (Pin high-current power driver capable directly driving gate power MOSFET with peak currents +0.5A. Both outputs actively held when below UVLO threshold level which VREFOK comparator low.
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH
possible Good bypassing critical proper operation CM6503/4. typically produced additional winding boost inductor Choke, providing voltage that proportional output voltage. Since voltage 19.4V, internal shunt limits overvoltage acceptable value. external clamp, such shown Figure desirable necessary.
CLOCK SIGNAL
hold input current draw device drawing power from line phase with proportional input voltage, must found prevent that device from loading line except proportion instantaneous line voltage. section CM6503/4 uses boost-mode DC-DC converter accomplish this. input converter full wave rectified line voltage. bulk filtering applied following bridge rectifier, input voltage boost converter ranges twice line frequency) from zero volts peak value input back zero. forcing boost converter meet simultaneous conditions, possible ensure that current draws from power line matches instantaneous line voltage. these conditions that output voltage boost converter must higher than peak value line voltage. commonly used value 385VFB, allow high line 270VACrms. other condition that current that converter allowed draw from line given instant must proportional line voltage. Control: Leading Edge Modulation with Input Current Shaping Technique (I.C.S.T.) only differences between conventional control topology I.C.S.T. current loop conventional control method close loop method requires detail understanding about system loop gain design. With I.C.S.T., since current loop open loop, very straightforward implement result system, power supply like pure resistor frequency. Therefore, current phase with voltage. conventional control, forces input current follow input voltage. CM6503, chip thinks boost converter needs behave like frequency resistor, what duty cycle should following equations CM6503 achieve:
5250B
ptional
This limits maximum that applied while allowing which high enough trip OVP. filter required between boost trap winding VCC. PWMCLK (Pin PWMCLK Clock signal down stream stage. This signal will until boost output reaches steady state which means reaches 2.45V. (Typical boost output around 380V. Then PWMCLK will send clock signal which been perfectly aligned with PFCOUT signal which leading edge modulation. Power Factor Correction Power factor correction makes nonlinear load look like resistive load line. resistor, current drawn from line phase with proportional line voltage, power factor unity (one). common class nonlinear load input most power supplies, which bridge rectifier capacitive input filter from line. peak-charging effect, which occurs input filter capacitor these supplies, causes brief high-amplitude pulses current flow from power line, rather than sinusoidal current phase with line voltage. Such supplies present power factor line less than (i.e. they cause significant current harmonics power line frequency appear their input). input current drawn such supply other nonlinear load) made follow input voltage instantaneous amplitude, will appear resistive line unity power factor will achieved.
Equation means: average boost inductor current equals input current.
Vout
Therefore, input instantaneous power about equal output instantaneous power.
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH
steady state each phase angle, boost converter equation continuous conduction mode
CLOCK SIGNAL
Vout
Vout Vout
Rearrange above equations, (1), (2),(3), term Vout boost converter duty cycle average boost diode current equation (5):
Vout
Vout toff
From this simple equation (8), implement control section CM6503. Leading/Trailing Modulation Conventional Pulse Width Modulation (PWM) techniques employ trailing edge modulation which switch will turn right after trailing edge system clock. error amplifier output then compared with modulating ramp. When modulating ramp reaches level error amplifier output voltage, switch will turned OFF. When switch inductor current will ramp effective duty cycle trailing edge modulation determined during time switch. Figure shows typical trailing edge control scheme. case leading edge modulation, switch turned right leading edge system clock. When modulating ramp reaches level error amplifier output voltage, switch will turned effective duty-cycle leading edge modulation determined during time switch. Figure shows leading edge control scheme.
Also, average diode current expressed
Toff
value boost inductor large enough, assume
means during each cycle
during sampling, diode current constant. Therefore, equation becomes:
toff
Combine equation equation (5), get:
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH
advantages this control technique that required only system clock. Switch 1(SW1) turns switch (SW2) turns same instant minimize momentary "no-load" period, thus lowering ripple voltage generated switching action. With such synchronized switching, ripple voltage first stage reduced. Calculation evaluation have shown that 120Hz component PFC's output ripple voltage reduced much using this method, substantially reducing dissipation high-voltage capacitor.
CLOCK SIGNAL
ZCV: Compensation Work Voltage Loop GMv: Transconductance VEAO PIN: Average Input Power VOUTDC: Boost Output Voltage; typical designed value 380V. CDC: Boost Output Capacitor VEAO: This necessary change VEAO deliver designed average input power. average value 6V-3V=3V since when input line voltage increases, delta VEAO will reduced deliver same output. over compensate, choose delta VEAO Internal Voltage Ramp internal ramp current source programmed VEAO voltage. When VEAO increases ramp current source also increase. This current source used develop internal ramp charging internal 30pF +12/ -10% capacitor. frequency internal programming ramp internally 67kHz. Design ISENSE Filtering ISENSE Filter, filter between ISENSE: There purposes filter ISENSE pin: Protection: During start inrush current conditions, will have large voltage cross which sensing resistor boost converter. requires ISENSE Filter attenuate energy. Reduce Boost Inductor: ISENSE Filter also reduce Boost Inductor value since ISENSE Filter behaves like integrator before going ISENSE which input current error amplifier, IEAO.
Typical Applications
Section: Voltage Loop Error Amp, VEAO ML4803 utilizes voltage error amplifier section (VEAO). CM6503/4, using slew rate enhanced transconductance amplifier, which same error amplifier CM6800. unique transconductance profile speed conventional transient response times. internal reference VEAO 2.5V. input VEAO pin. Voltage Loop Compensation voltage-loop bandwidth must less than 120Hz limit amount line current harmonic distortion. typical crossover frequency 30Hz. Voltage Loop Gain
VOUT VEAO VEAO VOUT 2.5V VOUTDC VEAO
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH
ISENSE Filter filter. resistor value ISENSE Filter between ohm. selecting RFILTER equal will keep offset IEAO less than 5mV. Usually, design pole ISENSE Filter fpfc/6, sixth switching frequency. Therefore, boost inductor reduced times without disturbing stability. Therefore, capacitor ISENSE Filter, CFILTER, will around 283nF. IAC, RAC, Automatic Slope Compensation, high line light load, Startup current There purposes pin: leading edge modulation, when duty cycle less than 50%, requires similar slope compensation, duty cycle trailing edge modulation greater than 50%. CM6503/4, relatively easy thing design. less than 500K resistor, connect rectified line voltage. will automatic slope compensation. input boost inductor small, need reduced more. During startup period, also provides initial startup current, 100uA;therefore, bleed resistor needed. Since with behaves feedforward signal, also enhances signal noise ratio input current. also will keep maximum input power constant. However, maximum input power will still when input line voltage goes Start system, UVLO, VREFOK During Start-up period, resistor will provide start current~100uA from rectified line voltage pin. Inside CM6503/4 during start-up period, connected until reaches UVLO voltage which internal reference voltage stable, will disconnect itself from VCC. section wakes after Start period After Start period, section will softly start since VEAO zero before start-up period. Since VEAO slew rate enhanced transconductance amplifier (see figure VEAO high impedance output like current source will slowly charge compensation work which needs designed using voltage loop gain equation. Before boost output reaches design voltage, around 380V reaches 2.5V, Clock low. clock starts function after reaches steady state clock time before reaches 2.45V.
CLOCK SIGNAL
Comparator Comparator sense which same voltage loop input. good thing compensation network connected VEAO. function relative fast OVP. like conventional error amplifier which operational amplifier requires local feedback make action becomes very slow. threshold 2.5V+10% =2.75V with 250mV hysteresis. Tri-Fault Detect Comparator improve power supply reliability, reduce system component count, simplify compliance UL1950 safety standards, CM6503/4 includes Tri-Fault Detect. This feature monitors (Pin certain fault conditions. case feedback path failure, output could safe operating limits. With such failure, will outside normal operating area. Should low, high, open, Tri-Fault Detect senses error terminates output drive. Tri-Fault detect entirely internal circuit. requires external components serve protective function. generate CM6503/4 system, generated from source that proportional output voltage once that source reaches 19.4V, PFCOUT, driver will off. resets once discharges below 17.9V, output driver enabled. serves redundant function. Typically, there bootstrap winding boost inductor. comparator senses when this voltage exceeds 19.4V, terminates output drive. Once rail decreased below 17.9V output drive enabled. Given that corresponds 380V output, 19.4V corresponds level 460V. necessary filter between bootstrap winding VCC. VCC=15V, sufficient drive either power MOSFET IGBT. UVLO UVLO threshold providing hysteresis. PFCOUT Clock Both PFCOUT PWMClock CMOS drivers. They both have adaptive anti-shoot through reduce switching loss. pull-up 30ohm PMOS driver pull-down 15ohm NMOS driver. source 0.5A sink above 15V.
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH
Clock PWMCLK Clock signal down stream stage. This signal will until boost output reaches steady state which means reaches 2.45V. (Typical boost output around 380V. Then PWMCLK will send clock signal which
CLOCK SIGNAL
been perfectly aligned with PFCOUT signal which leading edge modulation. CM6503, Clock running 67.5K CM6504, Clock running 135Khz.
APPLICATION CIRCUIT (CM6503/4)
VREFOK
ISENSE
CFilter
RFIlter
100K
400K
ISENSEAMP
PFCCMP
VREF
PFCOUT
2.5V
RAMP
UVLO
UVLO
VEAO
19.4V
FAULTB
Tri-Fault Detect
PFCCLKB PWMCLK
PFCCLKB
0.5V
VREF
PWMCLK
synchronize next stage
2.75V 2.5V
2.5V 0.75V
10mS
ILIMIT
CM6503 fpfc= 67KHz clk= 67KHz
CM6504 fpfc= 67KHz clk= 134KHz
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH PACKAGE DIMENSION
8-PIN PDIP (P08)
CLOCK SIGNAL
2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
Page
CM6503/4
8-PIN SINGLE CONTROLLER WITH
CLOCK SIGNAL
IMPORTANT NOTICE
Champion Microelectronic Corporation (CMC) reserves right make changes products discontinue integrated circuit product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. applications using integrated circuit products involve potential risks death, personal injury, severe property environmental damage. integrated circuit products designed, intended, authorized, warranted suitable products such applications order minimize risks associated with customer's applications, life-support applications, devices systems other critical applications. understood fully risk customer. customer should provide adequate design operating safeguards.
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2002/07/16 Preliminary Rev.
Champion Microelectronic Corporation
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8-PIN SINGLE CONTROLLER WITH GENERAL DESCRIPTION single controlle

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