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Operation Inputs Accept Voltages SN54AC11 PACKAGE SN74AC11 PACKAG
Top Searches for this datasheetSN54AC11, SN74AC11 TRIPLE INPUT POSITIVE GATES Operation Inputs Accept Voltages SN54AC11 PACKAGE SN74AC11 PACKAGE (TOP VIEW) SN54AC11 PACKAGE (TOP VIEW) internal connection ORDERABLE PART NUMBER SN74AC11N SN74AC11D SN74AC11DR SN74AC11NSR SN74AC11DBR SN74AC11PW SN74AC11PWR SNJ54AC11J SNJ54AC11W SNJ54AC11FK AC11 SNJ54AC11J SNJ54AC11W SNJ54AC11FK AC11 AC11 AC11 Tube Tube Tape reel Tape reel Tape reel Tube Tape reel Tube Tube Tube SN74AC11N FUNCTION TABLE (each gate) INPUTS OUTPUT products compliant 38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters. description/ordering information 'AC11 devices contain three independent 3-input gates. These devices perform Boolean function positive logic. ORDERING INFORMATION PDIP SOIC 85°C -40°C SSOP TSSOP CDIP 125°C -55°C LCCC PACKAGE TOP-SIDE MARKING Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. Copyright 2003, Texas Instruments Incorporated POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AC11, SN74AC11 TRIPLE INPUT POSITIVE GATES logic diagram, each gate (positive logic) numbers shown packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, VCC) Output clamp current, VCC) Continuous output current, VCC) Continuous current through ±200 Package thermal impedance, (see Note package 86°C/W package 96°C/W package 80°C/W package 76°C/W package 113°C/W Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AC11, SN74AC11 TRIPLE INPUT POSITIVE GATES recommended operating conditions (see Note SN54AC11 Supply voltage Low-level input voltage Input voltage Output voltage Low-level output current Input transition rise fall rate 3.15 3.85 1.35 1.65 SN74AC11 3.15 3.85 1.35 1.65 UNIT High-level input voltage High-level output current Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS GND, ±0.1 0.002 0.001 0.001 0.36 0.36 0.36 1.65 1.65 2.56 3.86 4.86 25°C 2.99 4.49 5.49 SN54AC11 3.85 3.85 0.44 0.44 0.44 SN74AC11 2.46 3.76 4.76 UNIT more than output should tested time, duration test should exceed POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AC11, SN74AC11 TRIPLE INPUT POSITIVE GATES switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) 25°C SN54AC11 10.5 SN74AC11 UNIT switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) 25°C SN54AC11 SN74AC11 UNIT operating characteristics, 25°C PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT PARAMETER MEASUREMENT INFORMATION TEST tPLH/tPHL Open From Output Under Test (see Note Open In-Phase Output tPHL Out-of-Phase Output LOAD CIRCUIT Input (see Note tPLH tPHL tPLH VOLTAGE WAVEFORMS NOTES: includes probe capacitance. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 4-Mar-2005 PACKAGING INFORMATION Orderable Device 5962-87611012A 5962-8761101CA 5962-8761101DA SN74AC11D SN74AC11DBLE SN74AC11DBR SN74AC11DR SN74AC11N SN74AC11NSR SN74AC11PW SN74AC11PWLE SN74AC11PWR SNJ54AC11FK SNJ54AC11J SNJ54AC11W Status ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE Package Type LCCC CDIP SOIC SSOP SSOP SOIC PDIP TSSOP TSSOP TSSOP LCCC CDIP Package Drawing Pins Package Plan 2000 2000 2500 2000 None None None Pb-Free (RoHS) None Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) None Pb-Free (RoHS) None None None Lead/Ball Finish Call Call Call NIPDAU Call NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU Call NIPDAU Call Call Call Peak Temp Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Call Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-NC-NC-NC Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-1-250C-UNLIM Call Level-1-250C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device. Plan currently available please check latest availability information additional product content details. None: available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Green (RoHS Sb/Br): defines "Green" mean "Pb-Free" addition, uses package materials that contain halogens, including bromine (Br) antimony (Sb) above 0.1% total product weight. MSL, Peak Temp. Moisture Sensitivity Level rating according JEDECindustry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis. Addendum-Page MECHANICAL DATA MLCC006B OCTOBER 1996 (S-CQCC-N**) TERMINAL SHOWN LEADLESS CERAMIC CHIP CARRIER TERMINALS 0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6) 0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0) 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 0.045 (1,14) 0.035 (0,89) 4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E JANUARY 1995 REVISED DECEMBER 2001 (R-PDSO-G**) PINS SHOWN 0,65 0,38 0,22 0,15 PLASTIC SMALL-OUTLINE 0,25 0,09 5,60 5,00 8,20 7,40 Gage Plane 0,25 0,95 0,55 Seating Plane 2,00 0,05 0,10 PINS 6,50 6,50 7,50 8,50 10,50 10,50 12,90 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065 12/01 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C JANUARY 1995 REVISED FEBRUARY 1999 (R-PDSO-G**) PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,65 0,30 0,19 0,10 0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50 Seating Plane 1,20 0,15 0,05 0,10 PINS 3,10 5,10 5,10 6,60 7,90 9,80 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153 POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. 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