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MC74HC132A identical pinout LS132. device inputs compatible with stand


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MC74HC132A Quad 2-Input NAND Gate with Schmitt-Trigger Inputs
MC74HC132A identical pinout LS132. device inputs compatible with standard CMOS outputs; with pull-up resistors, they compatible with LSTTL outputs. HC132A used enhance noise immunity square slowly changing waveforms.
Output Drive Capability: LSTTL Loads Outputs Directly Interface CMOS, NMOS, Operating Voltage Range: Input Current: High Noise Immunity Characteristic CMOS Devices Compliance with Requirements Defined JEDEC Standard Chip Complexity: FETs Equivalent Gates Pb-Free Packages Available*
PDIP-14 SUFFIX CASE
MC74HC132AN AWLYYWW
SOIC-14 SUFFIX CASE 751A TSSOP-14 SUFFIX CASE 948G 132A ALYW Assembly Location Wafer Year Work Week HC132A AWLYWW
FUNCTION TABLE
Inputs Output
Figure Assignment
ORDERING INFORMATION
detailed ordering shipping information package dimensions section page this data sheet.
*For additional information Pb-Free strategy soldering details, please download Semiconductor Soldering Mounting Techniques Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
January, 2005 Rev.
Publication Order Number: MC74HC132A/D
MC74HC132A
Figure Logic Diagram
ORDERING INFORMATION
Device Order mber Number MC74HC132AN MC74HC132ANG MC74HC132AD MC74HC132ADG MC74HC132ADR2 MC74HC132ADR2G MC74HC132ADT MC74HC132ADTR2 Package PDIP-14 PDIP-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) TSSOP-14* TSSOP-14* Shipping 2000 Units 2000 Units Units Rail Units Rail 2500 Tape Reel 2500 Tape Reel Units Rail 2500 Tape Reel
information tape reel specifications, including part orientation tape sizes, please refer Tape Reel Packaging Specifications Brochure, BRD8011/D. *This package inherently Pb-Free.
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MC74HC132A
MAXIMUM RATINGS
Symbol VOUT IOUT IGND TSTG Positive Supply Voltage Digital Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current, Supply Current, Pins Ground Current Ground Storage Temperature Range Lead Temperature, from Case Seconds Junction Temperature Under Bias Thermal Resistance 14-PDIP 14-SOIC 14-TSSOP PDIP SOIC TSSOP Output 3-State High State Parameter Value *0.5 )7.0 *0.5 )7.0 *0.5 )7.0 *0.5 )0.5 )150 )150 Level Oxygen Index: Human Body Model (Note Machine Model (Note Charged Device Model (Note Above Below 85_C (Note 0.125 u2000 u100 u500 $300 Unit _C/W
Power Dissipation Still 85_C
VESD
Moisture Sensitivity Flammability Rating Withstand Voltage
ILatch-Up
Latch-Up Performance
Maximum ratings those values beyond which device damage occur. Maximum ratings applied device individual stress limit values (not normal operating conditions) valid simultaneously. these limits exceeded, device functional operation implied, damage occur reliability affected. Tested EIA/JESD22-A114-A. Tested EIA/JESD22-A115-A. Tested JESD22-C101-A. Tested EIA/JESD78. high frequency heavy load considerations, Chapter 2the Semiconductor High-Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Supply Voltage (Referenced GND) Unit
VIN, VOUT Input Voltage, Output Voltage (Referenced GND) Operating Temperature, Package Types Input Rise Fall Time (Figure )125 Limit (Note When VCC, quiescent current. Unused inputs left open. inputs must tied high-logic voltage level low-logic input voltage level.
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MC74HC132A
ELECTRICAL CHARACTERISTICS (Voltages Referenced GND)
Symbol VT+max Parameter Maximum Positive-Going Input Threshold Voltage (Figure Minimum Positive-Going Input Threshold Voltage (Figure Test Conditions VOUT |IOUT| VOUT |IOUT| Guaranteed Limit *55_C 25_C 3.15 v85_C 3.15 v125_C 3.15 Unit
VT+min 0.95 2.25 2.95 0.95 2.05 2.65 0.95 2.25 2.95 0.95 2.05 2.65 VT-max Maximum Negative-Going Input Threshold Voltage (Figure Minimum Negative-Going Input Threshold Voltage (Figure Maximum Hysteresis Voltage (Figure Minimum Hysteresis Voltage (Figure VOUT |IOUT| VOUT |IOUT| VT-min VHmax (Note VOUT |IOUT| VOUT |IOUT| 2.25 2.25 2.25 VHmin (Note Minimum High-Level Output Voltage VT-min VT+max |IOUT| -VT-min VT+max |IOUT| |IOUT| 3.98 5.48 3.84 5.34 Maximum Low-Level Output Voltage VT+max |IOUT| VT+max |IOUT| |IOUT| 0.26 0.26 0.33 0.33 Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) $0.1 $1.0 $1.0 IOUT VHmin (VT+min) (VT-max); VHmax (VT+max) (VT-min). Information typical parametric values found Semiconductor High-Speed CMOS Data Book (DL129/D).
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MC74HC132A
ELECTRICAL CHARACTERISTICS Input
Symbol tPLH, tPHL tTLH, tTHL Parameter Maximum Propagation Delay, Input Output (Figures Maximum Output Transition Time, Output (Figures Maximum Input Capacitance Guaranteed Limit *55_C 25_C v85_C v125_C Unit
propagation delays with loads other than information typical parametric values, Semiconductor High-Speed CMOS Data Book (DL129/D). Typical 25°C,
Power Dissipation Capacitance (per Gate) (Note
Used determine no-load dynamic power consumption: Semiconductor High-Speed CMOS Data Book (DL129/D).
load considerations,
TEST POINT INPUT tTHL tPHL tTLH *Includes probe capacitance tPLH DEVICE UNDER TEST OUTPUT
Figure Switching Waveforms
Figure Test Circuit
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MC74HC132A
TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS)
VHtyp
VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp typ) typ)
Figure Typical Input Threshold, VT+, Versus Power Supply Voltage
VOUT
VOUT
SCHMITT TRIGGER SQUARES INPUTS WITH SLOW RISE FALL TIMES
VOUT SCHMITT TRIGGER OFFERS MAXIMUM NOISE IMMUNITY
Figure Typical Schmitt-Trigger Applications
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MC74HC132A
PACKAGE DIMENSIONS
PDIP-14 SUFFIX CASE 646-06 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 0.015 0.039 MILLIMETERS 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 0.38 1.01
SEATING PLANE
0.13 (0.005)
SOIC-14 SUFFIX CASE 751A-03 ISSUE
0.25 (0.010)
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 0.19 0.25 0.10 0.25 5.80 6.20 0.25 0.50 INCHES 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.228 0.244 0.010 0.019
SEATING PLANE
0.25 (0.010)
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MC74HC132A
TSSOP-14 SUFFIX CASE 948G-01 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS 4.90 5.10 4.30 4.50 1.20 0.05 0.15 0.50 0.75 0.65 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 INCHES 0.193 0.200 0.169 0.177 0.047 0.002 0.006 0.020 0.030 0.026 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252
0.10 (0.004) 0.15 (0.006)
0.25 (0.010)
IDENT.
DETAIL
0.15 (0.006)
0.10 (0.004) SEATING
PLANE
DETAIL
Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer. This literature subject applicable copyright laws resale manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center Semiconductor P.O. 61312, Phoenix, Arizona 85082-1312 Phone: 480-829-7710 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder additional information, please contact your local Sales Representative.
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SECTION
MC74HC132A/D

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