Dual Temperature-Controlled Variable Resistor linear taper, tempe
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DS1847
Dual Temperature-Controlled Variable Resistor
linear taper, temperature-controlled variable resistors DS1847-050 50kW, position 10kW, position DS1847-010 10kW, position Resistor settings changeable every Access temperature data device control 2-wire interface Operates from supplies Packaging: 14-pin TSSOP, 16-ball CSBGA Operating temperature: Programming temperature:
ASSIGNMENT
14-Pin TSSOP (173-mil)
View
16-Ball CSBGA (4mm 4mm)
DESCRIPTION
DS1847 Dual Temperature-Controlled Nonvolatile (NV) Variable Resistor consists 256position linear, variable resistors. DS1847-050 consists 10kW 50kW, while DS1847-010 consists 10kW resistors; both incorporate direct-to-digital temperature sensor. device provides ideal method setting temperature-compensating bias voltages currents control applications using minimum circuitry. variable resistors settings stored EEPROM memory accessed over industry standard 2-wire serial bus. value each variable resistor determined temperature-addressed look-up table, which assign unique value each resistor every increment over -40°C +95°C range. output digital temperature sensor also available 13-bit, complement value over serial bus. interface pins consist SCL.
011806
DS1847
DESCRIPTIONS
Name TSSOP Description Power Supply Terminal. DS1847 will support supply voltages ranging from +3.0V +5.5V. Ground Terminal. 2-Wire Serial Data Interface. serial data serial data transfer from DS1847. open drain wire-ORed with other open drain open collector interfaces. 2-Wire Serial Clock Input. serial clock input used clock data into DS1847 rising edges clock data falling edges. Write Protect Input. open logic memory, control registers, Look-up tables write protected. logic device write protected written pulled high internally. Address Input. Pins used specify address each DS1847 when used multi-dropped configuration. Address Input. Address Input. High terminal Resistor both resistors, required that high terminal connected potential greater than terminal. Voltage applied high terminal each resistor cannot exceed VCC, below ground. High terminal Resistor terminal Resistor both resistors, required that terminal connected potential less than high terminal. Voltage applied terminal each resistor cannot exceed VCC, below ground. terminal Resistor Connect. Connect. Connect. Connect.
DS1847
DS1847 BLOCK DIAGRAM Figure
2-Wire Interface
72x8 EEPROM Resistor Look-up Table (Table 72x8 EEPROM Resistor Look-up Table (Table
Table Select Byte Configuration Byte Temperature Byte Temperature Byte Address Pointer User Memory Internal Address Select User Memory Resistor Setting Resistor setting User Memory
Position DigitallyControlled 10kW 50kW Resistor Position DigitallyControlled 10kW Resistor
Digital Temperature Sensor
E5hE6h E8hEFh F2hFFh
DS1847
Memory Location (Table Select Byte, E0h, must access Look-Up Tables)
Name Location User Defined Look-Up Table (LUT)
Function Location This block contains user defined temperature settings resistors. Values between written either table position variable resistors. first address location, 00h, used resistor -40°C. Each successive memory location will contain resistor setting previous temperature +2°C. example, memory address address that will resistor -38°C environment. default memory settings programming look-up table, refer Programming Look-Up Table (LUT) section datasheet. Writing this byte determines which 72x8 EEPROM look-up tables selected reading writing. (Look-Up Table selected) (Look-Up Table selected)
Table Select Byte
Configuration Byte Temperature/Address Update Temperature Update Enable Address Update Enable Default setting 03h, becomes after temperature address update occurred result temperature conversion. user write this check transition from order verify that conversion occurred. temperature conversion feature disabled. user sets resistor "manual mode" writing addresses control resistors respectively. With user operate test mode. Address updates made from temperature sensor will cease. user load memory location into verify that values locations expected user-defined values.
DS1847
Memory Location
Name Location Temperature
Function Location This byte contains 13-bit complement temperature output from temperature sensor. This byte contains 13-bit complement temperature output from temperature sensor. example temperature readings, refer Table Calculated, current resistor address 47h). user-defined resistor setting this location respective look-up table will loaded into resistors. General purpose user memory (SRAM) Internal external device address select. This byte allows user external address pins internal register location determine device address.
Temperature
Address Pointer
User Memory Address Select
external grounded, device will internal address bits (A2, this register external setting, device will external address pins Default setting 01h. device uses external pins determine address. General purpose user memory (SRAM) user-controlled setting mode, this block contains resistor setting. user-controlled setting mode, this block contains resistor setting. General purpose user memory (SRAM)
User Memory Resistor Setting Resistor Setting User memory
DS1847
PROGRAMMING LOOK-UP TABLE (LUT)
following equation used determine which resistor position setting, FFh, should written achieve given resistance specific temperature.
DS1847-050 3.78964 50kW resistor 19.74866 10kW resistor DS1847-010 8.394533 both 10kW resistors resistance desired output terminal temperature degrees Celsius calibration constants programmed into each corresponding look-up tables. Their addresses values given Table Resistor variables found Look-Up Table EEPROM, Resistor variables found Look-Up Table After these values read, they should overwritten with appropriate temperature-specific resistance settings.
LOOK-UP VARIABLE ADDRESSES Table
Address (HEX) Variable 10-6 10-9 10-7 10-10
When shipped from factory, other memory locations LUTs programmed (except bytes 00h-07h Table which factory programmed values other than FFh). Note: Memory locations 47h, which cover temperature range outside specified operating temperature range However, values stored these locations will valid resistance settings temperature exceeds Therefore, Dallas Semiconductor recommends that user programs resistance value into locations. Failure will result part being default value.
DS1847
TEMPERATURE CONVERSION
direct-to-digital temperature sensor measures temperature through on-chip temperature measurement technique with operating range from -40°C +95°C. Temperature conversions initiated upon power-up, most recent result stored address locations E3h, which updated every 10ms. Temperature conversion will occur during active read write memory. value each resistor determined temperature-addressed look-up table that assigns unique value each resistor every increment with hysteresis temperature transition over operating temperature range. This seen Figure
TEMPERATURE CONVERSION HYSTERESIS Figure
MEMORY LOCATION Increasing temp Decreasing temp
TEMPERATURE
EXAMPLE TEMPERATURE READINGS Table
TEMP BINARY DATA 0010 1111 1000 0000 0000 1100 1000 1000 1111 1010 1111 0000 1110 1100 0000 0000 DATA 2F80h 0C88h FAF0h EC00h
DS1847
2-WIRE OPERATION
Clock Data Transitions: normally pulled high with external resistor device. Data only change during time periods. Data changes during high periods will indicate start stop conditions depending conditions discussed below. Refer timing diagram (Figure further details. Start Condition: high-to-low transition with high start condition that must precede other command. Refer timing diagram (Figure further details. Stop Condition: low-to-high transition with high stop condition. After read sequence, stop command places DS1847 into low-power mode. Refer timing diagram (Figure further details. Acknowledge Bit: address data byte transmitted serial protocol. DS1847 pulls line during ninth clock pulse acknowledge that received each word. Standby Mode: DS1847 features low-power mode that automatically enabled after power-on, after stop command, after completion internal operations. 2-Wire Interface Reset: After interruption protocol, power loss, system reset, following steps reset DS1847: Clock nine cycles. Look high each cycle while high. Create START condition while high. Device Addressing: DS1847 must receive 8-bit device address word following START condition enable specific device read write operation. address word clocked into DS1847 LSB. address word consists (1010) followed then (READ/WRITE) bit. high, read operation initiated. low, write operation initiated. device become active, values must same hard-wired address pins DS1847. Upon match written hard-wired addresses, DS1847 will output zero clock cycle acknowledge. address does match, DS1847 returns low-power mode. Write Operations: After receiving matching address byte with low, device goes into write mode operation. master must transmit 8-bit EEPROM memory address device define address where data written. After this byte been received, DS1847 will transmit zero clock cycle acknowledge receipt address. master must then transmit 8-bit data word written into this address. DS1847 will again transmit zero clock cycle acknowledge receipt data. this point, master must terminate write operation with STOP condition. DS1847 then enters internally timed write process EEPROM memory. inputs disabled during this byte write cycle. DS1847 capable 8-byte page write. page write initiated same byte write, master does send STOP condition after first byte. Instead, after slave acknowledges receipt data byte, master send seven more bytes using same nine-clock sequence.
DS1847
master must terminate write cycle with STOP condition data clocked into DS1847 will latched into permanent memory. Acknowledge Polling: Once internally-timed write started DS1847 inputs disabled, acknowledge polling initiated. process involves transmitting START condition followed device address. signifies type operation that desired. read write sequence will only allowed proceed internal write cycle completed DS1847 responds with zero. Read Operations: After receiving matching address byte with high, device goes into read mode operation. There three read operations: current address read, random read, sequential address read.
CURRENT ADDRESS READ
DS1847 internal address register that maintains address used during last read write operation, incremented one. This data maintained long valid. most recent address last byte memory, then register resets first address. This address stays valid between operations long power available. Once device address clocked acknowledged DS1847 with high, current address data word clocked out. master does respond with zero, does generate STOP condition afterwards.
RANDOM READ
random read requires dummy byte write sequence load data word address. Once device data address bytes clocked master acknowledged DS1847, master must generate another START condition. master initiates current address read sending device address with read/write high. DS1847 will acknowledge device address serially clocks data byte.
SEQUENTIAL ADDRESS READ
Sequential reads initiated either current address read random address read. After master receives first data byte, master responds with acknowledge. long DS1847 receives this acknowledge after byte read, master clock additional data words from DS1847. After reaching address FFh, resets address 00h. sequential read operation terminated when master initiates stop condition. master does respond with zero. more detailed description 2-wire theory operation, refer next section.
DS1847
2-WIRE SERIAL PORT OPERATION
2-wire serial port interface supports bi-directional data transmission protocol with device addressing. device that sends data defined transmitter, device receiving data receiver. device that controls message called "master." devices that controlled master "slaves." must controlled master device that generates serial clock (SCL), controls access, generates START STOP conditions. DS1847 operates slave 2-wire bus. Connections made open-drain lines SCL. following terminals control 2-wire serial port: SDA, SCL, Timing diagrams 2-wire serial port found Figures Timing information 2-wire serial port provided Electrical Characteristics Table 2-wire serial communications. following protocol been defined: Data transfer initiated only when busy. During data transfer, data line must remain stable whenever clock line HIGH. Changes data line while clock line HIGH will interpreted control signals.
Accordingly, following conditions have been defined: busy: Both data clock lines remain HIGH. Start data transfer: change state data line from HIGH while clock HIGH defines START condition. Stop data transfer: change state data line from HIGH while clock line HIGH defines STOP condition. Data valid: state data line represents valid data when, after START condition, data line stable duration HIGH period clock signal. data line changed during period clock signal. There clock pulse data. Figures detail data transfer accomplished 2-wire bus. Depending upon state bit, types data transfer possible. Each data transfer initiated with START condition terminated with STOP condition. number data bytes transferred between START STOP conditions limited determined master device. information transferred byte-wise each receiver acknowledges with ninth bit. Within specifications regular mode (100kHz clock rate) fast mode (400kHz clock rate) defined. DS1847 works both modes. Acknowledge: Each receiving device, when addressed, obliged generate acknowledge after reception each byte. master device must generate extra clock pulse that associated with this acknowledge bit. device that acknowledges must pull down line during acknowledge clock pulse such that line stable during HIGH period acknowledge-related clock pulse. course, setup hold times must taken into account. master must signal data
DS1847
slave generating acknowledge last byte that been clocked slave. this case, slave must leave data line HIGH enable master generate STOP condition. Data transfer from master transmitter slave receiver. first byte transmitted master command/control byte. Next follows number data bytes. slave returns acknowledge after each received byte. Data transfer from slave transmitter master receiver. master transmits first byte (the command/control byte) slave. slave then returns acknowledge bit. Next, follows number data bytes transmitted slave master. master returns acknowledge after received bytes other than last byte. last received byte, `not acknowledge' returned. master device generates serial clock pulses START STOP conditions. transfer ended with STOP condition with repeated START condition. Since repeated START condition also beginning next serial transfer, will released. DS1847 operate following modes: Slave receiver mode: Serial data clock received through SCL, respectively. After each byte received, acknowledge transmitted. START STOP conditions recognized beginning serial transfer. Address recognition performed hardware after reception slave (device) address direction bit. Slave transmitter mode: first byte received handled slave receiver mode. However, this mode direction will indicate that transfer direction reversed. Serial data transmitted DS1847, while serial clock input SCL. START STOP conditions recognized beginning serial transfer. Slave Address: Command/control byte first byte received following START condition from master device. command/control byte consists 4-bit control code. DS1847, this 1010 binary read/write operations. next bits command/ control byte device select bits slave address (A2, A0). They used master device select which eight devices accessed. When reading writing DS1847, device-select bits must match device-select pins (A2, A0). last command/control byte (R/W) defines operation performed. When read operation selected, when write operation selected. Following START condition, DS1847 monitors checking device type identifier being transmitted. Upon receiving 1010 control code, appropriate device address bits, read/write bit, slave device outputs acknowledge signal line.
WRITE PROTECT
write-protect input (WP) protects memory (including EEPROM), control registers, lookup tables from alteration application. However, this does interfere with internal temperature/resistor updates. logic device write protected written 2-wire interface. This internal pull-up resistor.
DS1847
2-WIRE DATA TRANSFER PROTOCOL Figure
2-WIRE CHARACTERISTICS Figure
DS1847
ABSOLUTE MAXIMUM RATINGS*
Voltage Relative Ground Operating Temperature Programming Temperature Storage Temperature Soldering Temperature -0.3V +6.0V -40°C +95°C +70°C -55°C +125°C J-STD-020A specification
This stress rating only functional operation device these other conditions above those indicated operation sections this specification implied. Exposure absolute maximum rating conditions extended periods time affect reliability.
RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Voltage Resistor Inputs Resistor Current SYMBOL IRESISTOR DS1847-050 DS1847-010 CONDITION +3.0
GND-0.3
(-40°C +95°C)
VCC+0.3
UNITS
NOTES
ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Current Input Leakage (digital inputs) Input Leakage (H0, Input Logic Input Logic Input Current each Level Output Voltage (SDA) Capacitance Internal Pull Resistance,
(-40°C +95°C; 3.0V 5.5V)
-100 0.7VCC GND-0.3
SYMBOL
CONDITION
+100 VCC+0.3 0.3VCC
UNITS
NOTES
0.4<VI/O<0.9VCC
VOL1 VOL2 CI/O
sink current sink current
DS1847
ANALOG RESISTOR CHARACTERISTICS (-40°C +95°C; 3.0V 5.5V)
PARAMETER Absolute Error Position Resistance DS1847-050 DS1847-050 DS1847-010 Position Resistance DS1847-050 DS1847-050 DS1847-010 Absolute Linearity Relative Linearity Compensated Tempco Error Uncompensated Tempco
using calibration values
SYMBOL
CONDITION
using cal. values
44.6
67.0 13.6 12.0 1200 1200
UNITS NOTES
(50k resistor) (10k resistor) (10k resistor) (50k resistor) (10k resistor) (10k resistor)
55.8 11.3 10.0
ppm/°C
DIGITAL THERMOMETER
PARAMETER Thermometer Error Conversion Time SYMBOL TERR tCONVT CONDITION -40°C 95°C 12-bit conversion ±3.0 UNITS NOTES
DS1847
ELECTRICAL CHARACTERISTICS
PARAMETER clock frequency free time between STOP START Hold time (repeated) START condition period clock High period clock Data hold time Data set-up time Start set-up time Rise time both signals Fall time both signals Set-up time STOP condition Capacitive load each line EEPROM write time SYMBOL fSCL tBUF HD:STA tLOW tHIGH tHD:DAT tSU:DAT tSU:STA tSU:STO CONDITION Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode Fast Mode Standard Mode
(-40°C +95°C, 3.0V 5.5V)
20+0.1CB 20+0.1CB
UNITS
NOTES
1000
NONVOLATILE MEMORY CHARACTERISTICS
PARAMETER Writes SYMBOL CONDITION 85°C 50,000 UNITS
DS1847
NOTES:
voltages referenced ground. Inputs VCC. must tied GND. Valid 25°C only. Absolute linearity difference measured value from expected value position. Expected value straight line from measured minimum position measured maximum position. Relative linearity deviation setting change expected change. Expected change slope straight line from measured minimum position measured maximum position. fast mode device used standard mode system, requirement tSU:DAT 250ns must then met. This will automatically case device does stretch period signal. such device does stretch period signal, must output next data line tRMAX tSU:DAT 1000ns 250ns 1250ns before line released. After this period, first clock pulse generated. maximum tHD:DAT only device does stretch period (tLOW) signal. device must internally provide hold time least 300ns signal (referred VIHMIN signal) order bridge undefined region falling edge SCL. total capacitance line picofarads, timing referenced 0.9VCC 0.1VCC. EEPROM write begins after STOP condition occurs. temperature coefficient varies with resistor position from 650ppm/°C position 1000ppm/°C (for resistor), 1500ppm/°C (for resistor). graphs below. tempco significantly reduced using resistor calibration values. When doing average tempco over entire temperature range between 200ppm°/C (for lower positions) 10ppm/°C (higher positions). Refer Programming Look-Up Table section data sheet. pins fast mode devices must obstruct lines switched off. Refer Programming Look-Up Table section data sheet calibration. Address input passes Latch-up JEDEC class other pins pass class
TEMPCO RESISTANCE RESISTOR
1500 1400 1300 1200 PPM/°C PPM/°C 1100 1000 2000 4000 6000 8000 RESISTANCE (OHMS) 10000 10000 20000 30000 40000 50000 RESISTANCE (OHMS) 1000 1100
TEMPCO RESISTANCE RESISTOR
ORDERING INFORMATION
DS1847
ORDERING NUMBER DS1847E-010 DS1847E-050 DS1847E-010/T&R DS1847E-050/T&R DS1847B-010 DS1847B-050 DS1847B-010+ DS1847B-010+T&R DS1847B-010/T&R DS1847B-050+ DS1847B-050+T&R DS1847B-050/T&R DS1847E-010+ DS1847E-010+T&R DS1847E-050+ DS1847E-050+T&R
Denotes lead-free package.
PACKAGE 14-PIN TSSOP (173-MIL) 14-PIN TSSOP (173-MIL) 14-PIN TSSOP/TAPE REEL 14-PIN TSSOP/TAPE REEL 16-BALL CSBGA 16-BALL CSBGA 16-BALL CSBGA 16-BALL CSBGA 16-BALL CSBGA 16-BALL CSBGA 16-BALL CSBGA 16-BALL CSBGA 14-PIN TSSOP (173-MIL) 14-PIN TSSOP 14-PIN TSSOP (173-MIL) 14-PIN TSSOP
OPERATING TEMPERATURE
VERSION Resistor /Resistor 10kW/10kW 50kW/10kW 10kW/10kW 50kW/10kW 10kW/10kW 50kW/10kW 10kW/10kW 10kW/10kW 10kW/10kW 50kW/10kW 50kW/10kW 50kW/10kW 10kW/10kW 10kW/10kW 50kW/10kW 50kW/10kW
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