September 2000 Revised June 2005 74LCXZ162244 Voltage 16-Bit Buff

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September 2000 Revised June 2005 74LCXZ162244 Voltage 16-Bit Buff

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74LCXZ162244 Voltage 16-Bit Buffer/Line Driver with Tolerant Inputs/Outputs Series Resistors Outputs
September 2000 Revised June 2005
74LCXZ162244 Voltage 16-Bit Buffer/Line Driver with Tolerant Inputs/Outputs Series Resistors Outputs
LCXZ162244 contains sixteen non-inverting buffers with 3-STATE outputs designed employed memory address driver, clock driver, oriented transmitter/receiver. device nibble controlled. Each nibble separate 3-STATE control inputs which shorted together full 16-bit operation. When between 1.5V, LCXZ162244 high impedance state during power power down. this places outputs high impedance state preventing intermittent impedance loading glitching oriented applications. LCXZ162244 designed voltage (2.7V 3.3V) applications with capability interfacing signal environment. addition outputs include (nominal) series resistors reduce overshoot undershoot designed sink/source 3.0V. LCXZ162244 fabricated with advanced CMOS technology achieve high speed operation while maintaining CMOS power dissipation.
Features
tolerant inputs outputs Guaranteed power up/down high impedance Supports live insertion/withdrawal Outputs have equivalent series resistors 2.7V-3.6V specifications provided (VCC
3.0V), 3.0V)
output drive (VCC
Implements patented noise/EMI reduction circuitry Latch-up performance exceeds performance:
Human body model 2000V Machine model 200V
Ordering Code:
Order Number 74LCXZ162244MEA 74LCXZ162244MEX (Note 74LCXZ162244MTD 74LCXZ162244MTX (Note Package Number MS48A MS48A MTD48 MTD48 Package Description 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [TUBES] 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [TAPE REEL] 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TUBES] 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TAPE REEL]
Note this Order Number receive devices Tape Reel.
2005 Fairchild Semiconductor Corporation
DS500251
www.fairchildsemi.com
74LCXZ162244
Connection Diagram
Logic Symbol
Descriptions
Names I0-I15 O0-O15 Description Output Enable Input (Active LOW) Inputs Outputs
Truth Tables
Inputs I0-I3 Outputs O0-O3 Inputs I8-I11 Outputs O8-O11
Inputs
HIGH Voltage Level Voltage Level Immaterial High Impedance
Outputs I4-I7 O4-O7
Inputs I12-I15
Outputs O12-O15
Functional Description
LCXZ162244 contains sixteen non-inverting buffers with 3-STATE standard outputs. device nibble bits) controlled with each nibble functioning identically, independent other. control pins shorted together obtain full 16-bit operation. 3-STATE outputs controlled Output Enable (OEn) input each nibble. When LOW, outputs 2-state mode. When HIGH, outputs high impedance mode, this does interfere with entering data into inputs.
Logic Diagram
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74LCXZ162244
Absolute Maximum Ratings(Note
Symbol IGND TSTG Parameter Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply Current Supply Ground Current Ground Storage Temperature Value Conditions Units Output 3-STATE 0-1.5V Output HIGH State (Note
r100 r100
Recommended Operating Conditions (Note
Symbol IOH/IOL Supply Voltage Input Voltage Output Voltage Output Current Free-Air Operating Temperature Input Edge Rate, 0.8V-2.0V, 3.0V HIGH State 3-STATE 3.0V 3.6V 2.7V 3.0V Parameter Operating Units
ns/V
't/'V
Note Absolute Maximum Ratings those values beyond which safety device cannot guaranteed. device should operated these limits. parametric values defined Electrical Characteristics tables guaranteed Absolute Maximum Ratings. "Recommended Operating Conditions" table will define conditions actual device operation. Note Absolute Maximum Rating must observed. Note Unused inputs must held HIGH LOW. They float.
Electrical Characteristics
Symbol Parameter HIGH Level Input Voltage Level Input Voltage HIGH Level Output Voltage Level Output Voltage IOFF IPU/PD Input Leakage Current 3-STATE Output Leakage Power-Off Leakage Current Power Up/Down 3-STATE Output Current Quiescent Supply Current Increase Input Conditions
40qC 85qC
Units
0.55
5.5V 5.5V 5.5V 0.5V 0.6V
r5.0 r5.0
r5.0
3.6V 5.5V (Note
r225
'ICC
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74LCXZ162244
Electrical Characteristics
Note Outputs disabled 3-STATE only.
(Continued)
Electrical Characteristics
Symbol Parameter tPHL tPLH tPZL tPZH tPLZ tPHZ tOSHL tOSLH Output Output Skew (Note Output Disable Time Propagation Delay Data Output Output Enable Time
40qC 85qC,
2.7V Units
3.3V 0.3V
Note Skew defined absolute value difference between actual propagation delay separate outputs same device. specification applies outputs switching same direction, either HIGH-to-LOW (tOSHL) LOW-to-HIGH (tOSLH). Parameter guaranteed design.
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak Quiet Output Dynamic Valley Conditions 3.3V, 3.3V, 25qC Units Typical
Capacitance
Symbol COUT Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter Open, 3.3V, 3.3V, Conditions VCC, Typical Units
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74LCXZ162244
LOADING WAVEFORMS Generic Family
FIGURE Test Circuit includes probe capacitance) 3.3V, 2.7V 2.5V
Waveform Inverting Non-Inverting Functions
3-STATE Output High Enable Disable Times Logic
Propagation Delay. Pulse Width trec Waveforms
Setup Time, Hold Time Recovery Time Logic
3-STATE Output Enable Disable Times Logic FIGURE Waveforms (Input Characteristics; =1MHz, 3ns) Symbol 3.3V 0.3V 1.5V 1.5V 0.3V 0.3V 1.5V 1.5V 0.3V 0.3V 2.7V
trise tfall
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74LCXZ162244
Schematic Diagram Generic Family
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74LCXZ162244
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A
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74LCXZ162244 Voltage 16-Bit Buffer/Line Driver with Tolerant Inputs/Outputs Series Resistors Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48
Fairchild does assume responsibility circuitry described, circuit patent licenses implied Fairchild reserves right time without notice change said circuitry specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT FAIRCHILD SEMICONDUCTOR CORPORATION. used herein: Life support devices systems devices systems which, intended surgical implant into body, support sustain life, whose failure perform when properly used accordance with instructions provided labeling, reasonably expected result significant injury user. www.fairchildsemi.com critical component component life support device system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness. www.fairchildsemi.com

September 2000 Revised June 2005 74LCXZ162244 Voltage 16-Bit Buff

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