Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idl

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Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idl

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High-performance, Low-power secureAVR Enhanced RISC Architecture
Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idle Power-down Modes Bond Locations Conforming 7816-2 Protection 6000V Operating Range: from 1.62V 5.5V Compliant with GSM, 3GPP 2000 Specifications; Industry Compatible Available Wafers, Modules Industry-standard Packages
Memory
144K Bytes Flash Program Memory 144K Bytes EEPROM, Including Bytes 384-byte Bit-addressable Bytes
128-byte Program/Erase 1.25 Program, 1.25 Erase Typically More than 500,000 Write/Erase Cycles Temperature 25°C Years Data Retention EEPROM Erase Only Mode Write EEPROM With Without Autoerase Bytes Bytes dedicated Atmel's crypto-library
Secure Microcontroller Smart Cards AT90SC 144144CT Summary
Peripherals
Ports
Configurable Support Communication Protocols Including 7816-3 2wire Protocol 7816 Controller compliant with protocols kbps Serial Peripheral Interface (SPI) Controller MHz) Programmable Internal Oscillator 40MHz Cryptographic Accelerator 16-bit Timers Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller 32-bit AdvXCryptographic Accelerator Public Operations RSA, DSA, GF(2n), Diffie-Hellman,. Cryptographic Library Hardware Triple DPA, DEMA Resistant Checksum Accelerator 16/32 Engine (Compliant with ISO/IEC 3309)
Security
Dedicated Hardware Protection Against SPA/DPA/SEMA/DEMA Attacks Advanced Protection Against Physical Attack including Active Shield Environmental Protection Systems Voltage Monitor, Frequency Monitor, Light Protection, Temperature monitor Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
Voyager Emulation Platform (ATV4 Advanced) Support Software Development Systems EWAVR® Debugger Atmel's Studio Version 4.07 Above Software Libraries Application Notes
6521AS-SMIC-05
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Description
AT90SC144144CT low-power, high-performance, 8/16-bit microcontroller with Flash program memory, EEPROM data memory, based secureAVR enhanced RISC architecture. executing powerful instructions single clock cycle, AT90SC144144CT achieves throughputs close MIPS MHz. Harvard architecture includes generalpurpose working registers directly connected ALU, allowing independent registers accessed single instruction executed clock cycle. ability EEPROM code space allows parts program memory reprogrammed in-system. This technology combined with versatile 8/16-bit monolithic chip provides highly flexible cost-effective solution many smart card applications. AT90SC144144CT benefits from advanced EEPROM functions Mode). cryptographic accelerator, featured AT90SC144144CT AdvX®. based 32-bit multiplier-accumulator architecture which designed perform fast encryption authentication functions. This enables fast computation low-power operation. controlling firmware located either dedicated memory (Atmel's crypto-library supports standard finite fields arithmetic functions including RSA, DSA, ECC) Flash program memory (customer specific). Additional security features include power environment protection logic, logical scrambling program data addresses, Power Analysis countermeasures memory accesses controlled supervisor mode.
block diagram AT90SC144144CT shown Figure Figure AT90SC144144CT secureAVR Enhanced RISC Architecture.
EEPROM User Memory Crypto Library Flash Program Memory Instruction Register Access Control
Data 8-bit
Secure Control
General Purpose Registers
Data Memory Interrupt Unit 7816 Controller
Reset Circuit
Port Instruction Decoder Control Lines Status Register Access Control Controller Port
IN/OUT0
IN/OUT1
MOSI MISO
DES/Triple Advx CryptoAccelerator
Checksum Accelerator On-Chip Security Timers
AT90SC144144CT
6521AS-SMIC-05
AT90SC144144CT
6521AS-SMIC-05
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6521AS-SMIC-05

Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idl

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