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SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
Members Texas Instruments Widebus Family EPIC (Enhanced-Performance Implanted CMOS) Process Operating Range 5.5-V 3-State Outputs Drive Lines Directly Distributed Pins Minimize High-Speed Switching Noise Flow-Through Architecture Optimizes Layout Latch-Up Performance Exceeds JESD Protection Exceeds 2000 MIL-STD-883, Method 3015; Exceeds Using Machine Model Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
SN54AHC16374 PACKAGE SN74AHC16374 DGG, DGV, PACKAGE (TOP VIEW)
description
'AHC16374 devices 16-bit edge-triggered D-type flip-flops with 3-state outputs designed specifically driving highly capacitive relatively low-impedance loads. They particularly suitable implementing buffer registers, ports, bidirectional drivers, working registers.
1CLK 2CLK
These devices used 8-bit flip-flops 16-bit flip-flop. positive transition clock (CLK) input, outputs flip-flop take logic levels data inputs. buffered output-enable (OE) input used place eight outputs either normal logic state (high logic levels) high-impedance state. high-impedance state, outputs neither load drive lines significantly. high-impedance state increased drive provide capability drive lines without need interface pullup components. ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined current-sinking capability driver. does affect internal operations flip-flop. data retained data entered while outputs high-impedance state. SN54AHC16374 characterized operation over full military temperature range -55°C 125°C. SN74AHC16374 characterized operation from -40°C 85°C.
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UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303
Copyright 2000, Texas Instruments Incorporated
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SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
FUNCTION TABLE (each 8-bit flip-flop) INPUTS OUTPUT
logic symbol
1CLK 2CLK
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12.
logic diagram (positive logic)
1CLK 2CLK
Seven Other Channels
Seven Other Channels
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SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, Output clamp current, VCC) Continuous output current, VCC) Continuous current through each Package thermal impedance, (see Note package 70°C/W package 58°C/W package 63°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD
recommended operating conditions (see Note
SN54AHC16374 Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current 3.85 1.65 SN74AHC16374 3.85 1.65 UNIT
ns/V
Input transition rise fall rate
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
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SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.58 3.94 0.36 0.36 ±0.1 ±0.25 25°C SN54AHC16374 2.48 ±2.5 SN74AHC16374 2.48 0.44 0.44 ±2.5 UNIT
products compliant MIL-PRF-38535, this parameter production tested
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time, data before Hold time, data after SN54AHC16374 SN74AHC16374 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time, data before Hold time, data after SN54AHC16374 SN74AHC16374 UNIT
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
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SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPZH tPZL tPHZ tPLZ tsk(o) FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 25°C 130* 10.6 10.6 10.2 11.8 16.2 16.2 14.9 14.9 15.5 15.5 1.5** SN54AHC16374 18.5 18.5 SN74AHC16374 18.5 18.5 UNIT
products compliant MIL-PRF-38535, this parameter production tested. products compliant MIL-PRF-38535, this parameter does apply.
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPZH tPZL tPHZ tPLZ tsk(o) FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 130* 25°C 185* 5.4* 5.4* 5.1* 5.1* 9.1* 9.1* 9.1* 9.1* 9.5* 9.5* 10.1 10.1 10.1 10.1 10.5 10.5 SN54AHC16374 110* 10.1* 10.1* 10.1* 10.1* 10.5* 10.5* 11.5 11.5 11.5 11.5 11.5 11.5 SN74AHC16374 10.1 10.1 10.1 10.1 10.5 10.5 11.5 11.5 11.5 11.5 11.5 11.5 UNIT
products compliant MIL-PRF-38535, this parameter production tested. products compliant MIL-PRF-38535, this parameter does apply.
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
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SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
noise characteristics, 25°C (see Note
PARAMETER VOL(P) VOL(V) VOH(V) VIH(D) Quiet output, maximum dynamic Quiet output, minimum dynamic Quiet output, minimum dynamic High-level dynamic input voltage SN74AHC16374 0.36 -0.16 -0.8 UNIT
VIL(D) Low-level dynamic input voltage NOTE Characteristics surface-mount packages only.
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS load, UNIT
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SN54AHC16374, SN74AHC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
Open
From Output Under Test (see Note
Test Point
From Output Under Test (see Note
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain
Open
LOAD CIRCUIT TOTEM-POLE OUTPUTS
LOAD CIRCUIT 3-STATE OPEN-DRAIN OUTPUTS Timing Input Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES tPZL tPZH Output Waveform (see Note tPLZ tPHZ
Input
VOLTAGE WAVEFORMS PULSE DURATION
Input tPLH In-Phase Output tPHL Out-of-Phase Output
tPHL
Output Control
tPLH
Output Waveform (see Note
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Feb-2006
PACKAGING INFORMATION
Orderable Device 74AHC16374DGGRE4 74AHC16374DGVRE4 SN74AHC16374DGGR SN74AHC16374DGVR SN74AHC16374DL SN74AHC16374DLG4 SN74AHC16374DLR SN74AHC16374DLRG4
Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type TSSOP TVSOP TSSOP TVSOP SSOP SSOP SSOP SSOP
Package Drawing
Pins Package Plan 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
Lead/Ball Finish NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU
Peak Temp Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
1000 Green (RoHS Sb/Br) 1000 Green (RoHS Sb/Br)
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material)
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
MECHANICAL DATA
MPDS006C FEBRUARY 1996 REVISED AUGUST 2000
(R-PDSO-G**)
PINS SHOWN 0,23 0,13
PLASTIC SMALL-OUTLINE
0,40
0,07
0,16 4,50 4,30 6,60 6,20
Gage Plane
0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,08
PINS
3,70 3,50
3,70 3,50
5,10 4,90
5,10 4,90
7,90 7,70
9,80 9,60
11,40 11,20
4073251/E 08/00 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion, exceed 0,15 side. Falls within JEDEC: 24/48 Pins MO-153 14/16/20/56 Pins MO-194
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MECHANICAL DATA
MSSO001C JANUARY 1995 REVISED DECEMBER 2001
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0.025 (0,635)
0.0135 (0,343) 0.008 (0,203)
0.005 (0,13)
0.010 (0,25) 0.005 (0,13)
0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03)
Gage Plane 0.010 (0,25)
0.040 (1,02) 0.020 (0,51)
Seating Plane 0.110 (2,79) 0.008 (0,20) 0.004 (0,10)
PINS
0.380 (9,65) 0.370 (9,40)
0.630 (16,00) 0.620 (15,75)
0.730 (18,54) 0.720 (18,29) 4040048 12/01
NOTES:
linear dimensions inches (millimeters). This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0.006 (0,15). Falls within JEDEC MO-118
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MECHANICAL DATA
MTSS003D JANUARY 1995 REVISED JANUARY 1998
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,50
0,27 0,17
0,08
6,20 6,00
8,30 7,90
0,15
Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
12,60
14,10
17,10
12,40
13,90
16,90 4040078 12/97
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold protrusion exceed 0,15. Falls within JEDEC MO-153
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