Operation Inputs Accept Voltages 10.5 3-State Inverting Outputs Drive
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SN54AC533, SN74AC533 OCTAL TRANSPARENT TYPE LATCHES WITH STATE OUTPUTS
Operation Inputs Accept Voltages 10.5 3-State Inverting Outputs Drive Lines Directly Full Parallel Access Loading
SN54AC533 PACKAGE SN74AC533 PACKAGE (TOP VIEW)
description/ordering information
'AC533 devices octal transparent D-type latches with 3-state outputs. When latch-enable (LE) input high, outputs follow complements data inputs. When taken low, outputs latched inverse logic levels inputs. buffered output-enable (OE) input used place eight outputs either normal logic state (high logic levels) high-impedance state. high-impedance state, outputs neither load drive lines significantly. high-impedance state increased drive provide capability drive lines without need interface pullup components. does affect internal operations latches. data retained data entered while outputs high-impedance state.
SN54AC533 PACKAGE (TOP VIEW)
ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined current-sinking capability driver. ORDERING INFORMATION
PDIP SOIC 85°C -40°C SSOP TSSOP CDIP 125°C -55°C LCCC PACKAGE Tube Tube Tape reel Tape reel Tape reel Tube Tape reel Tube Tube Tube ORDERABLE PART NUMBER SN74AC533N SN74AC533DW SN74AC533DWR SN74AC533NSR SN74AC533DBR SN74AC533PW SN74AC533PWR SNJ54AC533J SNJ54AC533W SNJ54AC533FK AC533 SNJ54AC533J SNJ54AC533W SNJ54AC533FK AC533 AC533 AC533 TOP-SIDE MARKING SN74AC533N
Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303
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SN54AC533, SN74AC533 OCTAL TRANSPARENT TYPE LATCHES WITH STATE OUTPUTS
FUNCTION TABLE (each latch) INPUTS OUTPUT
logic diagram (positive logic)
Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, VCC) Output clamp current, VCC) Continuous output current, VCC) Continuous current through ±200 Package thermal impedance, (see Note package 70°C/W package 58°C/W package 69°C/W package 60°C/W package 83°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7.
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SN54AC533, SN74AC533 OCTAL TRANSPARENT TYPE LATCHES WITH STATE OUTPUTS
recommended operating conditions (see Note
SN54AC533 Supply voltage Low-level input voltage Input voltage Output voltage Low-level output current Input transition rise fall rate 3.15 3.85 1.35 1.65 SN74AC533 3.15 3.85 1.35 1.65 ns/V UNIT
High-level input voltage
High-level output current
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.56 3.86 4.86 0.36 0.36 0.36 ±0.25 ±0.1 25°C SN54AC533 SN74AC533 2.46 3.76 4.76 0.44 0.44 0.44 ±2.5 UNIT
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
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SN54AC533, SN74AC533 OCTAL TRANSPARENT TYPE LATCHES WITH STATE OUTPUTS
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time, data before Hold time, data after SN54AC533 SN74AC533 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time, data before Hold time, data after SN54AC533 SN74AC533 UNIT
switching characteristics over recommended operating (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) (OUTPUT)
free-air
temperature
SN74AC533 14.5 16.5 14.5 14.5 14.5
range,
UNIT
25°C 14.5 12.5 12.5
SN54AC533 17.5 15.5 15.5
switching characteristics over recommended operating (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) (OUTPUT)
free-air
temperature
SN74AC533 10.5 11.5 10.5 10.5
range,
UNIT
25°C 10.5
SN54AC533 12.5 12.5 12.5
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
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SN54AC533, SN74AC533 OCTAL TRANSPARENT TYPE LATCHES WITH STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
From Output Under Test (see Note Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open
LOAD CIRCUIT Timing Input Input VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS Data Input
Input tPLH tPHL Out-of-Phase Output tPHL tPLH
Output Control (low-level enabling) tPZL Output Waveform (see Note tPZH Output Waveform Open (see Note
tPLZ tPHZ VOLTAGE WAVEFORMS
In-Phase Output
VOLTAGE WAVEFORMS
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
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PACKAGE OPTION ADDENDUM
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12-Jan-2006
PACKAGING INFORMATION
Orderable Device SN74AC533DBLE SN74AC533DBR SN74AC533DBRE4 SN74AC533DW SN74AC533DWG4 SN74AC533DWR SN74AC533DWRE4 SN74AC533DWRG4 SN74AC533N SN74AC533NE4 SN74AC533NSR SN74AC533NSRE4 SN74AC533PW SN74AC533PWE4 SN74AC533PWLE SN74AC533PWR SN74AC533PWRE4
Status OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE
Package Type SSOP SSOP SSOP SOIC SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP TSSOP
Package Drawing
Pins Package Plan 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
Lead/Ball Finish Call NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU Call NIPDAU NIPDAU
Peak Temp Call Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call Level-1-260C-UNLIM Level-1-260C-UNLIM
2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS)
2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br)
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material)
Addendum-Page
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
MECHANICAL DATA
MSSO002E JANUARY 1995 REVISED DECEMBER 2001
(R-PDSO-G**)
PINS SHOWN 0,65 0,38 0,22 0,15
PLASTIC SMALL-OUTLINE
0,25 0,09 5,60 5,00 8,20 7,40
Gage Plane 0,25 0,95 0,55
Seating Plane 2,00 0,05 0,10
PINS
6,50
6,50
7,50
8,50
10,50
10,50
12,90
5,90
5,90
6,90
7,90
9,90
9,90
12,30 4040065 12/01
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150
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MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,30 0,19
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
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