12-Bit 800kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER FEATURES

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

12-Bit 800kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER FEATURES

Datasheet Thumbnail

Top Searches for this datasheet

ADS7810
12-Bit 800kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER
FEATURES
1.25µs THROUGHPUT TIME STANDARD ±10V INPUT RANGE 69dB SINAD WITH 250kHz INPUT ±3/4 INTERNAL REFERENCE COMPLETE WITH S/H, REF, CLOCK, ETC. PARALLEL DATA w/LATCHES 28-PIN SOIC
DESCRIPTION
ADS7810 complete 12-bit sampling using state-of-the-art CMOS structures. contains complete 12-bit capacitor-based with inherent S/H, reference, clock, interface microprocessor use, three-state output drivers. ADS7810 specified 800kHz sampling rate, guaranteed over full temperature range. Laser-trimmed scaling resistors provide industrystandard ±10V input range, while innovative design allows operation from supplies. 28-pin ADS7810 available plastic SOIC fully specified operation over industrial -40°C +85°C range.
Clock
Successive Approximation Register Control Logic
CDAC Output Latches Three State Drivers
2450 ±10V Input Comparator
BUSY Three State Parallel Data
Buffer
4.8k 2.5V Out/In 8.6k Internal
International Airport Industrial Park Mailing Address: 11400, Tucson, 85734 Street Address: 6730 Tucson Blvd., Tucson, 85706 Tel: (520) 746-1111 Twx: 910-952-1111 Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
1992 Burr-Brown Corporation
PDS-1138E
Printed U.S.A. March, 1998
SBAS014
SPECIFICATIONS
ELECTRICAL
-40°C +85°C, 800kHz, +VDIG +VANA +5V, -VANA -5V, using internal reference input resistor shown Figure unless otherwise specified. ADS7810U PARAMETER RESOLUTION ANALOG INPUT Voltage Range Impedance Capacitance THROUGHPUT SPEED Conversion Cycle Complete Cycle Throughput Rate ACCURACY Integral Linearity Error Differential Linearity Error Missing Codes Transition Noise(2) Full Scale Error(3, Full Scale Error Drift Full Scale Error(3, Full Scale Error Drift Bipolar Zero Error(3) Bipolar Zero Error Drift Power Supply Sensitivity (+VDIG +VANA ACCURACY Spurious-Free Dynamic Range Total Harmonic Distortion Signal-to-(Noise+Distortion) Signal-to-Noise Usable Bandwidth(6) SAMPLING DYNAMICS Aperture Delay Aperture Jitter Transient Response Overvoltage Recovery(7) REFERENCE Internal Reference Voltage Internal Reference Source Current (External load should static) Internal Reference Drift External Reference Voltage Range Specified Linearity External Reference Current Drain DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS Data Format Data Coding Leakage Current Output Capacitance DIGITAL TIMING Access Time Relinquish Time Acquire Convert Guaranteed Ext. 2.5000V Ext. 2.5000V +4.75V +5.25V -5.25V -VANA -4.75V 250kHz 250kHz 250kHz 250kHz 2.48 2.52 ±0.5 ±0.5 ±0.5 ±0.25 1020 1250 ±0.75 CONDITIONS ADS7810UB UNITS Bits LSB(1) ppm/°C ppm/°C ppm/°C dB(5) ppm/°C
Step
Ext. 2.5000V
-0.3 +2.4
+0.8
ISINK 1.6mA ISOURCE 500µA High-Z State, VOUT VDIG High-Z State
+2.8
Parallel Bits Binary Two's Complement +0.4
information provided herein believed reliable; however, BURR-BROWN assumes responsibility inaccuracies omissions. BURR-BROWN assumes responsibility this information, such information shall entirely user's risk. Prices specifications subject change without notice. patent rights licenses circuits described herein implied granted third party. BURR-BROWN does authorize warrant BURR-BROWN product life support devices and/or systems.
ADS7810
SPECIFICATIONS
ELECTRICAL
(CONT)
-40°C +85°C, 800kHz, +VDIG +VANA +5V, -VANA -5V, using internal reference input resistor shown Figure unless otherwise specified. ADS7810U PARAMETER POWER SUPPLIES Specified Performance +VDIG +VANA -VANA +IDIG +IANA Derated Performance +VDIG +VANA -VANA Power Dissipation TEMPERATURE RANGE Specified Performance Derated Performance Storage Thermal Resistance (JA) Plastic SOIC Specification same ADS7810U. NOTES: means Least Significant Bit. 12-bit, ±10V input ADS7810, 4.88mV. Typical noise worst case transitions temperatures. Measured with series with analog input. Adjustable zero with external potentiometer. Full scale error worst case -Full Scale +Full Scale untrimmed deviation from ideal first last code transitions, divided transition voltage (not divided full-scale range) includes effect offset error. specifications referred full-scale ±10V input. Usable Bandwidth defined Full-Scale input frequency which Signalto-(Noise+Distortion) degrades 60dB, bits accuracy. Recovers specified performance after input over voltage. CONDITIONS ADS7810UB UNITS
+4.75 -5.25
+5.25 -4.75
°C/W °C/W
+4.5 -5.5 800kHz
+5.5 -4.5 +125 +150
ABSOLUTE MAXIMUM RATINGS
Analog Inputs: ±25V +VANA +0.3V AGND2 -0.3V Indefinite Short AGND2 Momentary Short +VANA Ground Voltage Differences: DGND, AGND1, AGND2 ±0.3V +VANA +VDIG +VANA +0.3V +VDIG -VANA Digital Inputs -0.3V +VDIG +0.3V Maximum Junction Temperature +165°C Internal Power Dissipation 825mW Lead Temperature (soldering, 10s) +300°C
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit damaged ESD. Burr-Brown recommends that integrated circuits handled with appropriate precautions. Failure observe proper handling installation procedures cause damage. damage range from subtle performance degradation complete device failure. Precision integrated circuits more susceptible damage because very small parametric changes could cause device meet published specifications.
ORDERING/PACKAGE INFORMATION
MAXIMUM INTEGRAL LINEARITY ERROR (LSB) ±0.75 MINIMUM SIGNAL-TO(NOISE DISTORTION) RATIO (dB)
PRODUCT ADS7810U ADS7810UB
SPECIFICATION TEMPERATURE RANGE -40°C +85°C -40°C +85°C
PACKAGE 28-Pin SOIC 28-Pin SOIC
PACKAGE DRAWING NUMBER(1)
NOTE: detailed drawing dimension table, please data sheet, Appendix Burr-Brown Data Book.
ADS7810
ASSIGNMENTS
NAME AGND1 AGND2 (MSB) DGND (LSB) DIGITAL DESCRIPTION Analog Input. Connect analog input. Full-scale input range ±10V. Analog Ground. Used internally ground reference point. Minimal current flow. Reference Input/Output. Outputs internal reference +2.5V nominal. also driven external system reference. both cases, decouple ground with 0.1µF ceramic capacitor. Reference Buffer Output. 10µF tantalum capacitor ground. Nominally +2V. Analog Ground. Data Most Significant (MSB) conversion results. Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Digital Ground. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Hi-Z state when HIGH, when LOW, when conversion progress. Data Least Significant (LSB) conversion results. Hi-Z state when HIGH, when LOW, when conversion progress. internally connected. Analog Positive Supply Input. Nominally +5V. Connect directly pins Digital Supply Input. Nominally +5V. Connect directly pins Digital ground. Read/Convert Input. With LOW, falling edge puts internal sample/hold into hold state starts conversion. With conversion progress, rising edge enables output data bits. Chip Select. With LOW, falling edge will initiate conversion. With HIGH conversion progress, falling edge will enable output data bits. Busy Output. Falls when conversion started, remains until conversion completed data latched into output register. With HIGH, output data will valid when BUSY rises, that rising edge used latch data. Analog Negative Supply Input. Nominally -5V. Decouple ground with 0.1µF ceramic 10µF tantulum capacitors. Digital Supply Input. Nominally +5V. Connect directly pins Analog Positive Supply Input. Nominally +5V. Connect directly pins decouple ground with 0.1µF ceramic 10µF tantulum capacitors.
+VANA +VDIG DGND
BUSY
-VANA +VDIG +VANA
CONFIGURATION
AGND1 AGND2 (MSB) DGND
ADS7810
+VANA +VDIG -VANA BUSY DGND +VDIG +VANA NC(1) (LSB)
NOTE: Internally Connected.
ADS7810
TYPICAL PERFORMANCE CURVES
+25°C, =800kHz, +VDIG +VANA +5V, -VANA -5V, using internal reference input resistors shown Figure unless otherwise specified.
FREQUENCY SPECTRUM (4096 Point FFT; 252kHz, -0.5dB)
Amplitude (dB)
Amplitude (dB)
FREQUENCY SPECTRUM (4096 Point FFT; 502kHz, -0.5dB) -100 -120
-100 -120 Frequency (kHz)
Frequency (kHz)
FREQUENCY SPECTRUM (4096 Point FFT; 1.002MHz, -0.5dB)
Amplitude (dB)
FREQUENCY SPECTRUM (4096 Point FFT; f1IN 232kHz, -6.5dB; f2IN 272kHz, -6.5dB) -100 -120
Amplitude (dB)
-100 -120 Frequency (kHz)
Frequency (kHz)
SIGNAL-TO-(NOISE DISTORTION) INPUT FREQUENCY (fIN -0.5dB)
A.C. PARAMETERS TEMPERATURE (fIN 250kHz, -0.5dB) -100 SFDR SINAD Temperature (°C)
SFDR, SNR, SINAD (dB)
SINAD (dB)
100k Input Signal Frequency (Hz)
ADS7810
(dB)
TYPICAL PERFORMANCE CURVES (CONT)
+25°C, =800kHz, +VDIG +VANA +5V, -VANA -5V, using internal reference input resistors shown Figure unless otherwise specified.
CODE TRANSITION NOISE
-0.5 Codes 1024 1536 2048 2560 3072 3584 4095 Decimal Code 12-Bit LSBs -0.5 Codes 1024 1536 2048 2560 3072 3584 4095 Decimal Code D.C. PARAMETERS TEMPERATURE -0.1 -0.2 LSBs From Ideal
Conversions Yielding Expected Code
12-Bit LSBs
0.25 0.75
Analog Input Voltage Expected Code Center (LSBs)
INTERNAL REFERENCE VOLTAGE TEMPERATURE 2.520
Offset Error
2.515
Internal Reference
2.510
(dB)
2.505 2.500 2.495 2.490 2.485 2.480
Percent From Ideal
Error
Error -0.1 -0.2
Percent From Ideal
Temperature (°C)
Temperature (°C)
1200 1150
Conversion Time (ns)
CONVERSION TIME (t7) TEMPERATURE
1100 1050 1000 Temperature (°C)
ADS7810
BASIC OPERATION
Figure shows basic circuit operate ADS7810. Taking (pin minimum 40ns will initiate conversion. BUSY (pin will stay until conversion completed output registers updated. Data will output Binary Two's Complement with (pin BUSY going HIGH used latch data. convert commands will ignored while BUSY LOW. ADS7810 will begin tracking input signal conversion. Allowing 1.25µs between convert commands assures accurate acquisition signal.
STARTING CONVERSION
combination (pin (pin minimum 40ns puts sample/hold ADS7810 hold state starts conversion. BUSY (pin will stay until conversion completed internal output register been updated. convert commands during BUSY will ignored. ADS7810 will begin tracking input signal conversion. Allowing 1.25µs between convert commands assures accurate acquisition signal. Refer Table summary R/C, BUSY states Figures timing parameters. internally OR'd level triggered. There requirement which input goes first when initiating conversion. critical that initiate conversion, sure less critical input least 10ns prior initiating input.
BUSY
OPERATION None. Databus Hi-Z state. Initiates conversion. Databus remains Hi-Z state. Initiates conversion. Databus enters Hi-Z state. Conversion completed. Valid data from most recent conversion databus. Enables databus with valid data from most recent conversion. Conversion progress. Databus Hi-Z state, enabled when conversion completed Conversion progress. Databus Hi-Z state, enabled when conversion completed Conversion completed. Valid data from most recent conversion output register, output pins D11-D0 tri-stated. convert commands ignored. Conversion progress.
DESCRIPTION Full Scale Range Least Significant (LSB) +Full Scale (10V 1LSB) Midscale below Midscale -Full Scale
ANALOG VALUE ±10V 4.88mV
DIGITAL OUTPUT BINARY TWO'S COMPLEMENT BINARY CODE CODE
9.995V -4.88mV -10V
0111 1111 1111 0000 0000 0000 1111 1111 1111 1000 0000 0000
TABLE Ideal Input Voltages Output Codes.
Table Control Line Functions `read' `convert'.
0.1µF 10µF 0.1µF (MSB) 10µF ADS7810 (LSB) 40ns Convert Pulse 0.1µF 10µF BUSY
±10V
FIGURE Basic Operation
ADS7810
reduce number control pins, tied using control read convert modes. Note that parallel output will active whenever HIGH conversion progress. Reading Data section refer Table control line functions `read' `convert' modes.
READING DATA
ADS7810 outputs full parallel data Binary Two's Complement data format. parallel output will active when (pin HIGH, (pin LOW, conversion progress. other combination will tristate parallel output. Valid conversion data read full parallel, 12-bit word D11-D0 (pins 6-13 1518). Refer Table ideal output codes. After conversion completed output registers have been updated, BUSY (pin will HIGH. Valid data from most recent conversion will available D11-D0 (pins 6-13 15-18). BUSY going HIGH used latch data. Refer Table Figures Note: best performance, external data connected D11-D0 should active during conversion. switching noise external asynchronous data signals cause digital feedthrough degrading converter's performance. number control lines reduced tieing while using initiate conversions activate output mode converter. Figure
nominal input impedance 3.125k results from combination internal resistor network shown front page product data sheet external resistor. input resistor divider network provides inherent overvoltage protection guaranteed least ±25V. resistor does compromise accuracy drift converter. little influence relative internal resistors, tighter tolerances required. Note: values shown internal resistors reference only. exact values vary ±30%. This true resistors internal ADS7810. Each resistive divider trimmed that proper division achieved.
NOTE: Full scale error includes offset gain errors measured both -FS.
SYMBOL
DESCRIPTION Convert Pulse Width Data Valid Delay After BUSY Delay From BUSY BUSY Delay After Conversion Aperture Delay Conversion Time Acquisition Time Throughput Time Relinquish Time BUSY Delay After Data Valid Setup Time Time Between Conversions Access Time
UNITS
1110 1250
1095 1080
1020 1250
INPUT RANGES
ADS7810 offers standard ±10V input range. Figures show necessary circuit connections ADS7810 with without external trim. Offset full scale error(1) specifications tested guaranteed with resistor shown Figure This external resistor makes possible trim offset ±50mV using trim trim DAC. This resistor left offset gain errors will corrected software they negligible regards particular application. Calibration section data sheet details.
TABLE III. Timing Specifications (TMIN TMAX).
ADS7810
BUSY
MODE Acquire Convert Acquire Convert
DATA
Data Valid
Hi-Z State
Data Valid
State
FIGURE Conversion Timing with Outputs Enabled After Conversion Tied Low).
BUSY
MODE Acquire Convert DATA Hi-Z State Data Valid State Acquire
FIGURE Using Control Conversion Read Timing.
0.1µF 10µF AGND2 10µF AGND2
NOTE: metal film resistors. Trim offset first, then trim gain 10V.
604k AGND1
AGND1
0.1µF
FIGURE Circuit Diagram With External Hardware Trim.
FIGURE Circuit Diagram Without External Hardware Trim.
ADS7810
CALIBRATION
ADS7810 trimmed hardware software. offset should trimmed before gain since offset directly affects gain. Hardware Calibration calibrate offset gain ADS7810, install proper resistors potentiometers shown Figure calibration range ±50mV bipolar zero ±120mV full scale. Potentiometer resistor form offset adjust circuit gain adjust circuit. exact values critical. should made larger than value shown. They easily made smaller provide increased adjustment range. Reducing these below indicated values could begin adversely affect operation converter. also made larger reduce power dissipation. However, larger resistances will push useful adjustment range edges potentiometer. should probably exceed 100k order maintain reasonable sensitivity. Software Calibration calibrate offset gain ADS7810, external resistors required. Calibration section details effects external resistor. Calibration Figure circuit connections. Note that actual voltage dropped across resistor nearly orders magnitude lower than voltage dropped across internal resistor divider network. This should taken into consideration when choosing accuracy drift specifications external resistors. most applications, metal-film resistors will sufficient.
external resistor shown Figure necessary some applications. This resistor provides trim capability offset compensates slight gain adjustment internal ADS7810. using resistor will cause small gain error will have effect inherent offset error. Figure shows typical transfer function characteristics with without resistor circuit.
REFERENCE
ADS7810 operate with internal 2.5V reference external reference. applying external reference internal reference bypassed. reference voltage buffered internally output (pin (pin input external reference output internal 2.5V reference. 0.1µF capacitor should connected close possible. capacitor output resistance create pass filter band limit noise reference. Using smaller value capacitor will introduce more noise reference degrading SINAD. internal reference should used sink source currents greater than 100µA. addition, external loads should static. range external reference 2.3V 2.7V determines actual size. Increasing reference voltage will increase full scale range size converter which improve SNR.
Digital Output Full Scale
-10.0V -9.84V 9.84V 10.0V
Analog Input
Typical Transfer Function with Resistor Typical Transfer Function without Resistor
Full Scale
FIGURE Comparison ADS7810 Transfer Function With Without Series Resistor VIN.
ADS7810
(pin output internal reference buffer. 10µF tantalum capacitor should placed close possible provide optimum switching currents CDAC throughout conversion cycle compensation output buffer. Using capacitor smaller than cause output buffer oscillate have sufficient charge CDAC. Capacitor values larger than 10µF will have little effect improving performance. voltage approximately when using internal reference, externally supplied reference.
SIGNAL CONDITIONING switches used sample hold many CMOS converters release significant amount charge injection which cause driving oscillate. resistive front ADS7810 attenuates this charge reduces magnitude significantly-reducing burden external input amplifier buffer. However, keep mind that maintaining signal integrity voltage swings ±10V frequencies several hundred kilohertz extremely challenging. addition, external input amplifier must drive ADS7810 mainly during sample period-roughly 200ns. This will require highspeed, precision amplifier which swing greater than ±10V. signals where predominant frequencies below 200kHz, OPA671 operational amplifier should adequate most applications. some cases where input frequencies higher, composite configuration OPA671 BUF634 wide bandwidth mode) best choice. BUF634 data sheet more information. resistive front ADS7810 also provides guaranteed ±25V over voltage protection. most cases, this eliminates need external input protection circuitry. INTERMEDIATE LATCHES ADS7810 does have tri-state outputs parallel port, intermediate latches should used will active during conversions. active during conversions, tri-state outputs used isolate from other peripherals same bus. Intermediate latches beneficial monolithic converter. ADS7810 internal size 610µV. Transients from fast switching signals parallel port, even when tri-stated, coupled through substrate analog circuitry causing degradation converter performance.
LAYOUT
POWER ADS7810 uses majority power analog static circuitry, should considered analog component. optimum performance, analog digital power pins same power supply analog digital grounds together. best performance, supplies produced from whatever analog supply used rest analog signal conditioning. ±12V ±15V supplies present, simple regulators used. power should separate from used system's digital logic. Connecting +VDIG (pin directly digital supply reduce converter performance switching noise from digital logic. Although suggested, digital supply must used power converter, sure properly filter supply. Either using filtered digital supply regulated analog supply, both VDIG VANA should tied same source. GROUNDING Three ground pins present ADS7810. DGND (pin digital supply ground. AGND2 (pin analog supply ground. AGND1 (pin ground which analog signals internal referenced. AGND1 more susceptible current induced voltage drops must have path least resistance back power supply. ground pins should tied analog ground plane, separated from system's digital logic ground, achieve optimum performance. Both analog digital ground planes should tied "system" ground near power supplies possible. This helps prevent dynamic digital ground currents from modulating analog ground through common impedance power ground.
ADS7810
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2005
PACKAGING INFORMATION
Orderable Device ADS7810U ADS7810U/1K ADS7810U/1KE4 ADS7810UB ADS7810UB/1KE4 ADS7810UBE4 ADS7810UE4
Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type SOIC SOIC SOIC SOIC SOIC SOIC SOIC
Package Drawing
Pins Package Plan 1000 1000 1000 Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS)
Lead/Ball Finish NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU
Peak Temp Level-3-260C-168 Level-3-260C-168 Level-3-260C-168 Level-3-260C-168 Level-3-260C-168 Level-3-260C-168 Level-3-260C-168
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan planned eco-friendly classification: Pb-Free (RoHS) Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material)
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. Customers responsible their products applications using components. minimize risks associated with customer products applications, customers should provide adequate design operating safeguards. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right relating combination, machine, process which products services used. Information published regarding third-party products services does constitute license from such products services warranty endorsement thereof. such information require license from third party under patents other intellectual property third party, license from under patents other intellectual property Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations, notices. Reproduction this information with alteration unfair deceptive business practice. responsible liable such altered documentation. Resale products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service unfair deceptive business practice. responsible liable such statements. Following URLs where obtain information other Texas Instruments products application solutions: Products Amplifiers Data Converters Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video Imaging Wireless Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless

12-Bit 800kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER FEATURES

Top Searches for this datasheet

Other recent searches