FEATURES Offset Voltage: Input Offset Drift: 0.005 Rail-to-Rail Input
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Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers AD8571/AD8572/AD8574
FEATURES Offset Voltage: Input Offset Drift: 0.005 Rail-to-Rail Input Output Swing V/2.7 Single-Supply Operation High Gain, CMRR, PSRR: Ultralow Input Bias Current: Supply Current: A/Op Overload Recovery Time: External Capacitors Required APPLICATIONS Temperature Sensors Pressure Sensors Precision Current Sensing Strain Gage Amplifiers Medical Instrumentation Thermocouple Amplifiers CONFIGURATIONS 8-Lead MSOP Suffix)
8-Lead SOIC Suffix)
AD8571
CONNECT
AD8571
CONNECT
8-Lead TSSOP Suffix)
8-Lead SOIC Suffix)
AD8572
AD8572
GENERAL DESCRIPTION
This family amplifiers ultralow offset, drift, bias current. AD8571, AD8572, AD8574 single, dual, quad amplifiers, respectively, featuring rail-to-rail input output swings. guaranteed operate from single supply. AD857x family provides benefits previously found only expensive auto-zeroing chopper-stabilized amplifiers. Using Analog Devices' topology, these zero-drift amplifiers combine cost with high accuracy. external capacitors required.) addition, using patented spread-spectrum auto-zero technique, AD857x family virtually eliminates intermodulation effects from interaction chopping function with signal frequency applications. With offset voltage only drift 0.005 mV/C, AD8571 perfectly suited applications where error sources cannot tolerated. Position pressure sensors, medical equipment, strain gage amplifiers benefit greatly from nearly zero drift over their operating temperature range. Many more systems require rail-to-rail input output swings provided AD857x family. AD857x family specified extended industrial/ automotive (-40C +125C) temperature range. AD8571 single available 8-lead MSOP narrow 8-lead SOIC packages. AD8572 dual amplifier available 8-lead narrow SOIC 8-lead TSSOP surface mount packages. AD8574 quad available narrow 14-lead SOIC 14-lead TSSOP packages. REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective companies.
14-Lead TSSOP Suffix)
14-Lead SOIC Suffix)
AD8574
AD8574
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 2003 Analog Devices, Inc. rights reserved.
ELECTRICAL CHARACTERISTICS
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain* Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High CMRR DVOS/DT
unless otherwise noted.)
Conditions Unit mV/C V/ms nV/÷Hz fA/÷Hz
Symbol
-40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C
0.005 0.04 4.998 4.997 4.98 4.975
4.99 4.99 4.95 4.95
Output Voltage
Short Circuit Limit Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Overload Recovery Time Gain Bandwidth Product NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
Specifications subject change without notice.
-40C +125C PSRR -40C +125C -40C +125C
1,000 1,075 0.05 0.41
*Gain testing highly dependent upon test bandwidth.
REV.
AD8571/AD8572/AD8574 ELECTRICAL CHARACTERISTICS
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain* Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High CMRR DVOS/DT
1.35 1.35 unless otherwise noted.)
Conditions Unit mV/C V/ms nV/÷Hz fA/÷Hz
Symbol
-40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C -40C +125C
0.005 0.04 2.697 2.696 2.68 2.675 0.05
2.685 2.685 2.67 2.67
Output Voltage
Short Circuit Limit Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Overload Recovery Time Gain Bandwidth Product NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
Specifications subject change without notice.
-40C +125C PSRR -40C +125C -40C +125C
1,000
*Gain testing highly dependent upon test bandwidth.
REV.
AD8571/AD8572/AD8574
ABSOLUTE MAXIMUM RATINGS
Package Type 8-Lead MSOP (RM) 8-Lead TSSOP (RU) 8-Lead SOIC 14-Lead TSSOP (RU) 14-Lead SOIC
Supply Voltage Input Voltage Differential Input Voltage2 (Human Body Model) 2,000 Output Short-Circuit Duration Indefinite Storage Temperature Range Packages -65C +150C Operating Temperature Range AD8571A/AD8572A/AD8574A -40C +125C Junction Temperature Range Packages -65C +150C Lead Temperature Range (Soldering, sec) 300C
NOTES Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those listed operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Differential input voltage limited supply voltage, whichever less.
Unit
specified worst-case conditions, i.e., specified device socket P-DIP packages, specified device soldered circuit board SOIC TSSOP packages.
ORDERING GUIDE
Model AD8571AR AD8571AR-REEL AD8571AR-REEL7 AD8571ARM-R2 AD8571ARM-REEL AD8572AR AD8572AR-REEL AD8572AR-REEL7 AD8572ARU AD8572ARU-REEL AD8574AR AD8574AR-REEL AD8574AR-REEL7 AD8574ARU AD8574ARU-REEL
Temperature Range +125 +125 +125 +125 +125 +125 +125 +125 +125 +125 +125 +125 +125 +125 +125
Package Description 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead TSSOP 8-Lead TSSOP 14-Lead TSSOP 14-Lead SOIC 14-Lead SOIC 14-Lead TSSOP 14-Lead TSSOP
Package Option Branding RM-8 RM-8 RU-8 RU-8 R-14 R-14 R-14 RU-14 RU-14
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although AD8571/AD8572/AD8574 features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
REV.
Typical Performance
INPUT BIAS CURRENT (pA)
OFFSET VOLTAGE
INPUT COMMON-MODE VOLTAGE
INPUT BIAS CURRENT (pA)
2.7V 1.35V
1,500 1,000 1,000 1,500 2,000 COMMON-MODE VOLTAGE
NUMBER AMPLIFIERS
Input Offset Voltage Distribution
Input Bias Current Common-Mode Voltage
Input Bias Current Common-Mode Voltage
NUMBER AMPLIFIERS
OFFSET VOLTAGE
OUTPUT VOLTAGE (mV)
NUMBER AMPLIFIERS
2.5V
2.5V +125
SOURCE SINK
INPUT OFFSET DRIFT (nV/
0.0001 0.001
0.01 LOAD CURRENT (mA)
Input Offset Voltage Distribution
Input Offset Voltage Drift Distribution
Output Voltage Supply Rail Output Current
2.7V INPUT BIAS CURRENT (pA)
1,000 2.5V
SUPPLY CURRENT (mA)
2.7V
OUTPUT VOLTAGE (mV)
SOURCE SINK
0.0001 0.001
0.01 LOAD CURRENT (mA)
TEMPERATURE
TEMPERATURE
Output Voltage Supply Rail Output Current
Bias Current Temperature
Supply Current Temperature
REV.
AD8571/AD8572/AD8574
SUPPLY CURRENT AMPLIFIER
2.7V
PHASE SHIFT (Degrees)
SUPPLY VOLTAGE
100k FREQUENCY (Hz)
100M
100k FREQUENCY (Hz)
100M
Supply Current Supply Voltage
Open-Loop Gain Phase Shift Frequency
Open-Loop Gain Phase Shift Frequency
CLOSED-LOOP GAIN (dB)
2.7V
CLOSED-LOOP GAIN (dB)
OUTPUT IMPEDANCE
100k FREQUENCY (Hz) 2.7V
100k FREQUENCY (Hz)
100k FREQUENCY (Hz)
Closed Loop Gain Frequency
Closed Loop Gain Frequency
Output Impedance Frequency
OUTPUT IMPEDANCE
100k FREQUENCY (Hz)
2.7V 300pF
300pF
500mV
Output Impedance Frequency
Large Signal Transient Response
Large Signal Transient Response
REV.
PHASE SHIFT (Degrees)
OPEN-LOOP GAIN (dB)
OPEN-LOOP GAIN (dB)
AD8571/AD8572/AD8574
SMALL SIGNAL OVERSHOOT
1.35V 50pF
2.5V 50pF
1.35V
CAPACITANCE (pF)
50mV
50mV
Small Signal Transient Response
Small Signal Transient Response
Small Signal Overshoot Load Capacitance
SMALL SIGNAL OVERSHOOT
2.5V
2.5V 200mV (RET GND)
2.5V 200mV (RET GND)
CAPACITANCE (pF)
VOUT
VOUT
BOTTOM SCALE: 1V/DIV SCALE: 200mV/DIV
BOTTOM SCALE: 1V/DIV SCALE: 200mV/DIV
Small Signal Overshoot Load Capacitance
Positive Overvoltage Recovery
Negative Overvoltage Recovery
2.5V 60mV
CMRR (dB)
2.7V
CMRR (dB)
100k FREQUENCY (Hz)
100k FREQUENCY (Hz)
Phase Reversal
CMRR Frequency
CMRR Frequency
REV.
AD8571/AD8572/AD8574
1.35V
PSRR (dB)
2.5V OUTPUT SWING p-p) 1.35V THD+N
PSRR (dB)
PSRR +PSRR
+PSRR PSRR
100k FREQUENCY (Hz)
100k FREQUENCY (Hz)
100k FREQUENCY (Hz)
PSRR Frequency 1.35
PSRR Frequency
Maximum Output Swing Frequency
OUTPUT SWING p-p)
2.5V THD+N
1.35V 120,000
2.5V 120,000
50mV
50mV
100k FREQUENCY (Hz)
Maximum Output Swing Frequency
Noise
Noise
(nV/
2.7V
(nV/
2.7V
(nV/
FREQUENCY (kHz)
FREQUENCY (kHz)
FREQUENCY (kHz)
Voltage Noise Density from
Voltage Noise Density from
Voltage Noise Density from
REV.
AD8571/AD8572/AD8574
POWER SUPPLY REJECTION (dB)
(nV/
(nV/
2.7V 5.5V
FREQUENCY (kHz)
FREQUENCY (Hz)
TEMPERATURE
Voltage Noise Density from
Voltage Noise Density from
Power-Supply Rejection Temperature
OUTPUT VOLTAGE SWING (mV)
SHORT-CIRCUIT CURRENT (mA)
SHORT-CIRCUIT CURRENT (mA)
2.7V
TEMPERATURE ISC+
ISC+ TEMPERATURE
100k
TEMPERATURE
Output Short-Circuit Current Temperature
Output Short-Circuit Current Temperature
Output Voltage Supply Rail Temperature
OUTPUT VOLTAGE SWING (mV)
100k
TEMPERATURE
Output Voltage Supply Rail Temperature
REV.
AD8571/AD8572/AD8574
FUNCTIONAL DESCRIPTION
AD857x family CMOS amplifiers that achieve their high degree precision through random frequency auto-zero stabilization. autocorrection topology allows AD857x maintain offset voltage over wide temperature range, randomized auto-zero clock eliminates intermodulation distortion (IMD) errors amplifier's output. AD857x from single supply voltage extremely offset voltage products allows amplifier easily configured high gains without risk excessive output voltage errors. This makes AD857x ideal amplifier applications requiring both precision distortion signals. extremely small temperature drift nV/C ensures minimum offset voltage error over entire temperature range -40C +125C. These combined features make AD857x excellent choice variety sensitive measurement automotive applications.
Amplifier Architecture
noted Amplifier Architecture section, each AD857x contains internal amplifiers. used primary amplifier, other autocorrection, nulling, amplifier. Each amplifier associated input offset voltage that modeled voltage source series with noninverting input. Figures these labeled VOSX, where denotes amplifier associated with offset; nulling amplifier, primary amplifier. open-loop gain inputs each amplifier given Both amplifiers also have third voltage input with associated open-loop gain There modes operation determined action sets switches amplifier: auto-zero phase amplification phase.
Auto-Zero Phase
Each AD857x consists amplifiers, main amplifier secondary amplifier, used correct offset voltage main amplifier. Both consist rail-to-rail input stage, allowing input common-mode voltage range reach both supply rails. input stage consists NMOS differential pair operating concurrently with parallel PMOS differential pair. outputs from differential input stages combined another gain stage whose output used drive rail-to-rail output stage. wide voltage swing amplifier achieved using output transistors common-source configuration. output voltage range limited drain-to-source resistance these transistors. amplifier required source sink more output current, voltage drop across these transistors increases their rds. Simply put, output voltage will swing close rail under heavy output current conditions will with light output current. This characteristic rail-to-rail output amplifiers. TPCs show close output voltage rails with given output current. output AD857x short circuit protected approximately current. AD857x amplifiers have exceptional gain, yielding greater than open-loop gain with load Because output transistors configured common-source configuration, gain output stage, thus open-loop gain amplifier, dependent load resistance. Open-loop gain will decrease with smaller load resistances. This another characteristic rail-to-rail output amplifiers.
Basic Auto-Zero Amplifier Theory
this phase, switches closed switches opened. Here, nulling amplifier taken gain loop shorting inputs together. course, there degree offset voltage, shown VOSA, inherent nulling amplifier, which maintains potential difference between inputs. nulling amplifier feedback loop closed through VOSA appears output nulling CM1, internal capacitor AD857x. Mathematically, express this time domain AAVOSA BAVOA which also expressed
AAVOSA
This shows that offset voltage nulling amplifier times gain factor appears output nulling amplifier thus capacitor.
VIN+ VOSA VOUT
Figure Autozero Phase AD857x
Amplification Phase
Autocorrection amplifiers technology. Various implementations have been available over years some improvements have been made over time. AD857x design offers number significant performance improvements over older versions while attaining very substantial reduction device cost. This section offers simplified explanation AD857x able offer extremely offset voltages high open-loop gains.
When switches close switches open amplification phase, this offset voltage remains essentially corrects error from nulling amplifier. voltage across designated VNA. also designate potential difference between inputs primary amplifier, (VIN+ VIN-). output nulling amplifier expressed
VOSA BAVNA
-10-
REV.
AD8571/AD8572/AD8574
VIN+ VOSA VOUT
amplification phase, VNB, this rewritten
VOUT ABVIN ABVOSB VOSA
combining terms:
VOUT BBVOSA ABVOSB
(10)
Figure Output Phase Amplifier
Because open there place discharge, voltage present time equal voltage output nulling time when closed. call period autocorrection switching frequency then amplifier switches between phases every Therefore, amplification phase
AD857x architecture optimized such that Also, gain product AABB much greater than These allow Equation simplified VOUT (VOSA VOSB
(11)
substituting Equation Equation into Equation yields:
Most obvious gain product both primary nulling amplifiers. This AABA term what gives AD857x extremely high open-loop gain. understand VOSA VOSB relate overall effective input offset voltage complete amplifier, should generic amplifier equation
AAVIN AAVOSA
BAVOSA
VOUT
(12)
where open-loop gain amplifier VOS, effective offset voltage. Putting Equation into form Equation gives VOUT From here, easy that
sake simplification, assume that autocorrection frequency much faster than potential change VOSA VOSB. This good assumption since changes offset voltage function temperature variation long-term wear time, both which much slower than auto-zero clock frequency AD857x. This effectively makes time invariant, rearrange Equation rewrite VOSA BAVOSA AAVIN
(13)
VOS,EFF
VOSA VOSB
(14)
Thus, offset voltages both primary nulling amplifiers reduced gain factor This takes typical input offset voltage from several millivolts down effective input offset voltage submicrovolts. This autocorrection scheme what makes AD857x family amplifiers among most precise amplifiers world.
High Gain, CMRR, PSRR
already feel auto-zeroing action. Note that term reduced factor. This shows nulling amplifier greatly reduced offset voltage error even before correcting primary amplifier. primary amplifier output voltage voltage output AD857x amplifier. equal
VOUT VOSB BBVNB
Common-mode power supply rejection indications amount offset voltage amplifier result change input common-mode power supply voltages. shown previous section, autocorrection architecture AD857x allows quite effectively minimize offset voltages. technique also corrects offset errors caused commonmode voltage swings power supply variations. This results superb CMRR PSRR figures excess Because autocorrection occurs continuously, these figures maintained across device's entire temperature range, from -40C +125C.
REV.
-11-
AD8571/AD8572/AD8574
Maximizing Performance through Proper Layout
achieve maximum performance extremely high input impedance offset voltage AD857x, care should taken circuit board layout. board surface must remain clean free moisture avoid leakage currents between adjacent traces. Surface coating circuit board will reduce surface moisture provide humidity barrier, reducing parasitic resistance board. guard rings around amplifier inputs will further reduce leakage currents. Figure shows guard ring should configured Figure shows view surface mount layout arranged. guard ring does need specific width, should form continuous loop around both inputs. setting guard ring voltage equal voltage noninverting input, parasitic capacitance minimized well. further reduction leakage currents, components mounted board using Teflon standoff insulators.
plane will help distribute heat throughout board will also reduce noise pickup.
COMPONENT LEAD VSC1 VTS1 BOARD COPPER TRACE TA2, THEN VTS1 VSC1 VTS2 VSC2 VSC2 SOLDER VTS2
SURFACE MOUNT COMPONENT
Figure Mismatch Seebeck Voltages Causes Thermoelectric Voltage Error
VOUT
VOUT
VOUT
AD857x
/R1)
AD8572
AD8572
NOTE: SHOULD PLACED CLOSE PROXIMITY ALIGNMENT BALANCE SEEBECK VOLTAGES
VOUT
AD8572
Figure Using Dummy Components Cancel Thermoelectric Voltage Errors
Noise Characteristics
Figure Guard Ring Layout Connections Reduce Board Leakage Currents
VIN1
AD8572
VIN2
GUARD RING
Another advantage auto-zero amplifiers their ability cancel flicker noise. Flicker noise, also known noise, noise inherent physics semiconductor devices increases every octave decrease frequency. corner frequency amplifier frequency which flicker noise equal broadband noise amplifier. lower frequencies, flicker noise dominates, causing higher degrees error sub-Hertz frequencies precision applications. Because AD857x amplifiers self-correcting amps, they have increasing flicker noise lower frequencies. essence, frequency noise treated slowly varying offset error greatly reduced result autocorrection. correction becomes more effective noise frequency approaches offsetting tendency noise increase exponentially frequency decreases. This allows AD857x have lower noise near than standard noise amplifiers that susceptible noise.
Random Auto-Zero Correction Eliminates Intermodulation Distortion
VREF VREF
GUARD RING
Figure View AD8572 SOIC Layout with Guard Rings
Other potential sources offset error thermoelectric voltages circuit board. This voltage, also called Seebeck voltage, occurs junction dissimilar metals proportional temperature junction. most common metallic junctions circuit board solder-to-board trace solder-to-component lead. Figure shows cross-section diagram view thermal voltage error sources. temperature board component (TA1) different from temperature other (TA2), Seebeck voltages will equal, resulting thermal voltage error. This thermocouple error reduced using dummy components match thermoelectric error source. Placing dummy component close possible partner will ensure both Seebeck voltages equal, thus canceling thermocouple error. Maintaining constant ambient temperature circuit board will further reduce this error. ground
AD857x used conventional gains MHz. auto-zero correction frequency device continuously varies, based pseudo-random generator with uniform distribution from kHz. randomization autocorrection clock creates continuous randomization intermodulation distortion (IMD) products, which show simple broadband noise output amplifier. This noise naturally combines with amplifier's voltage noise root-squared-sum fashion, resulting output free IMD. Figure shows spectral output AD8572 with amplifier configured unity gain input grounded. Figure shows spectral output with amplifier configured gain REV.
-12-
AD8571/AD8572/AD8574
OUTPUT SIGNAL
Broadband External Resistor Noise Considerations
total broadband noise output from amplifier primarily function three types noise: Input voltage noise from amplifier, input current noise from amplifier, Johnson noise from external resistors used around amplifier. Input voltage noise, strictly function amplifier used. Johnson noise from resistor function resistance temperature. Input current noise, creates equivalent voltage noise proportional resistors used around amplifier. These noise sources correlated with each other their combined noise sums root-squared-sum fashion. full equation given
en,TOTAL 4kTrs
FREQUENCY (kHz)
(15)
Figure Spectral Analysis AD857x Output Unity Gain Configuration
60dB
where: Input voltage noise amplifier Input current noise amplifier Source resistance connected noninverting terminal Boltzmann's constant (1.38 10-23 J/K) Ambient temperature Kelvin 273.15 input voltage noise density, AD857x nV/÷Hz, input noise, fA/÷Hz. TOTAL will dominated input voltage noise provided source resistance less than With source resistance greater than overall noise system will dominated Johnson noise resistor itself. Because input current noise AD857x very small, does become dominant term unless greater than which impractical value source resistance.
OUTPUT SIGNAL
FREQUENCY (kHz)
total noise, TOTAL, expressed volts-per-square-root Hertz, equivalent noise over certain bandwidth found
Figure Spectral Analysis AD857x Output with Gain
en,TOTAL
where bandwidth interest Hertz.
(16)
Figure shows spectral output AD8572 configured high gain with input signal applied. Note absence products spectrum. signal-to-noise (SNR) ratio output signal better than 0.1%.
60dB
complete treatise circuit noise analysis, please refer 1995 Linear Design Seminar book available from Analog Devices.
Output Overdrive Recovery
OUTPUT SIGNAL
AD857x amplifiers have excellent overdrive recovery only from either supply rail. This characteristic particularly difficult autocorrection amplifiers, nulling amplifier requires substantial amount time error correct main amplifier back valid output. TPCs show positive negative overdrive recovery time AD857x. output overdrive recovery autocorrection amplifier defined time takes output correct final voltage from overload state. measured placing amplifier high gain configuration with input signal that forces output voltage supply rail. input voltage then stepped down linear region amplifier, usually half-way between supplies. time from input signal step-down output settling within final value overdrive recovery time. Most competitors' autocorrection amplifiers require number auto-zero clock cycles recover from output overdrive some take several milliseconds output settle properly.
FREQUENCY (kHz)
Figure Spectral Analysis AD857x High Gain with Input Signal
REV.
-13-
AD8571/AD8572/AD8574
Input Overvoltage Protection
Although AD857x rail-to-rail input amplifier, care should taken ensure that potential difference between inputs does exceed Under normal operating conditions, amplifier will correct output ensure inputs same voltage. However, device configured comparator, under some unusual operating condition, input voltages forced different potentials. This could cause excessive current flow through internal diodes AD857x used protect input stage against overvoltage. either input exceeds either supply rail more than large amounts current will begin flow through protection diodes amplifier. These diodes connected between inputs each supply rail protect input transistors against electrostatic discharge event normally reverse-biased. However, input voltage exceeds supply voltage, these diodes will become forward-biased. Without current-limiting, excessive amounts current could flow through these diodes causing permanent damage device. inputs subject overvoltage, appropriate series resistors should inserted limit diode current less than maximum.
Output Phase Reversal
drive larger values capacitance while maintaining minimum overshoot ringing. Figure shows output AD857x driving capacitor with without snubber network.
WITH SNUBBER
WITHOUT SNUBBER CLOAD 4.7nF
100mV
Figure Overshoot Ringing Substantially Reduced Using Snubber Network
Output phase reversal occurs some amplifiers when input common-mode voltage range exceeded. common-mode voltage moved outside common-mode range, outputs these amplifiers will suddenly jump opposite direction supply rail. This result differential input pair shutting down, causing radical shifting internal voltages that results erratic output behavior. AD857x amplifier been carefully designed prevent output phase reversal, provided both inputs maintained within supply voltages. both inputs could exceed either supply voltage, resistor should placed series with input limit current less than This will ensure output will reverse phase.
Capacitive Load Drive
optimum value resistor capacitor function load capacitance best determined empirically since actual CLOAD will include stray capacitances differ substantially from nominal capacitive load. Table shows some snubber network values that used starting points.
Table Snubber Network Values Driving Capacitive Loads
CLOAD
Power-Up Behavior
0.47
AD857x excellent capacitive load-driving capabilities safely drive from single supply. Although device stable, capacitive loading will limit bandwidth amplifier. Capacitive loads will also increase amount overshoot ringing output. snubber network, Figure used compensate amplifier against capacitive load ringing overshoot.
power-up, AD857x will settle valid output within Figure shows oscilloscope photo output amplifier along with power supply voltage, Figure shows test circuit. With amplifier configured unity gain, device takes approximately settle final output voltage. This turn-on response time much faster than most other autocorrection amplifiers, which take hundreds microseconds longer their output settle.
VOUT
AD857x
200mV 0.47 4.7nF
VOUT
Figure Snubber Network Configuration Driving Capacitive Loads
BOTTOM TRACE 2V/DIV TRACE 1V/DIV
Although snubber will recover loss amplifier bandwidth from load capacitance, will allow amplifier
Figure 11a. AD857x Output Behavior Power-Up
-14-
REV.
AD8571/AD8572/AD8574
100k
VOUT
VOUT 100k
AD857x
AD857x
THEN VOUT
Figure 11b. AD857x Test Circuit Turn-On Time
APPLICATIONS Precision Strain Gage Circuit
Figure Using AD857x Difference Amplifier
ideal difference amplifier, ratio resistors exactly equal
extremely offset voltage AD8572 makes ideal amplifier application requiring accuracy with high gains, such weigh scale strain gage. Figure shows configuration single supply, precision strain gage measurement system. REF192 provides precision reference voltage amplifier boosts this voltage provide reference strain gage resistor bridge. provides current drive bridge network. used amplify output bridge with full-scale output voltage equal
(19)
which sets output voltage system VOUT (20)
finite component tolerance, ratio between four resistors will exactly equal, mismatch results reduction common-mode rejection from system. Referring Figure exact common-mode rejection ratio expressed
CMRR R1R4 2R1R4
(17)
(21)
Where resistance load cell. Using values given Figure output voltage will linearly vary from with strain under full strain.
2.5V 2N2222 EQUIVALENT 4.0V 17.4k
3-op instrumentation amplifier configuration shown Figure output difference amplifier unity gain with four resistors equal value. tolerance resistors used circuit given worst-case CMRR instrumentation amplifier will CMRRMIN
REF192
AD8574-A
(22)
AD8572-B
VOUT
LOAD CELL
40mV FULL-SCALE
AD8572-A
VOUT
AD8574-C
AD8574-B
VOUT
RTRIM
17.4k NOTE: 0.1% TOLERANCE RESISTORS.
Figure Precision Strain-Gage Amplifier
Instrumentation Amplifier
Figure Discrete Instrumentation Amplifier Configuration
high common-mode rejection, high open-loop gain, operation down supply voltage makes AD857x excellent choice discrete single supply instrumentation amplifiers. common-mode rejection ratio AD857x greater than CMRR system also function external resistor tolerances. gain difference amplifier shown Figure given
VOUT
Thus, using tolerance resistors would result worst-case system CMRR 0.02, Therefore either high precision resistors additional trimming resistor, shown Figure should used achieve high common-mode rejection. value this trimming resistor should equal value multiplied tolerance. example, using resistors with tolerance would require series trimming resistor equal
(18)
REV.
-15-
AD8571/AD8572/AD8574
High Accuracy Thermocouple Amplifier
Figure shows K-type thermocouple amplifier configuration with cold-junction compensation. Even from supply, AD8571 provide enough accuracy achieve resolution better than 0.02C from 500C. used temperature measuring device correct cold-junction error from thermocouple should placed close possible terminating junctions. With thermocouple measuring immersed zero degree bath, should adjusted until output Using values shown Figure output voltage will track temperature mV/C. wider range temperature measurement, decreased This will create mV/C change output, allowing measurements 1000C.
REF02EZ
Figure shows low-side monitor equivalent. this circuit, input common-mode voltage AD8572 will near ground. Again, resistor provides voltage drop proportional return current. output voltage given
VOUT RSENSE
(24)
component values shown Figure output transfer function decreases from -2.5 V/A.
RSENSE
Si9433 MONITOR OUTPUT 2.49k
AD8572
40.2k 10.7k
124k
1N4148
2.74k
Figure High-Side Load Current Monitor
2.49k VOUT
K-TYPE THERMOCOUPLE 40.7
5.62k 53.6
AD8571
Figure Precision K-Type Thermocouple Amplifier with Cold-Junction Compensation
Precision Current Meter
Because input bias current superb offset voltage single supply voltages, AD857x excellent amplifier precision current monitoring. rail-to-rail input allows amplifier used either high-side low-side current monitor. Using both amplifiers AD8572 provides simple method monitor both current supply return paths load fault detection. Figure shows high-side current monitor configuration. Here, input common-mode voltage amplifier will near positive supply voltage. amplifier's rail-to-rail input provides precise measurement, even with input common-mode voltage supply voltage. CMOS input structure does draw input bias current, ensuring minimum measurement error. resistor creates voltage drop noninverting input AD857x. amplifier's output corrected until this voltage appears inverting input. This creates current through which turn flows through Monitor Output given
AD8572
RSENSE RETURN GROUND
Figure Low-Side Load Current Monitor
Precision Voltage Comparator
AD857x operated open-loop used precision comparator. AD857x less than offset voltage when this configuration. slight increase offset voltage stems from fact that autocorrection architecture operates with lowest offset closed-loop configuration, that with negative feedback. With overdrive, device propagation delay rising edge falling edge. Care should taken ensure maximum differential voltage device exceeded. more information, refer Input Overvoltage Protection section.
Monitor Output SENSE
(23)
Using components shown Figure Monitor Output transfer function V/A.
-16-
REV.
AD8571/AD8572/AD8574
SPICE Macro-Model
SPICE macro-model AD857x amplifier given Listing This model simulates typical specifications AD857x, downloaded from Analog Devices website www.analog.com. schematic macro-model shown Figure Transistors through simulate rail-to-rail input differential pairs AD857x amplifier. voltage source, series with noninverting input, establishes only offset voltage, also used establish common-mode power supply rejection ratios input voltage noise. differential voltages from nodes nodes reflected which used simulate secondary pole-zero combination open-loop gain amplifier. voltage node then reflected which adds additional gain stage and, conjunction with establishes slew rate model V/ms. common-source configuration, similar output stage
AD857x amplifier. quiescent current these transistors also help accurately simulate VOUT IOUT characteristic amplifier. network around ECM1 creates common-mode voltage error, with CCM1 setting corner frequency CMRR roll-off. power supply rejection error created network around EPS1, with CPS3 establishing corner frequency PSRR roll-off. current loops around nodes used create nV/÷Hz noise figure across RN2. three these error sources reflected input model through EOS. Finally, used accurately model supply current versus supply voltage increase AD857x. This macro-model been designed accurately simulate number specifications exhibited AD857x amplifier, most true-to-life macro-models available amp. optimized operation 27C. Although model will function different temperatures, lose accuracy with respect actual behavior AD857x.
CCM1
RCM1 CPS3 CPS1 RPS1 RPS2 CPS2 EREF RPS3 EPS1 RPS4 ECM1 RCM2
Figure Schematic AD857x SPICE Macro-Model
REV.
-17-
AD8571/AD8572/AD8574
SPICE Macro-Model AD857x
AD8572 SPICE Macro-model Typical Values 7/99, Ver. ADSC Copyright 1999 Analog Devices Refer "README.DOC" file License Statement. this model indicates your acceptance terms provisions License Statement. Node Assignments noninverting input inverting input positive supply negative supply output .SUBCKT AD8572 INPUT STAGE L=1E-6 W=355.3E-6 L=1E-6 W=355.3E-6 L=1E-6 W=355.3E-6 L=1E-6 W=355.3E-6 9E+3 9E+3 9E+3 9E+3 1E+3 1E+3 1E+3 1E+3 30E-12 30E-12 100E-6 100E-6 POLY(3) (22,98) (73,98) (81,98) 1E-6 2.5E-12 CMRR 120dB, ZERO 20Hz ECM1 POLY(2) (1,98) (2,98) RCM1 50E+6 CCM1 159E-12 RCM2 PSRR=120dB, ZERO RPS1 1E+6 RPS2 1E+6 CPS1 1E-5 CPS2 1E-5 EPSY POLY(2) (70,0) (0,71) RPS3 15.9E+6 CPS3 10E-9 RPS4
VOLTAGE NOISE REFERENCE 51nV/rt(Hz) 16.45E-3 INTERNAL VOLTAGE REFERENCE EREF POLY(2) (99,0) (50,0) (99,50) 48E-6 (99,50) (50,99) ZERO 7MHz, POLE 50MHz POLY(2) (4,6) (11,12) .5814 .5814 3.7E+3 22.74E+3 1E-12 GAIN STAGE (33,98) 22.7E-6 259.1E+6 45.4E-12 OUTPUT STAGE L=1E-6 W=1.111E-3 L=1E-6 W=1.6E-3 POLY(1) (98,30) 1.1936 POLY(1) (30,98) 1.2324 MODELS .MODEL PMOS (LEVEL=2,KP=10E-6, VTO=-1,LAMBDA=0.001,RD=8) .MODEL NMOS (LEVEL=2,KP=10E-6, VTO=1,LAMBDA=0.001,RD=5) .MODEL PMOS (LEVEL=2,KP=100E-6, VTO=-1,LAMBDA=0.01) .MODEL NMOS (LEVEL=2,KP=100E-6, VTO=1,LAMBDA=0.01) .MODEL D(IS=1E-14,RS=5) .ENDS AD8572
-18-
REV.
AD8571/AD8572/AD8574
OUTLINE DIMENSIONS 8-Lead Mini Small Outline Package [MSOP] (RM-8)
Dimensions shown millimeters
8-Lead Standard Small Outline Package [SOIC] (R-8)
Dimensions shown millimeters (inches)
3.00
5.00 (0.1968) 4.80 (0.1890)
3.00
4.90
4.00 (0.1574) 3.80 (0.1497)
6.20 (0.2440) 5.80 (0.2284)
0.65 0.15 0.00 0.38 0.22 COPLANARITY 0.10 1.10 0.80 0.60 0.40 0.25 (0.0098) 0.10 (0.0040)
1.27 (0.0500)
1.75 (0.0688) 1.35 (0.0532) 0.25 (0.0098) 0.17 (0.0067)
0.50 (0.0196) 0.25 (0.0099)
0.23 0.08 SEATING PLANE
COPLANARITY SEATING 0.10 PLANE
0.51 (0.0201) 0.31 (0.0122)
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT JEDEC STANDARDS MO-187AA
COMPLIANT JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS MILLIMETERS; INCH DIMENSIONS PARENTHESES) ROUNDED-OFF MILLIMETER EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN
8-Lead Thin Shrink Small Outline Package [TSSOP] (RU-8)
Dimensions shown millimeters
14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14)
Dimensions shown millimeters
3.10 3.00 2.90
5.10 5.00 4.90
4.50 4.40 6.40 4.30
4.50 4.40 4.30
6.40
0.15 0.05 0.65 1.20 SEATING 0.20 PLANE 0.09
1.05 1.00 0.80 0.75 0.60 0.45 0.65 1.20 0.15 0.05 0.30 0.19
0.20 0.09
0.30 COPLANARITY 0.19 0.10
SEATING COPLANARITY PLANE 0.10
0.75 0.60 0.45
COMPLIANT JEDEC STANDARDS MO-153AA
COMPLIANT JEDEC STANDARDS MO-153AB-1
14-Lead Standard Small Outline Package [SOIC] (R-14)
Dimensions shown millimeters (inches)
8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496)
6.20 (0.2441) 5.80 (0.2283)
0.25 (0.0098) 0.10 (0.0039)
1.27 (0.0500)
1.75 (0.0689) 1.35 (0.0531)
0.50 (0.0197) 0.25 (0.0098)
COPLANARITY 0.10
0.51 (0.0201) 0.31 (0.0122)
SEATING PLANE
0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT JEDEC STANDARDS MS-012AB CONTROLLING DIMENSIONS MILLIMETERS; INCH DIMENSIONS PARENTHESES) ROUNDED-OFF MILLIMETER EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN
REV.
-19-
AD8571/AD8572/AD8574 Revision History
Location 7/03-Data Sheet changed from REV. REV. Page
Renumbered figures .Universal Change Figure Updated OUTLINE DIMENSIONS
C01104-0-7/03(A)
Changes ORDERING GUIDE
-20-
REV.
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