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INVERSE MULTIPLEXING AIDT82V2608
Version December 2003
2975 Stender Way, Santa Clara, California 95054 Telephone: (800) 345-7015 FAX: (408) 492-8674 Printed U.S.A. 2003 Integrated Device Technology, Inc.
LIFE SUPPORT POLICY Integrated Device Technology's products authorized critical components life support devices systems unless specific written agreement pertaining such intended executed between manufacturer officer IDT. Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform, when properly used accordance with instructions provided labeling, reasonably expected result significant injury user. critical component components life support device system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness.
Table Contents
TABLE CONTENTS LIST TABLES LIST FIGURES .VIII FEATURES APPLICATIONS. STANDARDS COMPLIANT DESCRIPTION. FUNCTIONAL BLOCK DIAGRAM ASSIGNMENT DESCRIPTION IDT82V2608 INTERFACE UTOPIA INTERFACE 3.1.1 Utopia Loopback Function LINE INTERFACE 3.2.1 Line Interface Work Modes 3.2.1.1 Mode0 3.2.1.2 Mode1~Mode4 3.2.1.3 Mode5~Mode6 3.2.1.4 Mode7~Mode10 3.2.1.5 Mode11 3.2.1.6 Mode12~Mode13 3.2.1.7 Mode14~Mode15 3.2.2 Line Interface Timing Clock Modes. 3.2.3 Line Interface Loopback Function EXTERNAL MICROPROCESSOR INTERFACE 3.3.1 External Microprocessor Interface Selection. 3.3.2 Command FIFOs. 3.3.3 Registers 3.3.4 Register Map. 3.3.5 Register Description. 3.3.6 Procedure Loading Software Sending Commands SRAM INTERFACE FUNCTIONS MODE 4.1.1 Frame 4.1.2 (Timing Reference Link) 4.1.3 Stuffing Mode
Table Contents
December 2003
IDT82V2608
Inverse Multiplexing A
4.1.4 Link Backup. MODE
PROGRAMMING INFORMATION IMAOS08 COMMAND TYPES 5.1.1 Command Message 5.1.2 Command Reply Message. 5.1.3 Alarm Message COMMAND ENCODING COMMAND DESCRIPTION OPERATION INITIALIZATION CONFIGURE GROUP START GROUP INHIBIT GROUP/NOT INHIBIT GROUP LINKS GROUP THAT OPERATIONAL STATE DELETE LINKS DEACTIVATE RECOVER LINKS RESTART GROUP DELETE GROUP PMON (PERFORMANCE MONITORING) IMAOS08_SLAVE GROUP AUTO DETECT 8.1.1 Master Side 8.1.2 Slave Side PROGRAMMING INFORMATION IMAOS08_SLAVE 8.2.1 Command types 8.2.2 Command Encoding. 8.2.3 Command Description. JTAG TEST ACCESS PORT SIGNALS INSTRUCTIONS PHYSICAL ELECTRICAL CHARACTERISTICS 10.1 ABSOLUTE MAXIMUM RATINGS 10.2 D.C. CHARACTERISTICS 10.3 A.C. CHARACTERISTICS 10.3.1 Output Loading. 10.3.2 System Clock Signal Timing 10.3.3 Utopia Interface Timing 10.3.4 Line Interface Timing. 10.3.5 Microprocessor Interface Timing 10.3.5.1 Interface with Motorola (MPM 10.3.5.2 Interface with Intel (MPM =1).
Table Contents
December 2003
IDT82V2608
Inverse Multiplexing A
10.3.6 SRAM Interface Timing 10.3.6.1 Write Cycle Specification. 10.3.6.2 Read Cycle Specification GLOSSARY INDEX ORDERING INFORMATION.
Table Contents
December 2003
List Tables
Table-1 Table-2 Table-3 Table-4 Table-5 Table-6 Table-7 Table-8 Table-9 Table-10 Table-11 Table-12 Table-13 Table-14 Table-15 Table-16 Table-17 Table-18 Table-19 Table-20 Table-21 Table-22 Table-23 Table-24 Table-25 Table-26 Table-27 Table-28 Table-29 Table-30 Table-31 Table-32 Table-33 Table-34 Table-35 Table-36 Table-37 Table-38 Table-39 Table-40 Table-41 Description. Data Rates Different Modes. Pins Used Multi-Rate Multiplex Mode Register Map. Input FIFO Data Length Register (INPUT_FIFO_LENGTH_REG) Output FIFO Data Length Register (OUTPUT_FIFO_LENGTH_REG) Output FIFO Data Register (OUTPUT_FIFO_DATA_REG) Input FIFO Data Register (INPUT_FIFO_DATA_REG) FIFO Interrupt Enable Register (FIFO_INT_ENABLE_REG) FIFO Interrupt Status Register (FIFO_STATE_REG). FIFO Interrupt Reset Register (FIFO_INT_RESET_REG) Output FIFO Internal State Register Input FIFO Internal State Register (INPUT_FIFO_INTERNAL_STATE_REG) Maximum Delay Tolerance Value Different SRAM Size Unchannelized Mode Maximum Delay Tolerance Value Different SRAM Size Unchannelized Mode. Command Encoding ConfigDev Command (Encoding: 01H). ConfigUtopiaIF Command (Encoding: 03H) ConfigLoopMode Command (Encoding: 04H) ConfigGroupPara Command (Encoding: 05H) ConfigGroupInterFace Command (Encoding: 06H). ConfigGroupWorkMode Command (Encoding: 07H). ConfigGSMTimers Command (Encoding: 08H). ConfigTRLLink Command (Encoding: 09H). ConfigIFSMPara Command (Encoding: 0AH) AddTxLink Command (Encoding: 0BH) AddRxLink Command (Encoding: 0CH) ConfigUNILink Command (Encoding: 0DH). StartGroup Command (Encoding: 0EH) StartLASR Command (Encoding: 0FH) InhibitGrp Command (Encoding: 10H). NotInhibitGrp Command (Encoding: 11H) RestartGrp Command (Encoding: 12H). DeleteGrp Command (Encoding: 13H) RecoverLink Command (Encoding: 14H) DeleteLink Command (Encoding: 15H) DeactLink Command (Encoding: 16H) GetGroupState Command (Encoding: 17H) GetGroupDelayInfo Command (Encoding: 18H) GetLinkState Command (Encoding: 19H). GetGrpPerf Command (Encoding: 1AH).
List Tables
December 2003
IDT82V2608
Inverse Multiplexing A
Table-42 Table-43 Table-44 Table-45 Table-46 Table-47 Table-48 Table-49 Table-50 Table-51 Table-52 Table-53 Table-54 Table-55 Table-56 Table-57 Table-58 Table-59 Table-60 Table-61 Table-62 Table-63 Table-64 Table-65 Table-66 Table-67 Table-68 Table-69 Table-70
GetLinkPerf Command (Encoding: 1BH) GetConfigPara Command (Encoding: 1CH) GetGrpWorkingPara Command (Encoding: 1DH) GetLinkWorkingPara Command (Encoding: 1EH). StartTestPattern Command (Encoding: 1FH) GetLoopedTestPattern Command (Encoding: 20H) StopTestPattern Command (Encoding: 21H) GetVersionInfo Command (Encoding: 22H) Parameters Group Configuration PMON Parameters Definitions Different Cells. Failure/Alarm Signals. Command Encoding DeviceInitial Command (Encoding: 01H) ConfigSlaveFrame Command (Encoding: 02H) ConfigUtopiaIF Command (Encoding: 03H) GetVersionInfo Command (Encoding: 22H) GroupInitial Command (Encoding: 23H) Absolute Maximum Ratings D.C. Characteristics System Clock Reset Timing Parameters Utopia Interface Timing Parameters Line Interface Timing Parameters. Microprocessor Interface Timing Parameter Motorola Read Cycle Microprocessor Interface Timing Parameters Motorola Write Cycle. Microprocessor Interface Timing Parameter Intel Read Cycle. Microprocessor Interface Timing Parameters Intel Write Cycle SRAM Interface Write Cycle Parameters. SRAM Interface Read Cycle Parameters
List Tables
December 2003
List Figures
Figure-1 Figure-2 Figure-3 Figure-4 Figure-5 Figure-6 Figure-7 Figure-8 Figure-9 Figure-10 Figure-11 Figure-12 Figure-13 Figure-14 Figure-15 Figure-16 Figure-17 Figure-18 Figure-19 Figure-20 Figure-21 Figure-22 Figure-23 Functional Diagram IDT82V2608 PBGA208 Package Assignment Utopia Loopback Line Interface Work Modes G.802 Mapping Mode Spaced Mapping Mode Multiplexing Four Streams into Stream Input FIFO Write Process Output FIFO Read Process Command Message Format Command Reply Message Format Alarm Message Format Reset Signal Timing Diagram Utopia Interface Timing Diagram Utopia Interface Timing Diagram Line Interface Transmit Timing Diagram Line Interface Receive Timing Diagram Microprocessor Interface Timing Diagram Motorola Read Cycle Microprocessor Interface Timing Diagram Motorola Write Cycle Microprocessor Interface Timing Diagram Intel Read Cycle Microprocessor Interface Timing Diagram Intel Write Cycle SRAM Interface Timing Diagram Write Cycle SRAM Interface Timing Diagram Read Cycle
List Figures
VIII
December 2003
Inverse Multiplexing A
IDT82V2608
FEATURES
Highlights Provides command convenient configuration operation. embedded controller downloaded software used interpret commands. Functions added software upgrading. Supports group auto detect. Supports link backup that backup link automatically added when previously configured link fails. state machines implemented hardware. Advanced cell buffer management algorithm support AQoS requirements. Other Features Accommodates logical groups. Supports T1/E1 channelized unchannelized links. Supports ISDN links. Supports MIXED mode: links assigned group used mode. Supports symmetrical asymmetrical operation. Supports Common Transmit Clock (CTC) Independent Transmit Clock (ITC) timing modes. Provides Utopia Level cell level handshake MPHY interface Adevice. Supports maximum link delay tolerance (when external memory used). Provides parameters (Management Information Base). Supports dynamic addition/deletion links to/from working group. Supports line side clock detection. Supports non-multiplexed Intel Motorola microprocessor interface. Loopback capability both Utopia ports. Supports MVIP.
JTAG boundary scan meets IEEE 1149.1. Package: PBGA. 3.3V operation tolerant input.
APPLICATIONS
DSLAM concentrator Wireless base station controller (NodeB) Radio Network Controller (RNC) Integrated Access Devices (IAD)
STANDARDS COMPLIANT
ATM-Forum Utopia Level Version 1.0, af-phy-0039.000, June 1995. Inverse Multiplexing ASpecification version 1.1, af-phy0086.001, March 1999. Backward compatible with Inverse Multiplexing ASpecification version 1.0, af-phy-0086.000, September 1994. Physical Layer Specification, af-phy-0016.000, September 1994. Physical Interface Specification, af-phy-0064.000, September 1996. ITU-T I.432 B-ISDN User Network Interface specification. G.804 ACell Mapping into Plesiochronous Digital Hierarchy (PDH). G.802 Inter-working between networks based different digital hierarchies speech encoding laws. I.610 B-ISDN operation maintenance principles functions. ANSI ANSI T1.646-1995, Broadband-ISDN-Physical Layer Specification User-Network Interface Including DS1/ATM, 1995. MVIP
DESCRIPTION
8-port IDT82V2608 feature-rich device that provides solution implement logical channels over links public private UNI, B-ICI applications. chip compliant with AForum specification v1.1 backward compatible with specification v1.0. chip architecture, physically independent T1/E1 streams terminated through utilization most T1/E1 framers LIUs market, logical groups (i.e., data channels) supported same time. interface with most popular Alayer chips market, IDT82V2608 supports Utopia layer MPHY cell level handshake 8-bit interface. Through well-defined command set, function easily designed into various systems there little necessity access large amount registers. downloaded software used interpret command easily upgraded meet specific requirement.
logo registered trademarks Integrated Device Technology, Inc.
2003 Integrated Device Technology, Inc.
December 2003
DSC-6227-2
IDT82V2608
Inverse Multiplexing A
FUNCTIONAL BLOCK DIAGRAM
SYSCLK Group Cell FIFOs
TSD[8:1] TSCK[8:1] TSF[8:1] TSCFS TSCCK Line Interface RSD[8:1] RSCK[8:1] RSF[8:1] RSCFS RSCCK
Link Cell FIFO
Data Processor
PMON
Protocol Processor
TxClk TxSOC TxEnb TxData[7:0] TxClav TxAddr[4:0] UTOPIA RxClk RxSOC RxEnb RxData[7:0] RxClav RxAddr[4:0]
Link Cell FIFO
Data Processor
Group Cell FIFOs
JTAG
External SRAM_IF
Control Interface
TRST
EM_WE
D[7:0]
EMD[7:0]
EMA[18:0]
WR/RW
EM_OE
EM_CS
RD/DS
A[7:0]
Figure-1 Functional Diagram
FUNCTIONAL BLOCK DIAGRAM
December 2003
IDT82V2608
Inverse Multiplexing A
ASSIGNMENT
EMD4
EMD0
EMA18 EMA15 EMA12 EMA11
EMA8
EMA5
EMA1 RxData2 RxData5 RxData7
EMD5
EMD1
EM_OE
EMA16 EMA13 EMA10
EMA7
EMA4
EMA0 RxData3 RxData6 RxSOC RxClav
TRST
EMD6
EMD2
EM_CS
EMA17 EMA14
EMA9
EMA6
EMA3 RxData0 RxData4 RxAddr4 RxAddr3 RxAddr2
EMD7
EMD3
EM_WE
EMA2 RxData1 RxAddr1 RxAddr0 RxENB
RxCLK
RSCK1
RSD1
SYSCLK
TxClav
TxCLK TxAddr0 TxAddr1
RSCK2
RSD2
RSF1
TxAddr2 TxAddr3 TxAddr4 TxSOC
RSCK3
RSD3
RSF2
TxENB
TxData7 TxData6
RSCK4
RSD4
RSF3
TxData5 TxData4 TxData3
RSF4
RSD5
RSCK5
TxData0 TxData1 TxData2
RSF5
RSD6
RSCK6
RSF6
RSD7
RSCK7
RSF7
RSD8
RSCK8
RD/DS
WR/RW
RSF8
RSCFS RSCCK
TSCCK TSCFS
TSF8
TSF7
TSF6
TSF5
TSF4
TSCK2 TSCK1
TSD8
TSD7
TSD6
TSD5
TSD4
TSD3
TSD2
TSD1
TSCK8 TSCK7 TSCK6 TSCK5 TSCK4 TSCK3
TSF3
TSF2
TSF1
Figure-2 IDT82V2608 PBGA208 Package Assignment (Top View)
Assignment
December 2003
IDT82V2608
Inverse Multiplexing A
DESCRIPTION
Table-1 Description
Name Number Input/Output Global Signals SYSCLK SYSCLK: System Clock System clock IDT82V2608. Default MHz. RST: System Reset System reset signal, active. After reset, registers reset default values, both contents SRAM downloaded software cleared. AUtopia Interface TxClk TxClk: Utopia Transmit Clock Utopia transmit clock used transfer data from Alayer IDT82V2608. frequency TxClk should less than equal that system clock. Data sampled rising edge this signal. TxEnb: Utopia Transmit Enable Utopia active signal asserted Alayer device during cycles when TxData contains valid cell data. TxEnb input sampled rising edge TxClk. TxAddr[4:0]: Utopia Transmit Address Utopia transmit port address driven from Alayer poll select appropriate port. TxAddr[4:0] input sampled rising edge TxClk. Description
TxEnb
TxAddr4 TxAddr3 TxAddr2 TxAddr1 TxAddr0 TxData7 TxData6 TxData5 TxData4 TxData3 TxData2 TxData1 TxData0 TxClav
TxData[7:0]: Utopia Transmit Data Utopia 8-bit data driven from Alayer IDT82V2608. TxData[7:0] input sampled rising edge TxClk.
High-Z
TxClav: Utopia Transmit Cell Available Utopia transmit cell available signal from IDT82V2608 Alayer. polled port drives TxClav only during each cycle following with address TxAddr lines. polled port asserts TxClav high indicate corresponding FIFO accept transfer complete cell, otherwise deasserts signal. TxClav output updated rising edge TxClk. Note: This requires pull-down resistor.
TxSOC
TxSOC: Utopia Transmit Start Cell Utopia start cell signal. will driven high Alayer when TxData[7:0] contain first valid byte cell. TxSOC input sampled rising edge TxClk. RxClk: Utopia Receive Clock Utopia receive clock. frequency RxClk should less than equal frequency system clock. Data sampled rising edge this signal. RxEnb: Utopia Receive Enable When this low, received data will transferred RxData[7:0] following cycles. RxEnb input sampled rising edge RxClk.
RxClk
RxEnb
DESCRIPTION
December 2003
IDT82V2608
Inverse Multiplexing A
Table-1 Description (Continued)
Name RxAddr4 RxAddr3 RxAddr2 RxAddr1 RxAddr0 RxData7 RxData6 RxData5 RxData4 RxData3 RxData2 RxData1 RxData0 RxClav Number Input/Output Description RxAddr[4:0]: Utopia Receive Address Utopia receive port address driven from Alayer poll select appropriate port. RxAddr[4:0] input sampled rising edge RxClk.
High-Z
RxData[7:0]: Utopia Receive Data Utopia 8-bit data driven from IDT82V2608 Alayer. RxData[7:0] output updated rising edge RxClk.
High-Z
RxClav: Utopia Receive Cell Available Utopia cell available signal. polled port drives RxClav only during each cycle following with address RxAddr lines. polled port asserts RxClav high indicate corresponding FIFO complete cell available transfer Alayer, otherwise deasserts signal. RxClav output updated rising edge RxClk. Note: This requires pull-down resistor.
RxSOC
High-Z
RxSOC: Utopia Receive Start Cell Utopia start cell pulse. will driven high when RxData[7:0] contain first valid byte cell. RxSOC input updated rising edge RxClk. T1/E1 Line Interface
TSD8 TSD7 TSD6 TSD5 TSD4 TSD3 TSD2 TSD1 TSCK8 TSCK7 TSCK6 TSCK5 TSCK4 TSCK3 TSCK2 TSCK1 TSF8 TSF7 TSF6 TSF5 TSF4 TSF3 TSF2 TSF1
TSDn: Transmit Side Data Output TSDn contains transmit data n-th link. TSDn output updated rising edge TSCKn TSCCK common clock used.
TSCKn: Transmit Side Clock TSCKn contains transmit clock n-th link. Note: unused, TSCKn should connected ground.
TSFn: Transmit Side Frame pulse TSFn used delineate each frame n-th link. TSFn input sampled falling edge TSCKn TSCCK common clock used. Note: unused, TSFn should connected ground.
DESCRIPTION
December 2003
IDT82V2608
Inverse Multiplexing A
Table-1 Description (Continued)
Name TSCCK Number Input/Output Description TSCCK: Transmit Side Common Clock TSCCK transmit clock links that configured Common Clock Mode. Note: unused, TSCCK should connected ground. TSCFS TSCFS: Transmit Side Common Frame Pulse This signal used delineate each frame links that configured Common Clock Mode. TSCFS input sampled falling edge TSCCK. Note: unused, TSCFS should connected ground. RSD8 RSD7 RSD6 RSD5 RSD4 RSD3 RSD2 RSD1 RSCK8 RSCK7 RSCK6 RSCK5 RSCK4 RSCK3 RSCK2 RSCK1 RSF8 RSF7 RSF6 RSF5 RSF4 RSF3 RSF2 RSF1 RSCCK RSDn: Receive Side Data Input RSDn contains receive data n-th link. RSDn input sampled falling edge RSCKn RSCCK common clock used. Note: unused, RSDn should connected ground.
RSCKn: Receive Side Clock RSCKn contains recovered line clock n-th link. Note: unused, RSCKn should connected ground.
RSFn: Receive Side Frame Pulse RSFn used delineate each frame n-th link. RSFn input sampled falling edge RSCKn RSCCK common clock used. Note: unused, RSFn should connected ground.
RSCCK: Receive Side Common Clock RSCCK receive clock links that configured Common Clock Mode. Note: unused, RSCCK should connected ground.
RSCFS
RSCFS: Receive Side Common Frame Pulse RSCFS used delineate each frame links that configured Common Clock Mode. RSCFS input sampled falling edge RSCCK. Note: unused, RSCFS should connected ground. Microprocessor Interface
MPM: Microprocessor Interface Mode Connected Intel; connected Motorola.
DESCRIPTION
December 2003
IDT82V2608
Inverse Multiplexing A
Table-1 Description (Continued)
Name RD/DS Number Input/Output Description Read Operation parallel Intel microprocessor interface mode, this asserted microprocessor initiate read cycle. Data output D[7:0] from device. Data Strobe parallel Motorola microprocessor interface mode, this data strobe parallel interface. During write operation (RW=0), data D[7:0] sampled into device. During read operation (RW=1), data output D[7:0] from device. WR/RW Write Operation parallel Intel microprocessor interface mode, this asserted microprocessor initiate write cycle. Data D[7:0] sampled into device during write operation. Read/Write Select parallel Motorola microprocessor interface mode, this asserted write operation high read operation. D[7:0]: Data These pins function bi-directional data microprocessor interface.
A[7:0]: Address These pins function address microprocessor interface.
Chip Select each read write operation, this must changed from high low, remains until operation over. INT: Interrupt Request level this indicates that interrupt pending inside chip. SRAM Interface
Open_drain
EMD7 EMD6 EMD5 EMD4 EMD3 EMD2 EMD1 EMD0
EMD[7:0]: Data Data Input/Output pins external SRAM. Used data exchange between IDT82V2608 external SRAM.
DESCRIPTION
December 2003
IDT82V2608
Inverse Multiplexing A
Table-1 Description (Continued)
Name EMA18 EMA17 EMA16 EMA15 EMA14 EMA13 EMA12 EMA11 EMA10 EMA9 EMA8 EMA7 EMA6 EMA5 EMA4 EMA3 EMA2 EMA1 EMA0 EM_WE Number Input/Output Description EMA[18:0]: Address Address external SRAM. Used select data entry external SRAM.
EM_WE: Write Enable Write enable signal external SRAM. When EM_WE EM_CS both low, data written external SRAM. EM_OE: Output Enable Output enable signal external SRAM. When EM_OE EM_CS both low, data read from external SRAM. EM_CS: Chip Select Chip enable signal external SRAM. JTAG Scan Interface
EM_OE
EM_CS
High-Z
TCK: JTAG Test Clock This input clock JTAG. TMS: JTAG Test Mode Select This internal pull-up resistor. TDI: JTAG Test Data Input This used load instructions data into test logic internal pull-up resistor. TDO: JTAG Test Data Output This normally high impedance used read serial configuration test data from test logic. TRST: JTAG Test Port Reset This internal pull-up resistor. Power Supplies Grounds
TRST
D7,D10,E3,F4,G4,G13, K4,K13,L4,M4,N4,N5, N6,N7,N10,N11,P3, P12,R1,T2 A1,A16,D8,D9,G7,G8, G9,G10,H4,H7,H8,H9, H10,H13,J4,J7,J8,J9, J10,J13,K7,K8,K9, K10,N8,N9,T1,T16
3.3V Power Supply
Ground
DESCRIPTION
December 2003
IDT82V2608
Inverse Multiplexing A
Table-1 Description (Continued)
Name Number Input/Output Others A2,A3,B3,C3,D3,L15, P11,T12 K14,K15,K16,L14 D1,R2,T13 Internal Connected Internal use. normal operation, these pins should connected VDD. Internal Connected Internal use. normal operation, these pins should connected ground. Internal Connected Internal use. normal operation, these pins should left open. Connection Description
DESCRIPTION
December 2003
IDT82V2608
Inverse Multiplexing A
IDT82V2608 INTERFACE
UTOPIA INTERFACE
3.1.1
UTOPIA LOOPBACK FUNCTION
Utopia interface operates level mode. IDT82V2608 supports Utopia level ports. Each port assigned address ranging from address value reserved should used. ports individually enabled disabled ConfigUtopiaIF command. Each group link corresponds port. each group, port address assigned ConfigGroupInterface command. each link, port address assigned ConfigUNILink command. Inside device, each port corresponds (Group Cell FIFO) which cells deep. IDT82V2608 uses cell level handshake cell transfer. entire cell transferred before another port selected. start cell marked TxSOC RxSOC signals transmit receive directions. These signals active during first byte cell.
diagnostic purpose, capability loop back Utopia traffic Utopia provided. This loopback called Utopia loopback enabled ConfigLoopMode command. this mode, cells taken from TGCFs (Transmit Group Cell FIFO) sent respective RGCFs (Receive Group Cell FIFO). When Utopia loopback mode, cells will transmitted line interface. Refer Figure-3.
UTOPIA Interface
Group Cell FIFO
Group Cell FIFO
Group Cell FIFO
Group Cell FIFO
Figure-3 Utopia Loopback
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
3.2.1
LINE INTERFACE
LINE INTERFACE WORK MODES
different framers, line interface configured different Work Mode adapt different data format. Figure-4 shows Work Modes Table-2 lists layer data rate each mode.
channelized mode, framing bits signalling bits zero transmit direction. received signalling bits framing bits discarded receive direction. unchannelized mode, bits utilized data transfer. Work Mode selected AddTxLink AddRxLink command when link group. Work Mode selected ConfigUNILink command when link used link.
Framer Interface rate Mode name
Data rate
Unchannelized
1.5Mb/s ISDN mode Normal mode ISDN Spaced mode mapping Normal mode G.802 mapping 2Mb/s ISDN mode 1.5Mb/s
Mode0 Mode1
Mode2 Mode3
nonmulti-rate
Mode4 Mode5
Channelized
Normal mode ISDN G.802 mode mapping Normal mode ISDN Spaced mode mapping Normal mode
Mode6 Mode7
Interface Mode
multi-rate
8Mb/s four channel
Mode8 Mode9
Mode10
Unchannelized
2Mb/s Signalling mode
Mode11 Mode12
nonmulti-rate
2Mb/s Normal mode
Mode13
Channelized Signalling mode multi-rate 8Mb/s Normal mode
Mode15 Mode14
Figure-4 Line Interface Work Modes
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-2 Data Rates Different Modes
Mode Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10 Mode11 Mode12 Mode13 Mode14 Mode15 Data Rate Channel (Maximum) 1.544 Mb/s 1.472 Mb/s 1.536 Mb/s 1.472 Mb/s 1.536 Mb/s 1.472 Mb/s 1.536 Mb/s 1.472 Mb/s 1.536 Mb/s 1.472 Mb/s 1.536 Mb/s 2.048 Mb/s 1.920 Mb/s 1.984 Mb/s 1.920 Mb/s 1.984 Mb/s Interface Clock (Maximum) 1.544 2.048 2.048 2.048 2.048 1.544 1.544 8.192 8.192 8.192 8.192 2.048 2.048 2.048 8.192 8.192
3.2.1.1 Mode0 this mode, transmit receive data viewed continuous 1.544Mb/s serial stream. There concept time slot unchannelized link. Each eight bits grouped into octet with arbitrary alignment. first received/transmitted most significant octet while last least significant bit. 1.544 data stream clock provided system. 1.544 clock directions either common clock independent clock. common clock used, TSCCK RSCCK used clock clock respectively, TSCFS RSCFS used common frame pulse directions respectively. independent clock used, TSCK[i] RSCK[i] used clock clock respectively, TSF[i] RSF[i] used frame pulse directions respectively. 3.2.1.2 Mode1~Mode4 these four modes, transmit/receive data rate channelized while line interface timing clock 2.048 clock). Thus mapping between frame frame needed. mapping modes used: G.802 mapping mode spaced mapping mode.
Each mapping mode further divided into data modes: ISDN mode normal mode. mapping done frame-byframe fashion unassigned time slots zero. these modes, clock either common clock independent clock. common clock used, TSCCK RSCCK used clock clock respectively, TSCFS RSCFS used common frame pulse directions respectively. independent clock used, TSCK[i] RSCK[i] used clock clock respectively, TSF[i] RSF[i] used frame pulse directions respectively. G.802 Mapping This mode supports ITU-T Recommendation G.802, which describes signalling mode) time slots framing (totally 193/185 bits T1/T1-ISDN frame) mapped time slots (256 bits). This mapping done mapping T1ISDN mode) time slots TS1~TS15 TS17~TS25 TS17~TS24), mapping framing TS26/TS25. TS0, TS16, TS27/TS26 through TS31 unassigned zero (refer Figure-5).
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
Frame 1.5M stream
Frame
stream
Framing time slot
signalling time slot
X=unused u=unassigned time slot framing bits frame respectively.
Figure-5 G.802 Mapping Mode Spaced Mapping this mode, mapping makes every fourth time slot unassigned (i.e., 28). Refer Figure-6. Suppose time slot mapped time slot have y=x+int((x-1)/3), where
Frame 1.5M Stream
int(n) largest integer greater than framing assigned first TS0. This distribution unassigned time slots averages idle time slots optimizes framer's slip buffer's usage.
Frame
Stream
X=unused bits u=unassigned time slot framing bits frame respectively. Mapping rule: time slot mapped time slot x+int(x/3). Here int(n) largest integer greater than
Figure-6 Spaced Mapping Mode
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
ISDN Mode ISDN mode corresponds time slots transmit data, that data transmitted during framing time slot Therefore, only time slots considered useful mapped while time slot framing meaningless mapped. Normal Mode this mode, data transmitted during framing while other time slots used. 3.2.1.3 Mode5~Mode6 these modes, transmit/receive data rate channelized, line interface timing clock 1.544 clock). ISDN mode normal mode defined ISDN Mode Normal Mode page these modes, clock either common clock independent clock. common clock used, TSCCK RSCCK used clock clock respectively, TSCFS RSCFS used common frame pulse directions respectively. independent clock used, TSCK[i] RSCK[i] used clock clock respectively, TSF[i] RSF[i] used frame pulse directions respectively. 3.2.1.4 Mode7~Mode10 these modes, only TSCCK RSCCK used input 8.192 clock directions respectively, TSCFS RSCFS used common frame pulse directions respectively. TSCK[i], TSF[i], RSCK[i] RSF[i] pins used should connected ground. unused pins should also connected ground. data pins used multiplexing shown table below: Table-3 Pins Used Multi-Rate Multiplex Mode
Name TSD[1] TSD[2] Name RSD[1] RSD[2] Multiplexed Channel channel 1~channel channel 5~channel
2Mbps stream 2Mbps stream 2Mbps stream 2Mbps stream 8Mbps stream Byte0 Byte0 Byte0 Byte0 Byte1 Byte1 Byte1 Byte1 Byte2 Byte2 Byte2 Byte2
Figure-7 Multiplexing Four Streams into Stream Multi-Rate Mode Since there mapping methods that used described G.802 Mapping Spaced Mapping page modes derived when multiplexing further used. Again, ISDN data mode normal mode applied, thus have more modes: mode7~mode10. 3.2.1.5 Mode11 this mode, transmit receive data viewed continuous 2.048Mb/s serial stream. There concept time slot unchannelized link. Each eight bits grouped into octet. Whether byte alignment dependent TSCFS signal. first received/transmitted most significant octet while last least significant bit. 2.048 data stream clock provided system. this mode, clock either common clock independent clock. common clock used, TSCCK RSCCK used clock clock respectively. independent clock used, clock i-th link comes from TSCK[i] RSCK[i] directions respectively. Common Clock Mode, TSCFS signal used byte alignment pulse transmitted stream while Independent Clock Mode, TSF[i] signal used byte alignment pulse i-th transmit link. frequency TSF[i] TSCSF) result TSCK[i] TSCCK) divided pulse width this signal cycle TSCK[i] TSCCK signal. 3.2.1.6 Mode12~Mode13 These modes non-multi-rate combined with different signalling modes. non-multi-rate channelized generic interface, i.e., 2.048 channel divided into sub-channels (also called time slots), these sub-channels used exchange data. these modes, clock either common clock independent clock. common clock used, TSCCK RSCCK used clock clock respectively, TSCFS RSCFS used common frame pulse directions respectively. independent clock used, TSCK[i] RSCK[i] used clock clock respectively, TSF[i] RSF[i] used frame pulse directions respectively.
Multi-rate Multi-rate used multiplexing four streams into highspeed stream. Figure-7 shows four 2.048 streams multiplexed into single 8.192 stream through data pin. multiplexing uses round-robin technology. system provides 8.192 common clock 8KHz common frame pulse. channel, before multiplexing, mapping from each frame frame first done. Then mapped channels multiplexed into 8.192 stream Figure-7 shows.
IDT82V2608 INTERFACE
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IDT82V2608
Inverse Multiplexing A
Channelized Non-Multi-Rate this mode, system provides 2.048 clock 8KHz frame pulse stream exchange between IDT82V2608 line interface. time slot used data exchange while time slot used data exchange, depending Signalling Non-Signalling mode. Signalling Non-Signalling signalling mode, time slot time slot used data exchange between IDT82V2608 line interface. nonsignalling mode, only time slot used data exchange. 3.2.1.7 Mode14~Mode15 multi-rate concept defined Multi-rate page signalling non-signalling concepts defined Signalling Non-Signalling page system provides 8.192 common clock 8KHz common frame pulse. these modes, only TSCCK RSCCK pins used input 8.192 clock directions respectively, TSCFS RSCFS used common frame pulse directions respectively. TSCK[i], TSF[i], RSCK[i] RSF[i] pins used should connected ground. unused pins should also connected ground. data pins used multiplexing shown Table-3. 3.2.2 LINE INTERFACE TIMING CLOCK MODES timing clock modes selected. Common Clock Mode, other Independent Clock Mode. timing clock mode individually configured each link. mode, AddTxLink
command AddRxLink command used configure clock mode transmit receive directions respectively. mode, ConfigUNILink command used configure clock mode. link configured Common Clock Mode, TSCCK RSCCK used clock clock respectively, TSCFS RSCFS used common frame pulse directions respectively. link configured Independent Clock Mode, TSCK[i] RSCK[i] used clock clock respectively, TSF[i] RSF[i] used frame pulse directions respectively. These timing clock modes configured same time, i.e., some links work Common Clock Mode while other links work Independent Clock Mode. line interface mode7~mode10 mode14~mode15 cannot used Independent Clock Mode. 3.2.3 LINE INTERFACE LOOPBACK FUNCTION line interface supports line loopback functions, external loopback mode other internal loopback mode. loopback modes selected ConfigLoopMode command. external loopback mode, data received line side looped back transmit side transmitted out. When this function enabled, links will external loopback mode. Data will transmitted Utopia interface. internal loopback mode, data transmitted also sent receive side. When this function enabled, links will internal loopback mode. Data will transmitted Utopia interface.
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
EXTERNAL MICROPROCESSOR INTERFACE
3.3.2
COMMAND FIFOS
IDT82V2608 uses embedded controller downloaded software (IMAOS08 IMAOS08_Slave1) communicate with external microprocessor. external microprocessor sends commands configure device read feedbacks. downloaded software interprets these commands embedded controller executes these commands. This relieves programmers from accessing vast registers. Just accessing registers, programmers well-defined commands communicate with IDT82V2608. 3.3.1 EXTERNAL MICROPROCESSOR INTERFACE SELECTION IDT82V2608 supports both non-multiplexed Intel non-multiplexed Motorola microprocessor interfaces. Intel microprocessor interface, should connected VDD; Motorola microprocessor interface, should connected ground.
IMAOS08 used when device normal communication while IMAOS08_Slave used when device operates Slave Mode. Refer Group Auto Detect.
embedded controller uses FIFOs communicate with external microprocessor. Input FIFO, which used receive commands data from external microprocessor; other Output FIFO, which used send data external microprocessor. lengths these FIFOs both bytes. These FIFOs only accessed through registers. 3.3.3 REGISTERS IDT82V2608 provides registers external microprocessor load software device, send commands read feedbacks. 3.3.4 REGISTER
Table-4 Register
Address (Hex) Register INPUT_FIFO_LENGTH_REG OUTPUT_FIFO_LENGTH_R OUTPUT_FIFO_DATA_REG INPUT_FIFO_DATA_REG FIFO_INT_ENABLE_REG FIFO_STATE_REG FIFO_INT_RESET_REG OUTPUT_FIFO_INTERNAL_ STATE_REG INPUT_FIFO_INTERNAL_ST ATE_REG Input_Message_Length[4:0] Output_Message_Length[4:0] Output_Data[7:0] Input_Data[7:0] Input_FIFO_ empty_int_en Input_FIFO_ empty_state Input_FIFO_ empty_int_rst Input_FIFO_ov erflow_int_en Input_FIFO_ov erflow_state Input_FIFO_ov erflow_int_rst Output_FIFO_msg _available_int_en Output_FIFO_msg _available_state Output_FIFO_msg _available_int_rst
Output_remain_msg_length[4:0] Input_remain_msg_length[4:0]
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
3.3.5
REGISTER DESCRIPTION
(R/W, Address=00H) Symbol Position Default Reserved. These bits contain message length Input FIFO which should written after message sent Input FIFO. valid length from bytes. Description
Table-5 Input FIFO Data Length Register (INPUT_FIFO_LENGTH_REG)
Input_Message_Length[4:0]
Table-6 Output FIFO Data Length Register (OUTPUT_FIFO_LENGTH_REG)
Address=01H) Symbol Output_Message_Length[4:0] Position Default Reserved. These bits contain length message Output FIFO. Valid length from bytes. Description
Table-7 Output FIFO Data Register (OUTPUT_FIFO_DATA_REG)
Address=02H) Symbol Output_Data[7:0] Position Default Description These bits contain data from message Output FIFO. complete message retrieved continuously reading this register.
Table-8 Input FIFO Data Register (INPUT_FIFO_DATA_REG)
(R/W, Address=03H) Symbol Input_Data[7:0] Position Default Description These bits contain data sent Input FIFO. continuously writing this register, complete message sent. Before message sent, Input_FIFO_empty_state EP_interrupt status register should polled whether Input FIFO available writing. After message sent, message length should written EP_Tx_length register.
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-9 FIFO Interrupt Enable Register (FIFO_INT_ENABLE_REG)
(R/W, Address=04H) Symbol Input_FIFO_empty_int_en Position Default Reserved. Input FIFO empty interrupt enable Interrupt disabled Interrupt enabled Input FIFO overflow interrupt enable Interrupt disabled Interrupt enabled Output FIFO message available interrupt enable Interrupt disabled Interrupt enabled Description
Input_FIFO_overflow_int_en
Table-10 FIFO Interrupt Status Register (FIFO_STATE_REG)
Address=05H) Symbol Input_FIFO_empty_state(1) Position Default Reserved. Input FIFO availability status Input FIFO available writing. Input FIFO available writing. Input FIFO overflow status Input FIFO full. Input FIFO full. Output FIFO message availability status message Output FIFO. message Output FIFO. Description
Input_FIFO_overflow_state
Output_FIFO_msg_available_state
first time message sent, this Don't Care.
Table-11 FIFO Interrupt Reset Register (FIFO_INT_RESET_REG)
Address=06H) Symbol Input_FIFO_empty_int_rst Input_FIFO_overflow_int_rst Position Default Reserved. Write clear Input_FIFO_empty_state status. Write clear Input_FIFO_overflow_state status. Write clear Output_FIFO_msg_available_state status. Description
IDT82V2608 INTERFACE
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Inverse Multiplexing A
Table-12 Output FIFO Internal State Register
Address=07H) Symbol Output_remain_msg_length[4:0] Position Default Reserved. length message remaining Output FIFO read external microprocessor. Description
Table-13 Input FIFO Internal State Register (INPUT_FIFO_INTERNAL_STATE_REG)
Address=08H) Symbol Input_remain_msg_length[4:0] Position Default Reserved. length message remaining Input FIFO processed IDT82V2608. Description
3.3.6 PROCEDURE LOADING SOFTWARE SENDING COMMANDS After chip reset, IMAOS08 IMAOS08_Slave binary file shipped with chip) should loaded IDT82V2608 interpret commands. procedure loading IMAOS08 IMAOS08_Slave
same with that sending commands. Figure-8 shows Input-FIFO write process Figure-9 shows Output-FIFO read process.
Input FIFO Write Process
write_message(char *message,char Read Input_FIFO_empty_state FIFO_STATE_REG register Input_FIFO_empty_state set?
Clear Input_FIFO_empty_state
for(i=0;i<L;i++) Write L(L<=16) bytes into Input_FIFO
Write value into INPUT_FIFO_LENGTH_REG register
Figure-8 Input FIFO Write Process
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
Output FIFO Read Process
read_message(char *message,char Read Output_FIFO_msg_available_state FIFO_STATE_REG register
Output_FIFO_msg_ available_state set?
Clear Output_FIFO_msg_available_state
Read Message Length from OUTPUT_FIFO_LENGTH_REG register
Read bytes from OUTPUT_FIFO_DATA_REG register
for(i=0;i<*L;i++) message[i]
Figure-9 Output FIFO Read Process
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
SRAM INTERFACE
SRAM interface 8-bit wide data bus, EMD[7:0], 19bit wide address bus, EMA[18:0]. minimum throughput 4Mbyte/s minimum access time 40ns. When both EM_WE EM_CS low, data written external SRAM. When both EM_OE EM_CS low, data read from external SRAM.
size SRAM selected from byte Kbyte. When minimum byte memory selected, only address pins will used. Different memory size will affect different delay compensation capability. Table-14 Table-15 show memory size maximum delay tolerance unchannelized modes respectively.
Table-14 Maximum Delay Tolerance Value Different SRAM Size Unchannelized Mode
SRAM Used (Kbyte) Maximum Delay Tolerance (ms) 17.58 8.79 4.39 2.20 1.10 Address Used EMA[18:0] EMA[17:0] EMA[16:0] EMA[15:0] EMA[14:0] EMA[13:0] EMA[12:0] EMA[11:0] EMA[10:0]
Table-15 Maximum Delay Tolerance Value Different SRAM Size Unchannelized Mode
SRAM Used (Kbyte) Maximum Delay Tolerance (ms) 26.5 13.25 6.625 3.31 1.66 0.83 Address Used EMA[18:0] EMA[17:0] EMA[16:0] EMA[15:0] EMA[14:0] EMA[13:0] EMA[12:0] EMA[11:0] EMA[10:0]
IDT82V2608 INTERFACE
December 2003
IDT82V2608
Inverse Multiplexing A
FUNCTIONS1
IDT82V2608 capable combining transport bandwidth multiple links into single logical link. logical link called group. IDT82V2608 supports independent groups with each group capable supporting from links. Links that assigned group called mode while links that assigned group used mode.
Stuff Indication (LSI) field cell. stuff cell event will occur same frame links. However, pre-defined offset will determine which cell frame stuff event will occur. mode, stuff cell added same mode, that added after every 2048 ICP, filler Alayer cells. other links group, stuff cells added necessary compensate timing differences between other links group. group, least links uses independent clock clock input, stuff mode only ITC. links within group common clock (i.e., TSCCK RSCCK) their clock input, stuff mode either ITC. details about clock modes, please refer 3.2.2 Line Interface Timing Clock Modes. 4.1.4 LINK BACKUP group link backup function used link group backup case link failure. This function only enabled when device working symmetry mode. link added group specified backup link nonbackup link "AddLink" command (i.e., AddTxLink AddRxLink commands). Note that only backup link supported each group. several links specified backup links, only last added backup link regarded backup link. When link failure event occurred, IDT82V2608 will automatically pick backup link start activate link.
4.1.1
MODE
FRAME
frame defined consecutive cells, numbered from each link, across links group. generated inserting cell after every cells link. Values supported 256, which programmed links group ConfigGroupPara command. cell occurs within frame cell offset position should same position throughout frame. offset programmable per-link basis AddTxLink command. 4.1.2 (TIMING REFERENCE LINK) Within group, should selected pass synchronization from transmit receive end. selected ConfigTRLLink command. 4.1.3 STUFFING MODE insertion stuff cells compensate timing differences between links within group. There kinds stuffing method: (Common Transmit Clock) mode (Independent Transmit Clock) mode. stuffing method selected ConfigGroupWorkMode command. mode, stuff cell added after every 2048 ICP, filler Alayer cells. stuff cell generated repeating cell. Both cell stuff cell identified cells Link
MODE
ConfigDev command ConfigUNILink command used configure link. ConfigDev command used configure Work Mode, Alpha Delta value threshold. ConfigUNILink command used configure link physical Utopia port, line interface Work Mode clock mode. When link configured mode, functions bypassed. Acells simply transmitted from Utopia interface line interface.
Chapter specific IMAOS08. Details about IMAOS08_Slave provided Chapter
FUNCTIONS
December 2003
IDT82V2608
Inverse Multiplexing A
PROGRAMMING INFORMATION IMAOS08
COMMAND TYPES
There three types messages: 1.Command message (external MPUembedded controller) 2.Reply message (embedded controllerexternal MPU) 3.Notification message (embedded controllerexternal MPU) formats three types messages different.
5.1.1
COMMAND MESSAGE
byte Command Handler byte Command Type most bytes Command Parameters
Figure-10 Command Message Format Command Handler From 0~126 defined user's driver. sequence number sent message. Command Type encoding command. Refer Command Encoding. Command Parameters Parameters command. 5.1.2 COMMAND REPLY MESSAGE
byte Command Reply Handler most byte Command Replies
Figure-11 Command Reply Message Format Command Reply Handler original Command Handler plus 128. Command Replies replies original command. 5.1.3 ALARM MESSAGE
byte Alarm Handler byte Link /Group byte Alarm Type
Figure-12 Alarm Message Format Alarm Handler FFH. Link /Group link group Alarm Type sequence Table-53 Failure/Alarm Signals page
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
COMMAND ENCODING
Table-16 Command Encoding(1)
Command Encoding
Command Name ConfigDev ConfigUtopiaIF ConfigLoopMode ConfigGroupPara ConfigGroupInterFace ConfigGroupWorkMode ConfigGSMTimers ConfigTRLLink ConfigIFSMPara AddTxLink AddRxLink ConfigUNILink StartGroup StartLASR InhibitGrp NotInhibitGrp RestartGrp DeleteGrp RecoverLink DeleteLink DeactLink GetGroupState GetGroupDelayInfo GetLinkState GetGrpPerf GetLinkPerf GetConfigPara GetGrpWorkingPara GetLinkWorkingPara StartTestPattern GetLoopedTestPattern StopTestPattern GetVersionInfo
user sends value listed this table, IMAOS will unknown state.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
COMMAND DESCRIPTION
Each command description contains parts: Command Parameters Command Reply. Command Parameters part, figure used illustrate byte sequence parameters. parameters description listed below figure. Command Reply part, figure used illustrate reply sequence reply message. reply description listed below figure. detailed information about packet command message reply message, refer page Table-17 ConfigDev Command (Encoding: 01H)
This first command issued. this command issued, default value will used. Command Parameters SysClk Texit TCWorkMode TCAlpha&Delta TCLCD_Threshold
Byte Sequence
Parameter Name SysClk
Default 4E20H
Description SysClk=Frequency System Clock (Hz)/1000. example, system clock MHz, this value would 20000. Unit: sys-ticks (MSB first) Note: Wrong configuration will make IMAOS's timer work improperly. Timer entering failure alarm state. When defect persists period this timer, IDT82V2608 will enter failure alarm state. Unit: Timer exiting failure alarm state. defect longer exists period this timer, IDT82V2608 will exit failure alarm state. Unit: Reserved. Write this field. Position Don't Care Enable scrambling (default); Disable scrambling Enable error correct control (default); Disable error correct control Enable de-scrambling (default); Disable de-scrambling Description
Texit
TCWorkMode
TCAlpha&Delta
Position Description Delta value. Valid 0~15. Alpha value. Valid 0~15.
Alpha value number consecutive incorrect fields cell synchronization state machine exit sync state. Delta value number consecutive correct fields cell synchronization state machine enter sync state.
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December 2003
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Inverse Multiplexing A
Table-17 ConfigDev Command (Encoding: 01H) (Continued)
TCLCD_Threshold 0~255 threshold. anomaly persists time this parameter, defect will reported. Unit: cell's transmission time
Command Reply
Byte Sequence
Reply Name
Description Invalid parameter (length command incorrect); Others: Internal error. chip should reset.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-18 ConfigUtopiaIF Command (Encoding: 03H)
Command Parameters Utopia port enable Utopia port enable
Byte Sequence
Parameter Name Utopia port enable
Default
Description
00000000H Every bytes enables Utopia port (MSB byte first, byte last). Disable port; Enable port This bytes parameter enables disables each Utopia port (port reserved should used). bytes regarded sequence bits. most significant byte (the first byte sent embedded controller) least significant byte (the last byte sent)
Utopia port enable
00000000H Every bytes enables Utopia port (MSB byte first, byte last). Disable port; Enable port meaning this parameter similar Utopia port enable field. above.
Command Reply
Byte Sequence
Reply Name
Description Invalid parameter (length command incorrect); Others: Internal error. chip should reset.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-19 ConfigLoopMode Command (Encoding: 04H)
Command Parameters Loop mode
Byte Sequence
Parameter Name Loop mode
Default
Description Disable loopback functions; Enable line interface internal loopback mode; Enable line interface external loopback mode; Enable Utopia loopback mode; Others: same
Command Reply
Byte Sequence
Reply Name
Description Invalid parameter (length command incorrect); Others: Internal error. chip should reset.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-20 ConfigGroupPara Command (Encoding: 05H)
This first command configure physical group. Other configuration commands prior this command would make group work improperly. Command Parameters Group (Mtx) Acceptable (Mrx) delay compensation value Version Backward Compatibility
Byte Sequence
Parameter Name Group
Default (Not Available) physical group (0~3)
Description
This physical identification group. Each Group unique IDT82V2608 should equal Channel that been assigned link. There altogether physical groups. This group value from 0~3. should noted that this Group same which used identify logical group value from 0~255. 0~255 This logical physical group, which packaged cells sent indicate which group link belongs
(Mtx)
(default); 128; This frame length that this group will transmit end. There altogether frame lengths that selected: 256. Note: must right, otherwise IMAOS will work improperly.
Acceptable (Mrx)
Meaning Accept M=256 accept M=256 Accept M=128 accept M=128 Accept M=64 accept M=64 Accept M=32 accept M=32 This acceptable frame length receive end. Note: must right, otherwise IMAOS will work improperly.
delay compensation value
0~1024 cells This maximum cells delay that tolerated. This value constrained size external SRAM shall more than 1024 cells. Refer SRAM Interface. Note: value exceeds 1024, IMAOS will work improperly.
Version Backward Compatibility
Version backward compatibility indicates whether version supported when FE's group using 1.0. default, chip works version does support backward compatibility.
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IDT82V2608
Inverse Multiplexing A
Table-20 ConfigGroupPara Command (Encoding: 05H) (Continued)
minimum number active links move operational state. This implies that links configured should less than this number. Note: this value larger than link numbers that will added later, this group's state machine will stop Insufficient-Link state. minimum number active links move operational state. This implies that links configured should less than this number. SCSO mode, equal Prx, used Prx. Note: this value larger than link numbers that will added later, this group's state machine will stop Insufficient-Link state. Command Reply
Byte Sequence
Reply Name Invalid parameter; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-21 ConfigGroupInterFace Command (Encoding: 06H)
This command should follow ConfigGroupPara command. Command Parameters Group Utopia port Utopia port
Byte Sequence
Parameter Name Group Utopia port
Default
Description physical group (0~3). This same Group ConfigGroupPara command. 0~30 Utopia port address data transmit. Port reserved should used. Note: upper bits Don't Care.
Utopia port
0~30 Utopia port address data receive. Port reserved should used. Note: upper bits Don't Care.
Command Reply
Byte Sequence
Reply Name
Description Invalid parameter; physical group configurable (should issue ConfigGroupPara command first); Others: Internal error. chip should reset.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-22 ConfigGroupWorkMode Command (Encoding: 07H)
This should third command issued configure group, i.e., this command should follow ConfigGroupInterface command. Command Parameters Group Symmetry mode Stuff mode Stuff mode
Byte Sequence
Parameter Name Group Symmetry mode
Default
Description physical group (0~3). This same Group ConfigGroupPara command. SCSO (Symmetrical Configuration Symmetrical Operation); SCAO (Symmetrical Configuration Asymmetrical Operation); ACAO (Asymmetrical Configuration Asymmetrical Operation) Note: Value exceeds will regarded
Stuff mode
(Independent Transmit Clock stuff insertion); (Common Transmit Clock stuff insertion) least links uses independent clock clock input, stuff mode only ITC. links within group common clock (i.e., TSCCK RSCCK) their clock input, stuff mode either ITC. Note: Wrong configuration will lead wrong cells.
Stuff mode
Pre-notify stuff event frame ahead; Pre-notify stuff event frames ahead. stuff cell indication. tells distance (unit frame) between current cell forthcoming stuff cell. Note: upper bits Don't Care.
Command Reply
Byte Sequence
Reply Name Invalid parameter; physical group configurable; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-23 ConfigGSMTimers Command (Encoding: 08H)
Command Parameters Group Timer startup Timer Configure Abort Timer report Rx=Active Timer report Tx=Active
Byte Sequence
Parameter Name Group Timer start-up
Default
Description physical group (0~3). This same Group ConfigGroupPara command. 1~255 Unit: This timer will start when enters start-up state. there response from after period this timer, will return from start-up start-up state. sent, will interpreted 1*250 embedded controller.
Timer Configure Abort
1~255 Unit: This timer will start when enters start-up Abort state. After period this timer, will return start-up state. sent, will interpreted 1*250 embedded controller.
Timer report Rx=Active
1~255 Unit: This timer will start when links reported Usable. either configured links being reported Tx=Usable timer expires, links will brought Active state. sent, will interpreted 1*250 embedded controller.
Timer report Tx=Active
1~255 Unit: This timer will start when links reported Usable. either configured links being reported Rx=Active timer expires, links will brought Active state. sent, will interpreted 1*250 embedded controller.
Command Reply
Byte Sequence
Reply Name Invalid parameter; physical group configurable; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-24 ConfigTRLLink Command (Encoding: 09H)
Command Parameters Group TxTRL
Byte Sequence
Parameter Name Group TxTRL
Default
Description physical group (0~3). This same Group ConfigGroupPara command. link selected this group. Data TSD1 deemed data link Data TSD2 deemed data link This link should have been added group, otherwise group will fail start link been configured previously, this command used change link.
Command Reply
Byte Sequence
Reply Name Invalid parameter; physical group configurable; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-25 ConfigIFSMPara Command (Encoding: 0AH)
Command Parameters Group Alpha&Beta&Gamma
Byte Sequence
Parameter Name Group Alpha&Beta&Gam
Default
Description physical group (0~3). This same Group ConfigGroupPara command. Meaning Alpha value. Default Beta value. Default Gamma value. Default
Alpha value number consecutive invalid cells IFSM state machine exit SYNC state. Beta number consecutive errored cells IFSM state machine exit SYNC state. Gamma number consecutive valid cells IFSM state machine enter SYNC state. Command Reply
Byte Sequence
Reply Name Invalid parameter; physical group configurable; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-26 AddTxLink Command (Encoding: 0BH)
Command Parameters Group link physical line interface Work Mode line interface clock link logical link offset Backup function
Byte Sequence
Parameter Name Group link physical
Default
Description physical group (0~3). This same Group ConfigGroupPara command. link that will configured this group. Data TSD1 deemed data link Data TSD2 deemed data link Note: Value exceeds will lead IMAOS crash. Mode0~Mode15 Line interface Work Mode this link. Note: value exceeds IMAOS will work improperly.
line interface Work Mode
line interface clock
Common Clock Mode; Independent Clock Mode Line interface clock input mode. line interface mode7~mode10 mode14~mode15 cannot used Independent Clock Mode. Note: IMAOS does check this value. Value exceeds will cause wrong configuration.
link logical
0~31 logical link designated that physical link. used cell. Note: IMAOS does check this value. this value wrong, IMAOS will work improperly.
link offset
offset over that link cell offset frame that link. This value should smaller than frame length. Note: this value wrong, IMAOS will work improperly.
Backup function
Whether this backup link not. When other links failed, this link will automatically added group. Note1: Only backup link supported each group. several links specified backup links, only last added backup link regarded backup link. Note2: backup link added after StartGroup StartLASR command, StartLASR command should issued make this backup link take effect.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-26 AddTxLink Command (Encoding: 0BH) (Continued)
Command Reply
Byte Sequence
Reply Name Invalid parameter; physical group configurable; physical link used other groups; offset larger than Link logical used other links this group; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-27 AddRxLink Command (Encoding: 0CH)
Command Parameters Group link physical line interface Work Mode line interface clock Backup function
Byte Sequence
Parameter Name Group link physical
Default
Description physical group (0~3). This same Group ConfigGroupPara command. link that will configured this group. Data RSD1 deemed data link Data RSD2 deemed data link Note: value exceeds performance cannot guaranteed. Mode0~mode15 Line interface Work Mode this link. Note: value exceeds performance cannot guaranteed.
line interface Work Mode
line interface clock
Common Clock Mode; Independent Clock Mode Line interface clock input mode. line interface mode7~mode10 mode14~mode15 cannot used Independent Clock Mode. Note: IMAOS does check this value. Value exceeds will cause wrong configuration.
Backup function
Whether this backup link not. When other links fail, this link will automatically added group. Note: Only backup link supported each group. several links specified backup links, only last added backup link regarded backup link.
Command Reply
Byte Sequence
Reply Name Invalid parameter; physical group configurable; physical link used other groups; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-28 ConfigUNILink Command (Encoding: 0DH)
Command Parameters Channel Link physical Utopia Port Utopia Port link line interface Work Mode link line interface clock
Byte Sequence
Parameter Name Channel
Default
Description internally used channel this link. Each Channel unique should equal Group that been assigned. recommended that Channel used from down Group from better Channel from unless values from taken. physical link used mode. Note: value exceeds performance cannot guaranteed.
Link physical
Utopia Port
0~30 Utopia port address data transmit. Port reserved should used. Note: upper bits Don't Care.
Utopia Port
0~30 Utopia port address data receive. Port reserved should used. Note: upper bits Don't Care.
link line interface Work Mode
Mode0~mode15 Line interface Work Mode this link. Note: value exceeds IMAOS will work improperly.
link line interface clock
Common Clock Mode; Independent Clock Mode Line interface clock input mode. line interface mode7~mode10 mode14~mode15 cannot used Independent Clock Mode. Note: IMAOS does check this value. Value exceeds will cause wrong configuration.
Command Reply
Byte Sequence
Reply Name link busy Channel over Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-29 StartGroup Command (Encoding: 0EH)
This command used start configured group. Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group
Default
Description valid physical group that been configured. This same Group ConfigGroupPara command.
Byte Sequence
Reply Name Acknowledge; Invalid parameter; group configured; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-30 StartLASR Command (Encoding: 0FH)
This command used start LASR procedure more links. links here links links with failure/fault/inhibiting condition. This command combine with AddTxLink AddRxLink commands. Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group
Default
Description physical group (0~3). Valid physical group that been configured OPERATIONAL state.
Byte Sequence
Reply Name Acknowledge; Invalid parameter; group configured; Previous LASR finished; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-31 InhibitGrp Command (Encoding: 10H)
This command used inhibit group. Once group inhibited this command, will BLOCKED state instead OPERATIONAL state when sufficient links exist group. group already OPERATIONAL state, will transition BLOCKED state. Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group
Default physical group (0~3). physical group inhibited.
Description
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-32 NotInhibitGrp Command (Encoding: 11H)
This command used clear inhibiting status. group BLOCKED state, will OPERATIONAL state. Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group
Default physical group (0~3). physical group uninhibited.
Description
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-33 RestartGrp Command (Encoding: 12H)
This command used restart specified group. will back Start-up state links will back Unusable state. Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group
Default physical group (0~3). physical group restarted.
Description
Byte Sequence
Reply Name Acknowledge; Invalid parameter; group configured; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-34 DeleteGrp Command (Encoding: 13H)
This command used delete specified group links once. Upon issue this command, will back Configured state links will transition Group state. Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group
Default physical group (0~3). physical group deleted.
Description
Byte Sequence
Reply Name
Description Acknowledge; Invalid parameter (length command incorrect Group over Others: Internal error. chip should reset.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-35 RecoverLink Command (Encoding: 14H)
This command used tell IDT82V2608 that link longer fault state cancel inhibition made "DeactLink" command. This command should combine with "StartLASR" command order recover link physically. Command Parameters Group Link physical Direction
Byte Sequence
Parameter Name Group Link physical Direction
Default
Description physical group (0~3). physical group that contains link recovered this command. physical link recovered. link should belong group, previously deactivated. Both Note1: group symmetry mode, both links should recovered; Note2: value exceeds IMAOS will work improperly.
Command Reply
Byte Sequence
Reply Name Invalid parameter; link does belong that group; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-36 DeleteLink Command (Encoding: 15H)
This command used delete link from group. Command Parameters Group /Channel Link physical Direction
Byte Sequence
Parameter Name Group /Channel Link physical Direction
Default
Description physical group (0~3) Channel (0~7). physical group that contains link deleted Channel link deleted. Physical link deleted. link should belong group. Both Note1: group symmetry mode, both directions deleted direction value ignored. link, this parameter ignored. Note2: value exceeds IMAOS will work improperly.
Command Reply
Byte Sequence
Reply Name Acknowledge; Invalid parameter; link does belong that group; Others: Internal error. chip should reset.
Description
After link both ends deleted, link mode, which default Work Mode link. "GetLinkState" command used poll link state.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-37 DeactLink Command (Encoding: 16H)
This command make link Unusable state user defined fault condition that user just wants inhibit Command Parameters Group Link physical Reason Direction
Byte Sequence
Parameter Name Group Link physical
Default
Description physical group (0~3) physical group that contains link deactivated this command. Physical link deactivated. link should belong group. Note: value exceeds performance cannot guaranteed. Inhibition; Fault Both Note1: group symmetry mode, both directions deactivated direction value ignored. Note2: value exceeds IMAOS will work improperly.
Reason Direction
Command Reply
Byte Sequence
Reply Name Acknowledge; Invalid parameter; link does belong that group; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-38 GetGroupState Command (Encoding: 17H)
Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group physical group (0~3).
Description
NEGSMState
FEGSMState
NEGTSMState
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Information available; Others: Internal error. chip should reset.
Description
Note: equal values following fields will returned. NEGSMState Bits 3:0: Group State 0000: Start-up; 0001: Start-up-Ack; 0010: Config-Aborted Unsupported 0011: Config-Aborted Incompatible Group Symmetry; 0100: Config-Aborted Unsupported Version; 0101, 0110: Reserved other Config-Aborted reasons future version specification; 0111: Config-Aborted Other reasons; 1000: Insufficient-Links; 1001: Blocked; 1010: Operational; Others: Reserved later future version specification. Bits 3:0: Group State 0000: Start-up; 0001: Start-up-Ack; 0010: Config-Aborted Unsupported 0011: Config-Aborted Incompatible Group Symmetry; 0100: Config-Aborted Unsupported Version; 0101, 0110: Reserved other Config-Aborted reasons future version specification; 0111: Config-Aborted Other reasons; 1000: Insufficient-Links; 1001: Blocked; 1010: Operational; Others: Reserved later future version specification. GTSM down; GTSM GTSM state.
FEGSMState
NEGTSMState
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-39 GetGroupDelayInfo Command (Encoding: 18H)
Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group physical group (0~3).
Description
MaxDiffDelayOfGroupLinks
Byte Sequence
Reply Name Acknowledge; Invalid parameter; info available; Others: Internal error. chip should reset.
Description
Note: equal value following field will returned. MaxDiffDelayOfGroupLinks (cells) maximum delay value between links that group. (MSB byte first)
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-40 GetLinkState Command (Encoding: 19H)
Command Parameters Physical link
Byte Sequence Command Reply
Parameter Name Physical link physical link.
Description
NERxState
NETxState
FERxState
FETxState
State
SYNC State
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Others: Internal error. chip should reset.
Description
Note1: link, only State value meaningful. Other values meaningless. Note2: equal values following fields will returned. NERxState 0x00: group; 0x01: Unusable-No-reason; 0x02: Unusable-Fault; 0x03: Unusable-Misconnected; 0x04: Unusable-Inhibited; 0x05: Unusable-Failed; 0x06: Usable; 0x07: Active. State. NETxState same above. State. FERxState same above. State. FETxState same above. State. State sync; sync. Other bits: Don't Care Bit5: sync state; sync state. Other bits: Don't Care Bit2:
Sync State
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-41 GetGrpPerf Command (Encoding: 1AH)
Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group physical group (0~3).
Description
Value
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Info available; Others: Internal error. chip should reset.
Description
Note: equal value following field will returned. Value value GR-UAS-IMA (For detailed definition, refer Table-51) (MSB byte first) equal value IMAGrpUnavaiSec will returned. performance parameter retrieved after long period, might reach maximum value. this case, value held. value will
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-42 GetLinkPerf Command (Encoding: 1BH)
Command Parameters Physical link Type
Byte Sequence
Parameter Name Physical link Type physical link.
Description
performance types (For detailed description these performance types, please refer Table-51): Performance Type Parameters SES-IMA SES-IMA-FE UAS-IMA UAS-IMA-FE Tx-UUS-IMA Rx-UUS-IMA Tx-UUS-IMA-FE Rx-UUS-IMA-FE OCD_TC HCS_ERR_TC IV-IMA Rx-Stuff-IMA Tx-Stuff-IMA OIF-IMA
Command Reply 2-10 Value
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Info available; Others: Internal error. chip should reset.
Description
Note: equal value following field will returned.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-42 GetLinkPerf Command (Encoding: 1BH) (Continued)
2-10 Value counter value performance parameter according Type (MSB first). returned value occupies bytes. Different parameters take different number bytes. Performance Type Parameters SES-IMA SES-IMA-FE UAS-IMA UAS-IMA-FE Tx-UUS-IMA Rx-UUS-IMA Tx-UUS-IMA-FE Rx-UUS-IMA-FE OCD_TC HCS_ERR_TC IV-IMA Rx-Stuff-IMA Tx-Stuff-IMA OIF-IMA Bytes
Note: performance parameters retrieved after long period, they might reach maximum value. this case, values held.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-43 GetConfigPara Command (Encoding: 1CH)
This command used parameters shown parameter list command (designated Command ID), i.e., configured information default information command's parameter list designated. Command Parameters Command Group
Byte Sequence
Parameter Name Command command encoding commands below: ConfigDev ConfigUTOPIAIF ConfigLoopMode ConfigGroupPara ConfigGroupInterface ConfigGroupWorkMode ConfigGSMTimers ConfigTRL ConfigIFSMpara
Description
Note: value from above, IMAOS will crash. Group group Command "ConfigDev", don't care this parameter, that value will do.) command (such ConfigDev command) GroupID parameter, this field should will ignored embedded controller. Command Reply Command sent before Group sent before 4-12 Parameter sent before
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Info available; Others: Internal error. chip should reset.
Description
Note1: equal values following fields will returned. Note2: this command equal command sent before equal values following fields undetermined. 4-12 Command sent before Group sent before Parameter sent before command sent before. Group sent before. ConfigDev command, this byte meaning. This field contains parameters that were sent previously excluding Group returned byte length this field depends Command sequence same input.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-44 GetGrpWorkingPara Command (Encoding: 1DH)
Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group physical group (0~3).
Description
Version used
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Info available; Others: Internal error. chip should reset.
Description
Note: equal values following fields will returned. Version used cell transmitted from cell that received from frame length using. frame length using. Both ends 1.1; compatible. physical link used TRL. physical link used TRL.
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-45 GetLinkWorkingPara Command (Encoding: 1EH)
Command Parameters Physical link
Byte Sequence Command Reply
Parameter Name Physical link 0~7. physical link.
Description
Mode
Group /UNI mode Utopia port
TxLink mode Utopia port
RxLink
offset
offset
Byte Sequence
Reply Name Acknowledge; Invalid parameter; Info available; Others: Internal error. chip should reset.
Description
Note: equal values following fields will returned. Mode UNI; mode Both used; mode Only used; mode Only used Mode IMA, this value means which physical group link belongs mode UNI, this value Utopia port address. Mode IMA, this value means logical link assigned (0~31), mode UNI, this value Utopia port address. logical link using. 0~255 mode; used mode). 0~255 mode; used mode).
Group /UNI mode Utopia port TxLink mode Utopia port RxLink offset offset
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-46 StartTestPattern Command (Encoding: 1FH)
Command Parameters Group Physical link Pattern
Byte Sequence Command Reply
Parameter Name Group Physical link Pattern physical group (0~3) physical link.
Description
0~FFH, recommended. This byte used define pattern testing purpose.
Byte Sequence
Reply Name Acknowledge; Invalid parameter; link does belong group; Others: Internal error. chip should reset.
Description
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-47 GetLoopedTestPattern Command (Encoding: 20H)
Command Parameters Group Physical link
Byte Sequence Command Reply
Parameter Name Group Physical link physical group (0~3) physical link.
Description
Pattern
Byte Sequence
Reply Name Acknowledge; Invalid parameter; link does belong group; Others: Internal error. chip should reset.
Description
Note: equal value following field will returned. Pattern looped test pattern over that link
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
Table-48 StopTestPattern Command (Encoding: 21H)
Command Parameters Group
Byte Sequence Command Reply
Parameter Name Group physical group (0~3)
Description
Byte Sequence
Reply Name Invalid parameter; Others: Internal error. chip should reset.
Description
Table-49 GetVersionInfo Command (Encoding: 22H)
Command Parameters
Command Reply SW_ver_majority SW_ver_minority
Byte Sequence
Reply Name Others: Internal error. chip should reset.
Description
Note: equal values following fields will returned. SW_ver_majority SW_ver_minority integer part version. example, current version 1.12, returned value will fractional part version. example, current version 1.12, returned value will
PROGRAMMING INFORMATION IMAOS08
December 2003
IDT82V2608
Inverse Multiplexing A
OPERATION
CONFIGURE GROUP
This chapter brief introduction group links configured, started, inhibited, deleted
INITIALIZATION
ConfigDev command first command issued initialize device. this command issued, default value will used. Table-50 Parameters Group Configuration
Parameter Name Group (Mtx) Acceptable (Mrx) delay compensation value (cells) Version Backward Compatibility TxUtopia port RxUtopia port Symmetry mode Timing clock mode Stuff mode Stuff mode Timer start Timer Configure Abort Timer report Rx=active Timer report Tx=active Alpha Beta Gamma links' physical links' logical links' physical links' line interface Work Mode links' line interface Work Mode links' line interface clock mode links' line interface Work Mode
After group configured, (IMA allocated physical group, links assigned that group other parameters needed group's proper operation set. should changed during whole life cycle group except that group restarted. Table-50 list group parameters that should configured.
Description physical group used this group. group logical ID#. frame length that would like use. frame length proposed that accept. maximum different link delay value group expected have. Whether supported Utopia address where Atraffic comes from Utopia address where Atraffic goes group link's configuration operation mode. transmission timing clock mode. SICP insertion method. stuff pre-notify mode. Valid value This timer return from start-up start-up state when there response from This timer return from start-up Abort state start-up state. This timer Group wide start-up procedure report Rx=Active state. This timer Group wide start-up procedure report Tx=Active state. transmit timing reference link. (Physical number consecutive invalid cells IFSM state machine exit SYNC state. Default value number consecutive errored cells IFSM state machine exit SYNC state. Default value number consecutive valid cells IFSM state machine enter SYNC state. Default value minimum number active links group enter operational state minimum number active links group enter operational state physical links' used transmission. logical link each link. physical links' used receiving. line interface Work Mode each link. line interface Work Mode each link. line interface clock mode each link. line interface clock mode each link.
OPERATION
December 2003
IDT82V2608
Inverse Multiplexing A
Table-50 Parameters Group Configuration (Continued)
links' offsets links' backup property links' backup property cell location within frame transmitted over each link. link added group backup link not. link added group backup link not.
START GROUP
DEACTIVATE RECOVER LINKS
group started StartGroup command. group startup, exchange their configuration parameters. When both ends accept parameters proposed other end, they enter intermediate state wait links enter active state. group then enter operational state.
Links deactivated because link fault, failure failed) inhibition while links recovered because defect longer exists inhibition cancelled. deactivation-recovering link done IDT82V2608 automatically according notification (Remote Failure Indicator cell) embedded controller (issue commands like DeactLink RecoverLink commands) link fault inhibition longer link fault inhibition.
INHIBIT GROUP/NOT INHIBIT GROUP
inhibition group shut down group reason other than insufficient links. group inhibited InhibitGrp command. group inhibition state cancelled NotInhibitGrp command.
RESTART GROUP
LINKS GROUP THAT OPERATIONAL STATE
LASR (Link Addition Slow Recovery) procedure started when links inserted links recovered from group. LASR procedure started StartLASR command.
After group started, parameters group reconfigured time, which will cause group restarted automatically. However, group also restarted RestartGrp command. When group restarted, transits Start-up state from other states except Configured state. Operational state, group blocked links inhibited before restart.
DELETE GROUP
DELETE LINKS
When group deleted from other state DeleteGrp command, enters Configured state links belonging that group will also deleted unassigned.
link removed DeleteLink command. deletion procedure initiated from both side.
OPERATION
December 2003
IDT82V2608
Inverse Multiplexing A
PMON (PERFORMANCE MONITORING)
PMON module uses counters performance monitoring failure/alarms integration. Table-51 shows performance parameters that IDT82V2608 implements. Table-53 lists failure/alarm signals sent alarm messages. Table-51 PMON Parameters
Parameter SES-IMA SES-IMA-FE UAS-IMA UAS-IMA-FE Tx-UUS-IMA Rx-UUS-IMA Tx-UUS-IMA-FE Rx-UUS-IMA-FE OCD_TC HCS_ERR_TC IV-IMA Link/Group Link Link Link Link Link Link Link Link Link Link Link Count Severely Errored Seconds. Count Severely Errored Seconds. Count UnAvailable Seconds. Count UnAvailable Seconds. Count Unusable seconds. Count Unusable seconds. Count UnUsable Seconds. Count UnUsable Seconds. Count link cell delineation entrances. Count Cell header sequence error. Count Violations. Three types invalid signals will cause IV-IMA. They are: Errored ICP, invalid missing ICP. (See Table-52 definitions). IV-IMA counted only during Non-SES-IMA Non-UAS-IMA period. Count received Stuff cells over link. Count transmitted Stuff cells over link. Count Frame anomalies except during SES-IMA UAS-IMA conditions. Count Seconds when GTSM down. GetGrpPerf command GetLinkPerf command Definition Retrieve
Rx-Stuff-IMA Tx-Stuff-IMA OIF-IMA GR-UAS-IMA
Link Link Link Group
Table-52 Definitions Different Cells
Cell Type Errored Invalid Definition Cell with CRC-10 error expected frame position Missing cell. Cell with good CRC-10 CID=ICP expected frame position with following unexpected errors: Unexpected label Unexpected Unexpected Received expected Unexpected frame sequence number Unexpected cell offset Cell located cell location with: error without cell header error with cell header ICP.
Missing
PMON (Performance Monitoring)
December 2003
IDT82V2608
Inverse Multiplexing A
Table-53 Failure/Alarm Signals
Sequence LODS RFI-IMA Tx-Unusable-FE Rx-Unusable-FE Start-up-FE Config-Aborted Config-Aborted-FE Insufficient-Links Insufficient-Links-FE Blocked-FE GR-Timing-Mismatch Name Link /Group Link Link Group wide Link specific Link Link Link Group Group Group Group Group Group Group Implement Loss Cell Delineation. Loss Frame. Link Delay Synchronization. Persistence RDI-IMA defect When reports Tx-Unusable. When reports Rx-Unusable. When starting-up (the declaration this failure alarm delayed ensure remains Start-up). When tries unacceptable configuration parameters. When reports unacceptable configuration parameters. When less than transmit receive links Active. When reports that less than transmit receive links Active. When reports that blocked. When transmit clock mode different from transmit clock mode. Definition
PMON (Performance Monitoring)
December 2003
IDT82V2608
Inverse Multiplexing A
IMAOS08_SLAVE
previous chapters specific IMAOS08. Details about IMAOS08_Slave provided this chapter. When IMAOS08_Slave downloaded, device supports Group Auto Detect function operates Slave Mode.
PROGRAMMING INFORMATION IMAOS08_SLAVE
8.2.1 8.2.2 COMMAND TYPES COMMAND ENCODING Refer Command Types.
GROUP AUTO DETECT
group auto detect function used configure start group from while forcing other end's group follow this end's group configuration start-up procedure, that other end's group brought into operational state automatically. ends called Master Side Slave Side separately. 8.1.1 MASTER SIDE Master Side should download IMAOS08 work symmetry mode. groups started Master side. configuration Master Side same that normal Work Mode. 8.1.2 SLAVE SIDE Slave Side should download IMAOS08_Slave. After power-on reset, Slave Side should initialized issuing DeviceInitial, ConfigSlaveFrame, ConfigUtopiaIF GroupInitial commands. Only after Slave Side been initialized will Slave Side start detect end's start-up procedure. After started Slave Side will brought into operational state automatically without need local group configuration management.
Table-54 Command Encoding
Command Encoding Command Name DeviceInitial ConfigSlaveFrame ConfigUtopiaIF GetVersionInfo GroupInitial
8.2.3
COMMAND DESCRIPTION
Each command description contains parts: Command Parameters Command Reply. Command Parameters part, figure used illustrate byte sequence parameters. parameters description listed below figure. Command Reply part, figure used illustrate reply sequence reply message. reply description listed below figure. detailed information about packet command message reply message, refer page
IMAOS08_SLAVE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-55 DeviceInitial Command (Encoding: 01H)
This first command issued. this command issued, default value will used. Command Parameters SysClk Texit TCWorkMode TCAlpha&Delta TCLCD_Threshold
Byte Sequence
Parameter Name SysClk
Default 4E20H
Description SysClk=Frequency System Clock (Hz)/1000. example, system clock MHz, this value would 20000. Unit: sys-ticks (MSB first) Note: Wrong configuration will make IMAOS_Slave's timer work improperly.
Timer entering failure alarm state. When defect persists period this timer, IDT82V2608 will enter failure alarm state. Unit: Timer exiting failure alarm state. defect longer exists period this timer, IDT82V2608 will exit failure alarm state. Unit: Reserved. Write this field. Position Don't Care Enable scrambling (default); Disable scrambling Enable error correct control (default); Disable error correct control Enable de-scrambling (default); Disable de-scrambling Description
Texit
TCWorkMode
TCAlpha&Delta
Position Description Delta value. Valid 0~15. Alpha value. Valid 0~15.
Alpha value number consecutive incorrect fields cell synchronization state machine exit sync state. Delta value number consecutive correct fields cell synchronization state machine enter sync state. TCLCD_Threshold 0~255 threshold. anomaly persists time this parameter, defect will reported. Unit: cell's transmission time
IMAOS08_SLAVE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-55 DeviceInitial Command (Encoding: 01H) (Continued)
Command Reply
Byte Sequence
Reply Name
Description Invalid parameter (length command incorrect); Others: Internal error. chip should reset.
IMAOS08_SLAVE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-56 ConfigSlaveFrame Command (Encoding: 02H)
Command Parameters line interface Work Mode line interface clock mode
Byte Sequence
Parameter Name line interface Work Mode line interface clock mode
Default Mode0~mode15 Line interface Work Mode links.
Description
Common Clock Mode; Independent Clock Mode Line interface clock input mode links. Line interface mode7~mode10 mode14~mode15 cannot used Independent Clock Mode.
Command Reply
Byte Sequence
Reply Name
Description Invalid parameter (length command incorrect). Others: Internal error. chip should reset.
IMAOS08_SLAVE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-57 ConfigUtopiaIF Command (Encoding: 03H)
Command Parameters Utopia port enable Utopia port enable
Byte Sequence
Parameter Name Utopia port enable
Default
Description
00000000H Every bytes enables Utopia port (MSB byte first, byte last). Disable port; Enable port This bytes parameter enables disables each Utopia port (port reserved should used). bytes regarded sequence bits. most significant byte (the first byte sent embedded controller) least significant byte (the last byte sent)
Utopia port enable
00000000H Every bytes enables Utopia port (MSB byte first, byte last). Disable port; Enable port meaning this parameter similar Utopia port enable field. above.
Command Reply
Byte Sequence
Reply Name
Description Invalid parameter (length command incorrect); Others: Internal error. chip should reset.
IMAOS08_SLAVE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-58 GetVersionInfo Command (Encoding: 22H)
Command Parameters
Command Reply SW_ver_majority SW_ver_minority
Byte Sequence
Reply Name Others: Internal error. chip should reset.
Description
Note: equal values following fields will returned.
IMAOS08,
SW_ver_majority
integer part version. example, current version 2.12, returned value will fractional part version. example, current version 2.12, returned value will
SW_ver_minority
returned value number. IMAOS08_Slave, returned value even number.
IMAOS08_SLAVE
December 2003
IDT82V2608
Inverse Multiplexing A
Table-59 GroupInitial Command (Encoding: 23H)
Command Parameters Group Utopia port Utopia port delay compensation value
Byte Sequence
Parameter Name Group
Default
Description physical group (0~3). Group follows Master Side. Note that Master Side should exceed 0~30 Utopia port address data transmit. Port reserved should used. Note: upper bits Don't Care.
Utopia port
Utopia port
0~30 Utopia port address data receive. Port reserved should used. Note: upper bits Don't Care.
delay compensation value
0~1024 cells This maximum cells delay that tolerated. This value constrained size external SRAM shall more than 1024 cells. Refer SRAM Interface. Note: value exceeds 1024, IMAOS_Slave will work improperly.
Command Reply
Byte Sequence
Reply Name Invalid parameter; Others: Internal error. chip should reset.
Description
IMAOS08_SLAVE
December 2003
IDT82V2608
Inverse Multiplexing A
JTAG TEST ACCESS PORT
SIGNALS
signal that resets flip-flops asynchronously.
INSTRUCTIONS
interface from board on-chip Test Access Port bus, which consists five signals: standard bus: TDI, TDO, TCK, TMS. TRST: Test reset. Reset controller. signal specified optional IEEE spec. TRST active
Meet IEEE standard [13] which requires least EXTEST, BYPASS, IDCODE SAMPLE instructions implemented. IDT82V2608 identification code 004B8067 hexadecimal.
JTAG TEST ACCESS PORT
December 2003
IDT82V2608
Inverse Multiplexing A
PHYSICAL ELECTRICAL CHARACTERISTICS
10.1 ABSOLUTE MAXIMUM RATINGS
Table-60 Absolute Maximum Ratings
Parameter Storage temperature Voltage with reference Voltage input Voltage output Maximum lead temperature soldering during Performance (HBM) Latch-up current Maximum junction temperature 2000V 100mA 150°C -65°C -0.3V -0.3V -0.3V +150°C 4.6V 5.25V VDD+0.3V 230°C
10.2 D.C. CHARACTERISTICS
+85°C. Table-61 D.C. Characteristics
Parameter VTVTH IILPU IDDOP1
Description Core Power Supply Output Voltage Output High Voltage Input High Voltage(2) Input Voltage Input Hysteresis Voltage Input Current Input Current Input High Current Operating current
2.97
3.63 0.40
Unit
Test Conditions
VDD=min, IOL=4mA 6mA(1) VDD=min, IOH=
0.83 0.17 0.65 1.17 -200
VIL=GND VIL=GND VIH=+5V VDD=3.63V, SYSClk=25MHz
output driving capacity embedded memory output pins while output driving capacity other output pins 6mA. input pins schmitt-trigger pins.
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
10.3 A.C. CHARACTERISTICS
TA=-40 +85°C, VDD=3.3V±10% 10.3.1 OUTPUT LOADING Default load capacitance output 50pF. Microprocessor interface Utopia interface outputs loaded 100pF. 10.3.2 SYSTEM CLOCK SIGNAL TIMING Table-62 System Clock Reset Timing Parameters
Parameter tSYSCLK DSYSCLK tRST system clock cycle time system clock duty cycle pulse width Description Unit
tRST
Figure-13 Reset Signal Timing Diagram
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
10.3.3 UTOPIA INTERFACE TIMING Table-63 Utopia Interface Timing Parameters
Parameter ftxCLK frxCLK tCLAV tUTS tUTH tURCO tURS tURH
Description Utopia interface clock frequency Utopia interface clock frequency TxClav RxClav valid from rising edge TxClk RxClk respectively TxEnb, TxSOC, TxData TxAddr TxClk setup time TxEnb, TxSOC, TxData TxAddr TxClk hold time RxClav, RxSOC, RxData valid from rising edge RxClk RxAddr, RxEnb RxClk setup time RxAddr, RxEnb RxClk hold time Width pull-down pulse after TxClav RxClav deasserted.
fSYSCLK(1) fSYSCLK
Unit
SYSCLK frequency system clock chip uses.
tCLAV TxClk
tCLAV
TxClav tUTS TxEnb, TxSOC, TxData, TxAddr tUTH
Figure-14 Utopia Interface Timing Diagram
tURCO RxClk
RxSOC, RxData tURS RxEnb, RxAddr tCLAV RxClav tCLAV tURH
Figure-15 Utopia Interface Timing Diagram
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
10.3.4 LINE INTERFACE TIMING Table-64 Line Interface Timing Parameters
Parameter fTSCKE1 fRSCKE1 fTSCKT1 fRSCKT1 tFDCO Description TSCK, TSCCK, RSCK RSCCK clock duty cycle mode transmit direction clock frequency mode receive direction clock frequency mode transmit direction clock frequency mode receive direction clock frequency valid from TSCK TSF, TSCFS TSCK time; RSD, RSF, RSCFS RSCK time TSF, TSCFS TSCK hold time; RSD, RSF, RSCFS RSCK hold time 8.192 8.192 8.192 8.192 Unit
TSF, TSCFS
TSCK, TSCCK tFDCO bit7 bit6 bit5
Figure-16 Line Interface Transmit Timing Diagram
RSF, RSCFS
RSCK, RSCCK
bit7
bit6
bit5
Figure-17 Line Interface Receive Timing Diagram
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
10.3.5 MICROPROCESSOR INTERFACE TIMING 10.3.5.1Interface with Motorola (MPM Read Cycle Specification Table-65 Microprocessor Interface Timing Parameter Motorola Read Cycle
Symbol tRWV tRWH tADH tPRD tRecovery Read cycle time Valid read signal width available time after valid read signal falling edge hold time after valid read signal falling edge Address available time after valid read signal falling edge Address hold time after valid read signal falling edge Data propagation delay after valid read signal falling edge Read data hold time after valid read signal rising edge Recovery time from read cycle Parameter Unit
tRecovery DS+CS tRWH tRWV tADH A[x:0] tPRD READ D[7:0] Valid Data Valid Address
Figure-18 Microprocessor Interface Timing Diagram Motorola Read Cycle
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
Write Cycle Specification Table-66 Microprocessor Interface Timing Parameters Motorola Write Cycle
Symbol tRWV tRWH tDHW tRecovery Write cycle time Valid write signal width available time after valid write signal falling edge hold time after valid write signal falling edge Address available time after valid write signal falling edge Address hold time after valid write signal falling edge Data propagation delay after valid write signal falling edge Data hold time after valid write signal rising edge Recovery time from write cycle Parameter Unit
DS+CS tRWH tRWV A[x:0] Valid Address tDHW
tRecovery
Write D[7:0]
Valid Data
Figure-19 Microprocessor Interface Timing Diagram Motorola Write Cycle
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
10.3.5.2Interface with Intel (MPM Read Cycle Specification Table-67 Microprocessor Interface Timing Parameter Intel Read Cycle
Symbol tRDW tPRD tRecovery Read cycle time Valid read signal width Address available time after valid read signal falling edge Address hold time after valid read signal falling edge Data propagation delay after valid read signal falling edge Read data hold time after valid read signal rising edge Recovery time from read cycle Parameter Unit
tRecovery tRDW CS+RD A[x:0] tPRD READ D[7:0] Valid Data Valid Address
Note: should tied high
Figure-20 Microprocessor Interface Timing Diagram Intel Read Cycle
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
Write Cycle Specification Table-68 Microprocessor Interface Timing Parameters Intel Write Cycle
Symbol tWRW tDHW tRecovery Write cycle time Valid write signal width Address available time after valid write signal falling edge Address hold time after valid write signal falling edge Data available time after valid write signal falling edge Data hold time after valid write signal falling edge Recovery time from write cycle Parameter Unit
tWRW WR+CS A[x:0] Valid Address tDHW Write D[7:0] Note: should tied high Valid Data
tRecovery
Figure-21 Microprocessor Interface Timing Diagram Intel Write Cycle
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
10.3.6 SRAM INTERFACE TIMING 10.3.6.1Write Cycle Specification Table-69 SRAM Interface Write Cycle Parameters
Symbol Write cycle time Address time Address hold time Write pulse width Data valid write Data hold time Description Unit
EM_CS EM_WE Valid Data
EM_OE
Figure-22 SRAM Interface Timing Diagram Write Cycle
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
IDT82V2608
Inverse Multiplexing A
10.3.6.2Read Cycle Specification Table-70 SRAM Interface Read Cycle Parameters
Symbol tCHZ tOHZ Read cycle time Address Access time EM_CS Access time EM_OE Access time Delay from disabled EM_CS data high impedance Delay from disabled EM_OE data high impedance Description Unit
EM_CS
tCHZ
EM_OE
tOHZ
EM_WE
Valid Data
Figure-23 SRAM Interface Timing Diagram Read Cycle
PHYSICAL ELECTRICAL CHARACTERISTICS
December 2003
Glossary
Active State Anomaly Asymmetrical Configuration Asymmetrical Operation
link state indicating that link ready transmitting receiving Acells specified direction, either Each direction enter active state asynchronously. Discrepancy between actual desired characteristic item. anomaly affect item perform required function. Application Programming Interface This configuration scheme. this configuration mode, physical links that assigned group required configured both directions. That some physical links configured both directions while others only direction Rx). This Atraffic transfer mode group. this mode, physical link used transfer data direction does care other direction's state. That when state state have both entered active state, starts transfer data starts receive. this case, does care whether state active does care whether state active not. Asynchronous Transfer Mode Cells (Aformatted) that exchanged between Alayer sublayer. also called application data. This group state indicating that group been inhibited from transiting into OPERATIONAL state some administrative purposes. This group state indicating that group rejected group parameters proposed group. This configuration where transmit clocks physical links within group derived from same clock source. This data transfer method used deliver cells from Alayer multiple transmit links within group, data play-out method that used form consecutive cell stream from multiple receive links within group. defect caused successive anomaly item perform required function. defect lead maintenance action depending results additional analysis. Errored Seconds communication entities considered communication ends. Mostly, called Near-End (NE) other called Far-End (FE). This kind cell used layer. used fill frame when cells available Alayer. Thus filler cell used cell rate decoupling sublayer (like idle cell used layer). This state machine that determines behavior group. This state machine controls when exchange Alayer cell between Alayer layer This refers Group Start-up LASR procedures performed unit synchronize activation links within group. This used checking correctness Acell header.
AALayer Cells Blocked State Config-Aborted Common Transmit Clock (CTC) Data Round-Robin Defect (FE) Filler Cell Group State Machine (GSM) Group Traffic State Machine (GTSM) Group Wide Procedure (GWP) Header Error Check (HEC)
Glossary
December 2003
IDT82V2608 Offset Cell Stuff
Inverse Multiplexing AThe cell used frame synchronization. offset used tell receive side cell's position frame receive side make this information figure first cell frame. cell kind cell. used sublayer delineate frame. Also, conveys information about status configuration parameters each end. stuff consecutive cells offset position. stuff inserted repeating cell. purpose stuff decrease data cell rate fast links transmit side. When stuff inserted into frame, frame length will become M+1, with being frame length without stuff. This state machine used receiving frame synchronization. analogy cell delineation mechanism defined ITU-T recommendation I.432. Inverse Multiplexing AThe frame cell stream transmitted over links within group. There altogether cells frame without stuff. could 256. each frame, there cell, Alayer cells Filler cells. cells occur offset position specified cell (the offset different different links). group number links that used establish virtual link other end. link unidirectional logical link physical link's direction. link identified value field cells carried over that link. Thus physical link that connects ends consist links, from other from sublayer part Physical layer located between interface specific Transmission Convergence (TC) sublayer Alayer. This data communication channel between communication ends (two units) over number physical links; These links also called group. downloaded software used when device normal communication. downloaded software used when device operates Slave Mode. supports Group Auto Detect function. This configuration where there least link within group that transmit clock derived from clock source that different from that other links. transmitter indicate that mode even transmit clocks links derived from same source. This event indicating that link been configured into group. This represents action voluntarily disable capacity group link carry Alayer cells reasons other than reported problems. Group state indicating that group does have sufficient links Active state Operational state. This stands Link Addition Slow Recovery procedure. Loss Cell Delineation defect. defect reported when anomaly persists time specified ITU-T Recommendation I.432 [30]. defect cleared when anomaly been detected period time specified ITU-T Recommendation I.432. Link Identifier. field cell used identify link which cells transmitted. been used determine round-robin order retrieve cells from incoming links receiver. Loss Frame defect. defect occurrence persistent anomalies least frames. term "link" refers link this data sheet, unless context clearly refers physical link. link defect occurrence persistent detection anomaly Interface Specific Transmission Convergence sublayer. LOS, LOF/OOF, AIS, defects examples link defects reported Interface Specific Transmission Convergence sublayer.
Frame Synchronization Mechanism (IFSM) Frame
Group Link
Sublayer Virtual Link IMAOS08 IMAOS08_Slave Independent Transmit Clock (ITC) Group Inhibiting Insufficient-Links LASR
Link Link Defect
Glossary
December 2003
IDT82V2608 LODS Configured Group
Inverse Multiplexing ALink Delay Synchronization defect. LODS link event indicating that link synchronized with other links within group. Loss Frame Loss Signal Least Significant Link Stuff Indication Link State Machine frame size Management Information Base MicroProcessor Unit Most Significant Near-End (local end) This group state indicating that group does exist yet. This used event state indicating that link longer configured within group. Operations Maintenance Cell Delineation anomaly. specified ITU-T Recommendation I.432 [30], anomaly reported upon occurrence Alpha consecutive cells with incorrect HEC, longer reported after detecting Delta consecutive cells with correct HEC. Frame anomaly Frame Group state indicating that group sufficient links both directions carry Alayer cells. This link being used unit transmit receive Acells. unit physical links both directions. Minimum number links required active receive direction group move into Operational state. Minimum number links required active transmit direction group move into Operational state. Remote Defect Indicator Remote Failure Indicator Receive (side) Severely Errored Seconds Stuff cell. cells comprising stuff event. This repetition cell over link compensate timing difference with other links within group. This group state indicating that group waiting Start-up. This group transitional state, when both groups start-up group parameters have been accepted. This group configuration scheme. this configuration mode, physical links that assigned group required configured both directions. This Atraffic mode group. this mode, physical link used transfer data only when link's NE's FE's active state.
Operational Physical Link SICP Cell Stuff Event Start-up Start-up-Ack Symmetrical Configuration Symmetrical Operation
Glossary
December 2003
IDT82V2608 UAS-IMA
Inverse Multiplexing A
Test Access Port
Transmission Convergence Timing Reference Link. Transmit (side) UnAvailable Seconds UnAvailable Seconds IMA. Interval during which receiver declared unavailable. period unavailability begins onset continuous SES-IMA, including first seconds enter UAS-IMA condition. period unavailability ends onset continuous seconds with SES-IMA, excluding last seconds exit UAS-IMA condition. This link state indicating link fault, inhibition, etc. This link state indicating link ready operate specified direction, waiting move Active. UnUsable Seconds. Number seconds during which link state Unusable.
Unusable Usable
Glossary
December 2003
Index
A.C. characteristics absolute maximum ratings links group AddRxLink command AddTxLink command StopTestPattern command description command list their encoding Config-Aborted Config-Aborted-FE ConfigDev command ConfigGroupInterFace command ConfigGroupPara command ConfigGroupWorkMode command ConfigGSMTimers command ConfigIFSMPara command ConfigLoopMode command ConfigSlaveFrame command ConfigTRLLink command ConfigUNILink command configure group ConfigUtopiaIF command
Blocked-FE
command AddRxLink AddTxLink ConfigDev .22, ConfigGroupInterFace .10, ConfigGroupPara ConfigGroupWorkMode ConfigGSMTimers ConfigIFSMPara ConfigLoopMode .10, ConfigSlaveFrame ConfigTRLLink .22, ConfigUNILink .10, ConfigUtopiaIF .10, DeactLink .48, DeleteGrp .45, DeleteLink .47, DeviceInitial GetConfigPara GetGroupDelayInfo GetGroupState GetGrpPerf GetGrpWorkingPara GetLinkPerf GetLinkState GetLinkWorkingPara GetLoopedTestPattern GetVersionInfo .60, GroupInitial InhibitGrp .42, NotInhibitGrp .43, RecoverLink .46, Restar
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