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Chroma Processor Harris CA3126 monolithic silicon integrated circ


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CA3126
Chroma Processor
Harris CA3126 monolithic silicon integrated circuit designed chroma processing ideally suited NTSC color graphic applications that require subcarrier regeneration color burst signal.
November 1996
Features
Phase Locked Subcarrier Regeneration Utilizes Sample-and-Hold Techniques Automatic Chrominance Control (ACC)/Killer Detector Employs Sample-and-Hold Techniques Supplementary with Overload Detector Prevent Oversaturation this Picture Tube Sinusoidal Subcarrier Output Keyed Chroma Output Emitter Follower Buffered Outputs Output Impedance Linear Saturation Control
Ordering Information
PART NUMBER CA3126E CA3126M1 TEMP. RANGE (oC) PACKAGE PDIP SOIC PKG. E16.3 M20.3
Applications
TV/CATV Receiver Circuits NTSC Color Decoder/Processor Computer Graphics Subcarrier Regenerator Timing Reference Frame Grabbers Clock Timing Reference Source
Pinouts
CA3126 (PDIP) VIEW CA3126 (SOIC) VIEW
CHROMA AFPC FILTER AFPC FILTER BYPASS GROUND CARRIER
CHROMA GAIN CONT. CHROMA ZENER OVERLOAD DET.
CHROMA AFPC FILTER AFPC FILTER BYPASS
CHROMA GAIN CONT. CHROMA ZENER OVERLOAD DET. HORIZ.
GROUND ACC+ ACC9 HORIZ.
CARRIER
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. Copyright
Harris Corporation 1996
File Number
860.4
8-33
CA3126
Absolute Maximum Ratings
Supply Voltage GND) (Note 13.2V Current: Into 38mA Into Zener Reference 20mA Voltage (Horizontal Negative Rating Positive Rating
Thermal Information
Thermal Resistance (Typical, Note (oC/W) PDIP Package SOIC Package Maximum Junction Temperature (Plastic Packages) 150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (SOIC Lead Tips Only)
Operating Conditions
Temperature Range -40oC 85oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: This rating does apply when using internal zener reference conjunction with external pass transistor. measured with component mounted evaluation board free air.
Electrical Specifications
25oC, Chroma Gain Control maximum position tests except noted. Electrical specifications referenced test circuit. SWITCH POS. VCHROMA INPUT UNITS
PARAMETER
TERMINAL, MEASUREMENT SYMBOL
ELECTRICAL SPECIFICATIONS Voltage Regulator Supply Current 10.1 11.2 12.1
SWITCHING ELECTRICAL SPECIFICATIONS (Note Pull-In Range (Note Oscillator Output 100% Chroma Output Overload Detector Minimum Chroma Output (Note 200% Chroma Output Chroma Output Kill Level NOTES: Except pull-in range testing, tune oscillator trimmer capacitor free running frequency 3.579545MHz ±10Hz. Switch Position detune oscillator ±250Hz, Switch Position check oscillator pull-in. Chroma Gain Control minimum position (CCW). VTP1 (Note 0.5VP-P 0.5VP-P 0.5VP-P 0.5VP-P 1VP-P 0.1VP-P Vary ±250 VP-P VP-P VP-P mVP-P 100% Reading mVP-P
8-34
CA3126 Test Circuit
+24V
VREG
2N2102 0.05µF
3.9k CHROMA GAIN CONTROL
0.01µF 0.02µF 0.02µF
OSCILLOSCOPE
CA3126
0.01µF 2.45k CHROMA INPUT SIGNAL
0.01µF 0.1µF
0.01µF
0.01µF 0.01µF 10pF XTAL 3.579545MHz 20pF N750 33pF N750 SUBCARRIER OUTPUT
COUNTER
VARIABLE ATTENUATOR
TEST SIGNAL GENERATOR
BURST SYNC.
PULSE PULSE GENERATOR
2.5µs
63.5µs 3.579545MHz VCHROMA 0.46VCHROMA 1.0VPEAK (MIN) CENTERED BURST
numbers refer PDIP package. Chroma input signal pulse input signal
BURST
8-35
CA3126 Block Diagram
CHROMA PROCESSOR
AFPC FILTER 1.0µF BYPASS 0.01µF SIGNAL SAMPLE HOLD AFPC DET. BIAS SAMPLE HOLD 0.01µF
0.01µF CRYSTAL FILTER 20pF 33pF
10pF CARRIER OUTPUT
CONTR. BALANCED SHIFTER
AMPL.
0.01µF
SUPPLY VOLTAGE +24V
SHIFTER CHROMA INPUT 2.45k 0.01µF TERM. CHROMA INPUT FIRST CHROMA AMPL. SHIFTER
AMPL. LIMIT
INTERN. REF.
OVERLOAD DETECTOR
COUPLING NETWORK
+11.2V 0.05
2N2102 (NOTE 0.01 (NOTE
ATTENUATOR
SECOND CHROMA AMPL.
CHROMA OUTPUT
3.9k BIAS CONTROL KILLER AMPL.
CHROMA GAIN CONTROL 1.2k KILLER FILTER
ZENER REF.
DELAY BIAS SIGNAL SAMPLE HOLD DET. BIAS SAMPLE HOLD DELAY BIAS WIDTH HORIZONTAL INPUT
AMPL.
BALANCEUNBALANCE TRANSLATOR
KEYER
CA3126 0.01µF FILTER 0.01µF
NOTES: Optional design features. Pinout numbers refer PDIP package.
8-36
CA3126 Schematic Diagram
BYPASS
AFPC DETECTOR FIRST CHROMA AMPLIFIER
1.5K 1.6K 1.3K 2.1K 10pF
SINGLE SAMPLE HOLD
CHROMA INPUT
2.2K
SECOND CHROMA AMPLIFIER
DETECTOR
SIGNAL SAMPLE HOLD
2.5K CHROMA OUTPUT CHROMA GAIN CONTROL OVERLOAD DETECTOR
AMP.
ZENER REFERENCE
KILLER AMP.
3.5K
OVERLOAD DETECTOR
GROUND (SUBSTRATE) ZENER REFERENCE
NOTE: numbers refer PDIP Package. Resistance values ohms.
8-37
CA3126 Schematic Diagram
8.2K 12pF 4.5K 2.2K OSCILLATOR 1.5K BALANCED PHASE SHIFTER
(Continued)
XTAL FILTER BIAS SAMPLE HOLD CARRIER OUTPUT
AFPC FILTER
LIMITER AMPLIFIER
2.2K
4.9K
BALANCE UNBALANCE TRANSLATOR
BIAS SAMPLE HOLD
POWER SUPPLY +VCC
FILTER
3.5K
1.8K KEYER 2.94K
2.4K
1.5K 1.5K 2.5K 1.2K
VOLTAGE REFERENCES HORIZONTAL KEYING INPUT
8-38
CA3126 Application Information
Circuit Description (Pin numbers refer package.) following paragraphs briefly describe circuit operation CA3126 (shown Block Diagram Schematic Diagram). detailed description operation various portions CA3126 given AN6247, "Application CA3126 Chroma-Processing Using Sample-and-Hold Techniques". chroma input applied Terminal through desired band-shaping network. 2,450 resistor should placed series with Terminal minimize oscillator pickup first chroma amplifier. This amplifier supplies signals second chroma amplifier AFPC detectors. first chroma amplifier gain-controlled amplifier. horizontal keying pulse applied Terminal This pulse must present ensure proper operation oscillator circuit. subcarrier burst sampled during keying interval AFPC detector. error voltage, produced Terminal proportional burst phase, compared quiescent bias voltage Terminal sample-and-hold circuitry. This "compared" voltage controls phase- shifting network phase-locked loop. operation AFPC loop independent external adjustments voltages except initial capacitor adjustment free-running frequency. regenerated oscillator signal Terminal applied internally AFPC detectors through -45-degree phase-shifter networks establish proper phase relationship these detectors. detector, which also samples burst during keying interval, produces correction voltage proportional burst amplitude. correction voltage compared quiescent bias level using sample-and-hold circuitry similar that used AFPC portion circuit. "compared" voltage applied internally amplifier killer amplifier. Because amplifier gains killer threshold determined ratios internal resistors, these functions independent external voltages controls. attenuated chroma signal second chroma amplifier, where burst removed keyer action. killer amplifier, chroma gain control, overload detector control action second chroma amplifier, whose gain proportional voltage Terminal overload detector (Terminal receives sample chroma output (Terminal detects peak signal. detected voltage stored external capacitor connected Terminal This stored voltage Terminal affects gain second chroma same manner chroma gain control. General Considerations block diagram shown typical type circuit used practical application CA3126. Several items critical proper operation circuit. series resistor approximately 2,450 high source impedance) must used chroma input, Terminal This high impedance minimizes pickup unbalanced currents, particularly subcarrier oscillator signal. When overload detector used, large resistor (nominally 47,000) must placed series with Terminal required time constant. same network series serves killer time constant. setting free-running oscillator frequency requires presence keying pulse. free-running frequency will erroneous Terminal shorted during setting operation because offset voltage introduced AFPC detector. Care must taken board designs provide reasonable isolation between oscillator portion circuit (Terminals chroma input (Terminal Overload Detector overload detector accomplishes purposes: prevents oversaturation burst-to-chroma ratios. prevents overload conditions noise. Both these conditions discussed more detail AN6247. extent which overload detector used depends upon individual receiver design goals. greater than 0.5VP-P output desired, chroma output Terminal tapped yield desired degree overload detector action. Chroma Gain Control chroma gain control operates varying base bias current source transistor Q25. ensure proper temperature tracking chroma gain control, essential that control operated from supply source derived from reference voltage Terminal Because control operates from current source, chroma gain much more predictable less temperature sensitive than controls that steer current means differential amplifier. typical chroma gain characteristic CA3126 shown Figure
CHROMA OUTPUT MAX. VALUE)
25oC, CHROMA INPUT 0.5VP-P
VOLTAGE TERMINAL V12)
FIGURE CHROMA GAIN CONTROL
Subcarrier Regenerator Oscillator oscillator filter consists 3.579545MHz crystal, resistor, 10pF capacitor connected series across Terminals 33pF capacitor, shunt connected from Terminal ground, rolls higher order harmonics, thereby preventing oscillation crystal third-harmonic frequency.
8-39
CA3126
CHROMA OUTPUT AMPLITUDE 25oC VALUE) CHROMA INPUT 0.25VP-P 3.58MHz SIGNAL CHROMA OUTPUT PHASE (DEGREE DEVIATION FROM 25oC VALUE)
curve typical static phase error function freerunning oscillator frequency shown Figure should noted that slope curve determines gain phase-locked loop, i.e., 40Hz degree.
25oC
PHASE
STATIC PHASE ERROR (DEGREES)
AMPLITUDE
TEMPERATURE (oC)
-300 -200 -100 OSCILLATOR FREE-RUNNING FREQUENCY (DEVIATION FROM 3.579545MHz)
FIGURE AMPLITUDE PHASE VARIATIONS CHROMA OUTPUT TEMPERATURE
FIGURE STATIC PHASE ERROR
OSCILLATOR FREE-RUNNING FREQUENCY (DEVIATION FROM 3.579545 MHz)
CHROMA INPUT 0VP-P
Thermal Considerations circuit CA3126 thermally compensated achieve optimal operating characteristics over normal operating temperature range receivers. Figures show oscillator chroma-output amplitudes phases function temperature (Terminals 15), respectively. Both oscillator chroma-output amplitudes phases measured relative chroma-input phase. performance oscillator free-running frequency function temperature shown Figure temperature plots characteristic test circuit with indicated component types values given.
OSCILLATOR AMPLITUDE 25oC VALUE) CHROMA INPUT 0.25VP-P, 3.58MHz SIGNAL OSCILLATOR PHASE (DEGREE DEVIATION FROM 25oC VALUE)
-100
-150
TEMPERATURE (oC)
FIGURE VARIATION OSCILLATOR FREE RUNNING FREQUENCY TEMPERATURE
PHASE
AMPLITUDE
TEMPERATURE (oC)
FIGURE AMPLITUDE PHASE VARIATIONS OSCILLATOR OUTPUT TEMPERATURE
8-40
CA3126
0.01µF 0.01µF +12V 0.01µF 0.01µF 5pF-25pF INPUT FILTER 82pF 68pF TYP. 0.5VP-P XTAL 33pF 10pF 3.579545MHz SUBCARRIER OUTPUT (CW) SUBCARRIER 0.01µF
12µH
27µH
2.4k
AFPC DET/FILT.
CA3126
COMPOSITE VIDEO/CHROMA INPUT 0.01µF FIRST CHROMA CHROMA/ BURST-GATE SWITCH CHROMA
11.2V ZENER
DET/FILT.
CHROMA O.L. KILLER GAIN CONT.
BURST KEYER
>1VPEAK
0.01µF
0.01µF
NOTE: Subcarrier Regenerator, second chroma used; Pins 13,14, connected grounded.
BURST PULSE (TYP), CENTERED BURST
FIGURE TYPICAL APPLICATION CA3126 SUBCARRIER REGENERATOR
Harris Semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Harris Semiconductor products sold description only. Harris Semiconductor reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Harris believed accurate reliable. However, responsibility assumed Harris subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Harris subsidiaries.
Sales Office Headquarters
general information regarding Harris Semiconductor products, call 1-800-4-HARRIS NORTH AMERICA Harris Semiconductor 883, Mail Stop 53-210 Melbourne, 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Harris Semiconductor Ltd. Tannery Road Cencon #09-01 Singapore 1334 TEL: (65) 748-4200 FAX: (65) 748-0400
8-41

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